Lines Matching full:venc

3  * linux/drivers/video/omap2/dss/venc.c
8  * VENC settings from TI's DSS driver
11 #define DSS_SUBSYS_NAME "VENC"
36 /* Venc registers */
258 } venc;
262 	__raw_writel(val, venc.base + idx);
267 	u32 l = __raw_readl(venc.base + idx);
273 	DSSDBG("write venc conf\n");
286 			venc.wss_data);
334 			DSSERR("Failed to reset venc\n");
352 	r = pm_runtime_resume_and_get(&venc.pdev->dev);
364 	r = pm_runtime_put_sync(&venc.pdev->dev);
383 	struct omap_overlay_manager *mgr = venc.output.manager;
392 	venc_write_config(venc_timings_to_config(&venc.timings));
394 	dss_set_venc_output(venc.type);
399 	if (venc.type == OMAP_DSS_VENC_TYPE_COMPOSITE)
404 	if (venc.invert_polarity == false)
409 	dss_mgr_set_timings(mgr, &venc.timings);
411 	r = regulator_enable(venc.vdda_dac_reg);
422 	regulator_disable(venc.vdda_dac_reg);
434 	struct omap_overlay_manager *mgr = venc.output.manager;
441 	regulator_disable(venc.vdda_dac_reg);
448 	struct omap_dss_device *out = &venc.output;
453 	mutex_lock(&venc.venc_lock);
465 	venc.wss_data = 0;
467 	mutex_unlock(&venc.venc_lock);
471 	mutex_unlock(&venc.venc_lock);
479 	mutex_lock(&venc.venc_lock);
483 	mutex_unlock(&venc.venc_lock);
491 	mutex_lock(&venc.venc_lock);
494 	if (memcmp(&venc.timings, timings, sizeof(*timings)))
495 		venc.wss_data = 0;
497 	venc.timings = *timings;
501 	mutex_unlock(&venc.venc_lock);
521 	mutex_lock(&venc.venc_lock);
523 	*timings = venc.timings;
525 	mutex_unlock(&venc.venc_lock);
531 	return (venc.wss_data >> 8) ^ 0xfffff;
541 	mutex_lock(&venc.venc_lock);
543 	config = venc_timings_to_config(&venc.timings);
546 	venc.wss_data = (wss ^ 0xfffff) << 8;
553 			venc.wss_data);
558 	mutex_unlock(&venc.venc_lock);
566 	mutex_lock(&venc.venc_lock);
568 	venc.type = type;
570 	mutex_unlock(&venc.venc_lock);
576 	mutex_lock(&venc.venc_lock);
578 	venc.invert_polarity = invert_polarity;
580 	mutex_unlock(&venc.venc_lock);
587 	if (venc.vdda_dac_reg != NULL)
590 	if (venc.pdev->dev.of_node)
591 		vdda_dac = devm_regulator_get(&venc.pdev->dev, "vdda");
593 		vdda_dac = devm_regulator_get(&venc.pdev->dev, "vdda_dac");
601 	venc.vdda_dac_reg = vdda_dac;
674 	venc.tv_dac_clk = clk;
742 	struct omap_dss_device *out = &venc.output;
747 	out->name = "venc.0";
757 	struct omap_dss_device *out = &venc.output;
773 	venc.invert_polarity = of_property_read_bool(ep, "ti,invert-polarity");
784 		venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE;
787 		venc.type = OMAP_DSS_VENC_TYPE_SVIDEO;
804 /* VENC HW IP initialisation */
812 	venc.pdev = pdev;
814 	mutex_init(&venc.venc_lock);
816 	venc.wss_data = 0;
818 	venc_mem = platform_get_resource(venc.pdev, IORESOURCE_MEM, 0);
820 		DSSERR("can't get IORESOURCE_MEM VENC\n");
824 	venc.base = devm_ioremap(&pdev->dev, venc_mem->start,
826 	if (!venc.base) {
827 		DSSERR("can't ioremap VENC\n");
842 	dev_dbg(&pdev->dev, "OMAP VENC rev %d\n", rev_id);
854 	dss_debugfs_create_file("venc", venc_dump_regs);
892 	clk_disable_unprepare(venc.tv_dac_clk);
907 	return clk_prepare_enable(venc.tv_dac_clk);
916 	{ .compatible = "ti,omap2-venc", },
917 	{ .compatible = "ti,omap3-venc", },
918 	{ .compatible = "ti,omap4-venc", },