Lines Matching full:mx
252 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
255 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
264 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
309 l = FLD_MOD(l, cinfo->mX[0] ? 1 : 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
310 l = FLD_MOD(l, cinfo->mX[1] ? 1 : 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
312 l = FLD_MOD(l, cinfo->mX[2] ? 1 : 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
313 l = FLD_MOD(l, cinfo->mX[3] ? 1 : 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
317 (cinfo->mX[0] ? BIT(7) : 0) | in dss_pll_write_config_type_a()
318 (cinfo->mX[1] ? BIT(8) : 0) | in dss_pll_write_config_type_a()
319 (cinfo->mX[2] ? BIT(10) : 0) | in dss_pll_write_config_type_a()
320 (cinfo->mX[3] ? BIT(11) : 0)); in dss_pll_write_config_type_a()
361 l = FLD_MOD(l, cinfo->mX[0], 24, 18); /* PLL_REGM2 */ in dss_pll_write_config_type_b()