Lines Matching +full:0 +full:x58
67 #define AVIVO_DC_LUT_RW_SELECT 0x6480
68 #define AVIVO_DC_LUT_RW_MODE 0x6484
69 #define AVIVO_DC_LUT_RW_INDEX 0x6488
70 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
71 #define AVIVO_DC_LUT_PWL_DATA 0x6490
72 #define AVIVO_DC_LUT_30_COLOR 0x6494
73 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
74 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
75 #define AVIVO_DC_LUT_AUTOFILL 0x64a0
77 #define AVIVO_DC_LUTA_CONTROL 0x64c0
78 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
79 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
80 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
81 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
82 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
83 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
85 #define AVIVO_DC_LUTB_CONTROL 0x6cc0
86 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
87 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
88 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
89 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
90 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
91 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
96 * entries in the var structure). Return != 0 for invalid regno.
117 if (info->var.transp.length > 0) { in offb_setcolreg()
123 return 0; in offb_setcolreg()
134 return 0; in offb_setcolreg()
145 out_le32(par->cmap_adr + 0x58, in offb_setcolreg()
146 in_le32(par->cmap_adr + 0x58) & ~0x20); in offb_setcolreg()
150 out_8(par->cmap_adr + 0xb0, regno); in offb_setcolreg()
151 out_le32(par->cmap_adr + 0xb4, in offb_setcolreg()
156 out_le32(par->cmap_adr + 0x58, in offb_setcolreg()
157 in_le32(par->cmap_adr + 0x58) | 0x20); in offb_setcolreg()
159 out_8(par->cmap_adr + 0xb0, regno); in offb_setcolreg()
160 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); in offb_setcolreg()
164 out_8(par->cmap_adr + 0xb0, regno); in offb_setcolreg()
165 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); in offb_setcolreg()
177 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); in offb_setcolreg()
184 return 0; in offb_setcolreg()
197 return 0; in offb_blank()
201 return 0; in offb_blank()
206 for (i = 0; i < 256; i++) { in offb_blank()
210 for (j = 0; j < 3; j++) in offb_blank()
211 writeb(0, par->cmap_data); in offb_blank()
215 out_le32(par->cmap_adr + 0x58, in offb_blank()
216 in_le32(par->cmap_adr + 0x58) & ~0x20); in offb_blank()
220 out_8(par->cmap_adr + 0xb0, i); in offb_blank()
221 out_le32(par->cmap_adr + 0xb4, 0); in offb_blank()
225 out_le32(par->cmap_adr + 0x58, in offb_blank()
226 in_le32(par->cmap_adr + 0x58) | 0x20); in offb_blank()
228 out_8(par->cmap_adr + 0xb0, i); in offb_blank()
229 out_le32(par->cmap_adr + 0xb4, 0); in offb_blank()
232 out_8(par->cmap_adr + 0xb0, i); in offb_blank()
233 out_le32(par->cmap_adr + 0xb4, 0); in offb_blank()
237 0); in offb_blank()
242 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); in offb_blank()
243 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); in offb_blank()
245 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); in offb_blank()
250 return 0; in offb_blank()
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL); in offb_set_par()
260 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE); in offb_set_par()
261 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN); in offb_set_par()
262 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED); in offb_set_par()
263 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE); in offb_set_par()
264 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN); in offb_set_par()
265 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED); in offb_set_par()
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL); in offb_set_par()
267 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE); in offb_set_par()
268 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN); in offb_set_par()
269 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED); in offb_set_par()
270 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE); in offb_set_par()
271 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN); in offb_set_par()
272 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED); in offb_set_par()
274 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); in offb_set_par()
275 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); in offb_set_par()
276 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); in offb_set_par()
277 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); in offb_set_par()
278 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); in offb_set_par()
280 return 0; in offb_set_par()
315 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) in offb_map_reg()
331 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); in offb_init_palette_hacks()
336 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); in offb_init_palette_hacks()
340 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); in offb_init_palette_hacks()
344 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff); in offb_init_palette_hacks()
348 unsigned long base = address & 0xff000000UL; in offb_init_palette_hacks()
350 ioremap(base + 0x7ff000, 0x1000) + 0xcc0; in offb_init_palette_hacks()
355 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000); in offb_init_palette_hacks()
365 if (vid && did && *vid == 0x1002 && in offb_init_palette_hacks()
366 ((*did >= 0x7100 && *did < 0x7800) || in offb_init_palette_hacks()
367 (*did >= 0x9400))) { in offb_init_palette_hacks()
368 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000); in offb_init_palette_hacks()
374 const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 }; in offb_init_palette_hacks()
376 const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 }; in offb_init_palette_hacks()
380 par->cmap_adr = ioremap(io_addr + 0x3c8, 2); in offb_init_palette_hacks()
438 fix->type_aux = 0; in offb_init_fb()
446 var->xoffset = var->yoffset = 0; in offb_init_fb()
450 var->red.offset = 0; in offb_init_fb()
452 var->green.offset = 0; in offb_init_fb()
454 var->blue.offset = 0; in offb_init_fb()
456 var->transp.offset = 0; in offb_init_fb()
457 var->transp.length = 0; in offb_init_fb()
465 var->blue.offset = 0; in offb_init_fb()
467 var->transp.offset = 0; in offb_init_fb()
468 var->transp.length = 0; in offb_init_fb()
476 var->blue.offset = 0; in offb_init_fb()
478 var->transp.offset = 0; in offb_init_fb()
479 var->transp.length = 0; in offb_init_fb()
487 var->blue.offset = 0; in offb_init_fb()
494 var->transp.msb_right = 0; in offb_init_fb()
495 var->grayscale = 0; in offb_init_fb()
496 var->nonstd = 0; in offb_init_fb()
497 var->activate = 0; in offb_init_fb()
503 var->sync = 0; in offb_init_fb()
514 fb_alloc_cmap(&info->cmap, 256, 0); in offb_init_fb()
516 if (devm_aperture_acquire_for_platform_device(parent, par->base, par->size) < 0) in offb_init_fb()
518 if (register_framebuffer(info) < 0) in offb_init_fb()
539 unsigned int flags, rsize, addr_prop = 0; in offb_init_nodriver()
540 unsigned long max_size = 0; in offb_init_nodriver()
544 int foreign_endian = 0; in offb_init_nodriver()
575 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu)) in offb_init_nodriver()
602 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags)) in offb_init_nodriver()
604 int match_addrp = 0; in offb_init_nodriver()
649 address += 0x1000; in offb_init_nodriver()
668 return 0; in offb_probe_bootx_noscreen()
681 offb_init_nodriver(pdev, pdev->dev.of_node, 0); in offb_probe_display()
683 return 0; in offb_probe_display()
709 return 0; in offb_init()