Lines Matching +full:0 +full:x00010004
62 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVWriteCrtc()
63 VGA_WR08(par->PCIO, par->IOBase + 0x05, value); in NVWriteCrtc()
67 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVReadCrtc()
68 return (VGA_RD08(par->PCIO, par->IOBase + 0x05)); in NVReadCrtc()
93 VGA_RD08(par->PCIO, par->IOBase + 0x0a); in NVWriteAttr()
95 index &= ~0x20; in NVWriteAttr()
97 index |= 0x20; in NVWriteAttr()
103 VGA_RD08(par->PCIO, par->IOBase + 0x0a); in NVReadAttr()
105 index &= ~0x20; in NVReadAttr()
107 index |= 0x20; in NVReadAttr()
143 u32 reg52C, reg608, dac0_reg608 = 0; in NVIsConnected()
147 dac0_reg608 = NV_RD32(PRAMDAC, 0x0608); in NVIsConnected()
148 PRAMDAC += 0x800; in NVIsConnected()
151 reg52C = NV_RD32(PRAMDAC, 0x052C); in NVIsConnected()
152 reg608 = NV_RD32(PRAMDAC, 0x0608); in NVIsConnected()
154 NV_WR32(PRAMDAC, 0x0608, reg608 & ~0x00010000); in NVIsConnected()
156 NV_WR32(PRAMDAC, 0x052C, reg52C & 0x0000FEEE); in NVIsConnected()
158 NV_WR32(PRAMDAC, 0x052C, NV_RD32(PRAMDAC, 0x052C) | 1); in NVIsConnected()
160 NV_WR32(par->PRAMDAC0, 0x0610, 0x94050140); in NVIsConnected()
161 NV_WR32(par->PRAMDAC0, 0x0608, NV_RD32(par->PRAMDAC0, 0x0608) | in NVIsConnected()
162 0x00001000); in NVIsConnected()
166 present = (NV_RD32(PRAMDAC, 0x0608) & (1 << 28)) ? 1 : 0; in NVIsConnected()
174 NV_WR32(par->PRAMDAC0, 0x0608, dac0_reg608); in NVIsConnected()
176 NV_WR32(PRAMDAC, 0x052C, reg52C); in NVIsConnected()
177 NV_WR32(PRAMDAC, 0x0608, reg608); in NVIsConnected()
185 par->PCIO = par->PCIO0 + 0x2000; in NVSelectHeadRegisters()
186 par->PCRTC = par->PCRTC0 + 0x800; in NVSelectHeadRegisters()
187 par->PRAMDAC = par->PRAMDAC0 + 0x800; in NVSelectHeadRegisters()
188 par->PDIO = par->PDIO0 + 0x2000; in NVSelectHeadRegisters()
199 if (NV_RD32(par->PFB, 0x0000) & 0x00000100) { in nv4GetConfig()
201 ((NV_RD32(par->PFB, 0x0000) >> 12) & 0x0F) * 1024 * 2 + in nv4GetConfig()
204 switch (NV_RD32(par->PFB, 0x0000) & 0x00000003) { in nv4GetConfig()
205 case 0: in nv4GetConfig()
220 par->CrystalFreqKHz = (NV_RD32(par->PEXTDEV, 0x0000) & 0x00000040) ? in nv4GetConfig()
222 par->CURSOR = &par->PRAMIN[0x1E00]; in nv4GetConfig()
230 u32 implementation = par->Chipset & 0x0ff0; in nv10GetConfig()
234 if (!(NV_RD32(par->PMC, 0x0004) & 0x01000001)) { in nv10GetConfig()
235 NV_WR32(par->PMC, 0x0004, 0x01000001); in nv10GetConfig()
241 0, 1); in nv10GetConfig()
242 if ((par->Chipset & 0xffff) == 0x01a0) { in nv10GetConfig()
245 pci_read_config_dword(dev, 0x7c, &amt); in nv10GetConfig()
247 } else if ((par->Chipset & 0xffff) == 0x01f0) { in nv10GetConfig()
250 pci_read_config_dword(dev, 0x84, &amt); in nv10GetConfig()
254 (NV_RD32(par->PFB, 0x020C) & 0xFFF00000) >> 10; in nv10GetConfig()
258 par->CrystalFreqKHz = (NV_RD32(par->PEXTDEV, 0x0000) & (1 << 6)) ? in nv10GetConfig()
261 if (par->twoHeads && (implementation != 0x0110)) { in nv10GetConfig()
262 if (NV_RD32(par->PEXTDEV, 0x0000) & (1 << 22)) in nv10GetConfig()
275 u16 implementation = par->Chipset & 0x0ff0; in NVCommonSetup()
279 int mobile = 0; in NVCommonSetup()
280 int tvA = 0; in NVCommonSetup()
281 int tvB = 0; in NVCommonSetup()
283 int Television = 0; in NVCommonSetup()
284 int err = 0; in NVCommonSetup()
295 par->PRAMIN = par->REGS + (0x00710000 / 4); in NVCommonSetup()
296 par->PCRTC0 = par->REGS + (0x00600000 / 4); in NVCommonSetup()
297 par->PRAMDAC0 = par->REGS + (0x00680000 / 4); in NVCommonSetup()
298 par->PFB = par->REGS + (0x00100000 / 4); in NVCommonSetup()
299 par->PFIFO = par->REGS + (0x00002000 / 4); in NVCommonSetup()
300 par->PGRAPH = par->REGS + (0x00400000 / 4); in NVCommonSetup()
301 par->PEXTDEV = par->REGS + (0x00101000 / 4); in NVCommonSetup()
302 par->PTIMER = par->REGS + (0x00009000 / 4); in NVCommonSetup()
303 par->PMC = par->REGS + (0x00000000 / 4); in NVCommonSetup()
304 par->FIFO = par->REGS + (0x00800000 / 4); in NVCommonSetup()
307 par->PCIO0 = (u8 __iomem *) par->REGS + 0x00601000; in NVCommonSetup()
308 par->PDIO0 = (u8 __iomem *) par->REGS + 0x00681000; in NVCommonSetup()
309 par->PVIO = (u8 __iomem *) par->REGS + 0x000C0000; in NVCommonSetup()
312 (implementation != 0x0100) && in NVCommonSetup()
313 (implementation != 0x0150) && in NVCommonSetup()
314 (implementation != 0x01A0) && (implementation != 0x0200); in NVCommonSetup()
317 (implementation != 0x0110)); in NVCommonSetup()
319 par->twoStagePLL = (implementation == 0x0310) || in NVCommonSetup()
320 (implementation == 0x0340) || (par->Architecture >= NV_ARCH_40); in NVCommonSetup()
323 (implementation != 0x0100); in NVCommonSetup()
325 par->BlendingPossible = ((par->Chipset & 0xffff) != 0x0020); in NVCommonSetup()
328 switch (par->Chipset & 0xffff) { in NVCommonSetup()
329 case 0x0112: in NVCommonSetup()
330 case 0x0174: in NVCommonSetup()
331 case 0x0175: in NVCommonSetup()
332 case 0x0176: in NVCommonSetup()
333 case 0x0177: in NVCommonSetup()
334 case 0x0179: in NVCommonSetup()
335 case 0x017C: in NVCommonSetup()
336 case 0x017D: in NVCommonSetup()
337 case 0x0186: in NVCommonSetup()
338 case 0x0187: in NVCommonSetup()
339 case 0x018D: in NVCommonSetup()
340 case 0x01D7: in NVCommonSetup()
341 case 0x0228: in NVCommonSetup()
342 case 0x0286: in NVCommonSetup()
343 case 0x028C: in NVCommonSetup()
344 case 0x0316: in NVCommonSetup()
345 case 0x0317: in NVCommonSetup()
346 case 0x031A: in NVCommonSetup()
347 case 0x031B: in NVCommonSetup()
348 case 0x031C: in NVCommonSetup()
349 case 0x031D: in NVCommonSetup()
350 case 0x031E: in NVCommonSetup()
351 case 0x031F: in NVCommonSetup()
352 case 0x0324: in NVCommonSetup()
353 case 0x0325: in NVCommonSetup()
354 case 0x0328: in NVCommonSetup()
355 case 0x0329: in NVCommonSetup()
356 case 0x032C: in NVCommonSetup()
357 case 0x032D: in NVCommonSetup()
358 case 0x0347: in NVCommonSetup()
359 case 0x0348: in NVCommonSetup()
360 case 0x0349: in NVCommonSetup()
361 case 0x034B: in NVCommonSetup()
362 case 0x034C: in NVCommonSetup()
363 case 0x0160: in NVCommonSetup()
364 case 0x0166: in NVCommonSetup()
365 case 0x0169: in NVCommonSetup()
366 case 0x016B: in NVCommonSetup()
367 case 0x016C: in NVCommonSetup()
368 case 0x016D: in NVCommonSetup()
369 case 0x00C8: in NVCommonSetup()
370 case 0x00CC: in NVCommonSetup()
371 case 0x0144: in NVCommonSetup()
372 case 0x0146: in NVCommonSetup()
373 case 0x0147: in NVCommonSetup()
374 case 0x0148: in NVCommonSetup()
375 case 0x0098: in NVCommonSetup()
376 case 0x0099: in NVCommonSetup()
388 NVSelectHeadRegisters(par, 0); in NVCommonSetup()
390 NVLockUnlock(par, 0); in NVCommonSetup()
392 par->IOBase = (NVReadMiscOut(par) & 0x01) ? 0x3d0 : 0x3b0; in NVCommonSetup()
394 par->Television = 0; in NVCommonSetup()
398 par->CRTCnumber = 0; in NVCommonSetup()
405 FlatPanel = (monA->input & FB_DISP_DDI) ? 1 : 0; in NVCommonSetup()
408 if ((par->Chipset & 0x0fff) <= 0x0020) in NVCommonSetup()
409 FlatPanel = 0; in NVCommonSetup()
411 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVCommonSetup()
412 if (VGA_RD08(par->PCIO, 0x03D5) & 0x80) { in NVCommonSetup()
413 VGA_WR08(par->PCIO, 0x03D4, 0x33); in NVCommonSetup()
414 if (!(VGA_RD08(par->PCIO, 0x03D5) & 0x01)) in NVCommonSetup()
418 FlatPanel = 0; in NVCommonSetup()
440 if (implementation != 0x0110) { in NVCommonSetup()
441 if (NV_RD32(par->PRAMDAC0, 0x0000052C) & 0x100) in NVCommonSetup()
444 outputAfromCRTC = 0; in NVCommonSetup()
445 if (NV_RD32(par->PRAMDAC0, 0x0000252C) & 0x100) in NVCommonSetup()
448 outputBfromCRTC = 0; in NVCommonSetup()
449 analog_on_A = NVIsConnected(par, 0); in NVCommonSetup()
452 outputAfromCRTC = 0; in NVCommonSetup()
454 analog_on_A = 0; in NVCommonSetup()
455 analog_on_B = 0; in NVCommonSetup()
458 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
459 cr44 = VGA_RD08(par->PCIO, 0x03D5); in NVCommonSetup()
461 VGA_WR08(par->PCIO, 0x03D5, 3); in NVCommonSetup()
463 NVLockUnlock(par, 0); in NVCommonSetup()
465 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVCommonSetup()
466 slaved_on_B = VGA_RD08(par->PCIO, 0x03D5) & 0x80; in NVCommonSetup()
468 VGA_WR08(par->PCIO, 0x03D4, 0x33); in NVCommonSetup()
469 tvB = !(VGA_RD08(par->PCIO, 0x03D5) & 0x01); in NVCommonSetup()
472 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
473 VGA_WR08(par->PCIO, 0x03D5, 0); in NVCommonSetup()
474 NVSelectHeadRegisters(par, 0); in NVCommonSetup()
475 NVLockUnlock(par, 0); in NVCommonSetup()
477 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVCommonSetup()
478 slaved_on_A = VGA_RD08(par->PCIO, 0x03D5) & 0x80; in NVCommonSetup()
480 VGA_WR08(par->PCIO, 0x03D4, 0x33); in NVCommonSetup()
481 tvA = !(VGA_RD08(par->PCIO, 0x03D5) & 0x01); in NVCommonSetup()
484 oldhead = NV_RD32(par->PCRTC0, 0x00000860); in NVCommonSetup()
485 NV_WR32(par->PCRTC0, 0x00000860, oldhead | 0x00000010); in NVCommonSetup()
504 CRTCnumber = 0; in NVCommonSetup()
506 printk("nvidiafb: CRTC 0 is currently programmed for " in NVCommonSetup()
515 FlatPanel = 0; in NVCommonSetup()
520 FlatPanel = 0; in NVCommonSetup()
524 CRTCnumber = 0; in NVCommonSetup()
527 printk("nvidiafb: CRTC 0 is currently programmed " in NVCommonSetup()
536 FlatPanel = (monA->input & FB_DISP_DDI) ? 1 : 0; in NVCommonSetup()
538 FlatPanel = (monB->input & FB_DISP_DDI) ? 1 : 0; in NVCommonSetup()
554 par->FlatPanel = 0; in NVCommonSetup()
571 par->CRTCnumber = 0; in NVCommonSetup()
606 if (implementation == 0x0110) in NVCommonSetup()
607 cr44 = par->CRTCnumber * 0x3; in NVCommonSetup()
609 NV_WR32(par->PCRTC0, 0x00000860, oldhead); in NVCommonSetup()
611 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
612 VGA_WR08(par->PCIO, 0x03D5, cr44); in NVCommonSetup()
621 par->fpWidth = NV_RD32(par->PRAMDAC, 0x0820) + 1; in NVCommonSetup()
622 par->fpHeight = NV_RD32(par->PRAMDAC, 0x0800) + 1; in NVCommonSetup()
623 par->fpSyncs = NV_RD32(par->PRAMDAC, 0x0848) & 0x30000033; in NVCommonSetup()
632 par->FPDither = 0; in NVCommonSetup()
634 par->LVDS = 0; in NVCommonSetup()
636 NV_WR32(par->PRAMDAC0, 0x08B0, 0x00010004); in NVCommonSetup()
637 if (NV_RD32(par->PRAMDAC0, 0x08b4) & 1) in NVCommonSetup()