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3 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
7 |* hereby granted a nonexclusive, royalty-free copyright license to *|
10 |* Any use of this source code must include, in the user documenta- *|
14 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
18 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
22 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
23 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
32 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
41 * GPL Licensing Note - According to Mark Vojkovich, author of the Xorg/
42 * XFree86 'nv' driver, this source code is provided under MIT-style licensing
47 * Antonino Daplas <adaplas@pol.net> 2005-03-11
76 struct nvidia_par *par = info->par; in nvidiafb_safe_mode()
79 info->pixmap.scan_align = 1; in nvidiafb_safe_mode()
80 par->lockup = 1; in nvidiafb_safe_mode()
85 struct nvidia_par *par = info->par; in NVFlush()
86 int count = 1000000000; in NVFlush() local
88 while (--count && READ_GET(par) != par->dmaPut) ; in NVFlush()
90 if (!count) { in NVFlush()
98 struct nvidia_par *par = info->par; in NVSync()
99 int count = 1000000000; in NVSync() local
101 while (--count && NV_RD32(par->PGRAPH, 0x0700)) ; in NVSync()
103 if (!count) { in NVSync()
111 if (par->dmaCurrent != par->dmaPut) { in NVDmaKickoff()
112 par->dmaPut = par->dmaCurrent; in NVDmaKickoff()
113 WRITE_PUT(par, par->dmaPut); in NVDmaKickoff()
119 struct nvidia_par *par = info->par; in NVDmaWait()
121 int count = 1000000000, cnt; in NVDmaWait() local
124 while (par->dmaFree < size && --count && !par->lockup) { in NVDmaWait()
127 if (par->dmaPut >= dmaGet) { in NVDmaWait()
128 par->dmaFree = par->dmaMax - par->dmaCurrent; in NVDmaWait()
129 if (par->dmaFree < size) { in NVDmaWait()
132 if (par->dmaPut <= SKIPS) in NVDmaWait()
137 } while (--cnt && dmaGet <= SKIPS); in NVDmaWait()
140 par->lockup = 1; in NVDmaWait()
144 par->dmaCurrent = par->dmaPut = SKIPS; in NVDmaWait()
145 par->dmaFree = dmaGet - (SKIPS + 1); in NVDmaWait()
148 par->dmaFree = dmaGet - par->dmaCurrent - 1; in NVDmaWait()
151 if (!count) { in NVDmaWait()
160 struct nvidia_par *par = info->par; in NVSetPattern()
171 struct nvidia_par *par = info->par; in NVSetRopSolid()
175 if (par->currentRop != (rop + 32)) { in NVSetRopSolid()
178 par->currentRop = rop + 32; in NVSetRopSolid()
180 } else if (par->currentRop != rop) { in NVSetRopSolid()
181 if (par->currentRop >= 16) in NVSetRopSolid()
185 par->currentRop = rop; in NVSetRopSolid()
192 struct nvidia_par *par = info->par; in NVSetClippingRectangle()
193 int h = y2 - y1 + 1; in NVSetClippingRectangle()
194 int w = x2 - x1 + 1; in NVSetClippingRectangle()
203 struct nvidia_par *par = info->par; in NVResetGraphics()
207 pitch = info->fix.line_length; in NVResetGraphics()
209 par->dmaBase = (u32 __iomem *) (&par->FbStart[par->FbUsableSize]); in NVResetGraphics()
212 NV_WR32(&par->dmaBase[i], 0, 0x00000000); in NVResetGraphics()
214 NV_WR32(&par->dmaBase[0x0 + SKIPS], 0, 0x00040000); in NVResetGraphics()
215 NV_WR32(&par->dmaBase[0x1 + SKIPS], 0, 0x80000010); in NVResetGraphics()
216 NV_WR32(&par->dmaBase[0x2 + SKIPS], 0, 0x00042000); in NVResetGraphics()
217 NV_WR32(&par->dmaBase[0x3 + SKIPS], 0, 0x80000011); in NVResetGraphics()
218 NV_WR32(&par->dmaBase[0x4 + SKIPS], 0, 0x00044000); in NVResetGraphics()
219 NV_WR32(&par->dmaBase[0x5 + SKIPS], 0, 0x80000012); in NVResetGraphics()
220 NV_WR32(&par->dmaBase[0x6 + SKIPS], 0, 0x00046000); in NVResetGraphics()
221 NV_WR32(&par->dmaBase[0x7 + SKIPS], 0, 0x80000013); in NVResetGraphics()
222 NV_WR32(&par->dmaBase[0x8 + SKIPS], 0, 0x00048000); in NVResetGraphics()
223 NV_WR32(&par->dmaBase[0x9 + SKIPS], 0, 0x80000014); in NVResetGraphics()
224 NV_WR32(&par->dmaBase[0xA + SKIPS], 0, 0x0004A000); in NVResetGraphics()
225 NV_WR32(&par->dmaBase[0xB + SKIPS], 0, 0x80000015); in NVResetGraphics()
226 NV_WR32(&par->dmaBase[0xC + SKIPS], 0, 0x0004C000); in NVResetGraphics()
227 NV_WR32(&par->dmaBase[0xD + SKIPS], 0, 0x80000016); in NVResetGraphics()
228 NV_WR32(&par->dmaBase[0xE + SKIPS], 0, 0x0004E000); in NVResetGraphics()
229 NV_WR32(&par->dmaBase[0xF + SKIPS], 0, 0x80000017); in NVResetGraphics()
231 par->dmaPut = 0; in NVResetGraphics()
232 par->dmaCurrent = 16 + SKIPS; in NVResetGraphics()
233 par->dmaMax = 8191; in NVResetGraphics()
234 par->dmaFree = par->dmaMax - par->dmaCurrent; in NVResetGraphics()
236 switch (info->var.bits_per_pixel) { in NVResetGraphics()
273 par->currentRop = ~0; /* set to something invalid */ in NVResetGraphics()
276 NVSetClippingRectangle(info, 0, 0, info->var.xres_virtual, in NVResetGraphics()
277 info->var.yres_virtual); in NVResetGraphics()
284 struct nvidia_par *par = info->par; in nvidiafb_sync()
286 if (info->state != FBINFO_STATE_RUNNING) in nvidiafb_sync()
289 if (!par->lockup) in nvidiafb_sync()
292 if (!par->lockup) in nvidiafb_sync()
300 struct nvidia_par *par = info->par; in nvidiafb_copyarea()
302 if (info->state != FBINFO_STATE_RUNNING) in nvidiafb_copyarea()
305 if (par->lockup) { in nvidiafb_copyarea()
311 NVDmaNext(par, (region->sy << 16) | region->sx); in nvidiafb_copyarea()
312 NVDmaNext(par, (region->dy << 16) | region->dx); in nvidiafb_copyarea()
313 NVDmaNext(par, (region->height << 16) | region->width); in nvidiafb_copyarea()
320 struct nvidia_par *par = info->par; in nvidiafb_fillrect()
323 if (info->state != FBINFO_STATE_RUNNING) in nvidiafb_fillrect()
326 if (par->lockup) { in nvidiafb_fillrect()
331 if (info->var.bits_per_pixel == 8) in nvidiafb_fillrect()
332 color = rect->color; in nvidiafb_fillrect()
334 color = ((u32 *) info->pseudo_palette)[rect->color]; in nvidiafb_fillrect()
336 if (rect->rop != ROP_COPY) in nvidiafb_fillrect()
337 NVSetRopSolid(info, rect->rop, ~0); in nvidiafb_fillrect()
343 NVDmaNext(par, (rect->dx << 16) | rect->dy); in nvidiafb_fillrect()
344 NVDmaNext(par, (rect->width << 16) | rect->height); in nvidiafb_fillrect()
348 if (rect->rop != ROP_COPY) in nvidiafb_fillrect()
355 struct nvidia_par *par = info->par; in nvidiafb_mono_color_expand()
356 u32 fg, bg, mask = ~(~0 >> (32 - info->var.bits_per_pixel)); in nvidiafb_mono_color_expand()
357 u32 dsize, width, *data = (u32 *) image->data, tmp; in nvidiafb_mono_color_expand() local
360 width = (image->width + 31) & ~31; in nvidiafb_mono_color_expand()
361 dsize = (width * image->height) >> 5; in nvidiafb_mono_color_expand()
363 if (info->var.bits_per_pixel == 8) { in nvidiafb_mono_color_expand()
364 fg = image->fg_color | mask; in nvidiafb_mono_color_expand()
365 bg = image->bg_color | mask; in nvidiafb_mono_color_expand()
367 fg = ((u32 *) info->pseudo_palette)[image->fg_color] | mask; in nvidiafb_mono_color_expand()
368 bg = ((u32 *) info->pseudo_palette)[image->bg_color] | mask; in nvidiafb_mono_color_expand()
372 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff)); in nvidiafb_mono_color_expand()
373 NVDmaNext(par, ((image->dy + image->height) << 16) | in nvidiafb_mono_color_expand()
374 ((image->dx + image->width) & 0xffff)); in nvidiafb_mono_color_expand()
377 NVDmaNext(par, (image->height << 16) | width); in nvidiafb_mono_color_expand()
378 NVDmaNext(par, (image->height << 16) | width); in nvidiafb_mono_color_expand()
379 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff)); in nvidiafb_mono_color_expand()
385 for (j = RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS; j--;) { in nvidiafb_mono_color_expand()
391 dsize -= RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS; in nvidiafb_mono_color_expand()
397 for (j = dsize; j--;) { in nvidiafb_mono_color_expand()
409 struct nvidia_par *par = info->par; in nvidiafb_imageblit()
411 if (info->state != FBINFO_STATE_RUNNING) in nvidiafb_imageblit()
414 if (image->depth == 1 && !par->lockup) in nvidiafb_imageblit()