Lines Matching +full:all +full:- +full:outputs
1 // SPDX-License-Identifier: GPL-2.0-only
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
33 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
57 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
73 * G400 MAX/non-MAX distinction
81 * "Denis Zaitsev" <zzz@cd-club.ru>
84 * "Mike Pieper" <mike@pieper-family.de>
94 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
129 /* --------------------------------------------------------------------- */
135 /* --------------------------------------------------------------------- */
139 0,0, /* virtual -> visible no offset */
140 8, /* depth -> load bits_per_pixel */
148 -1,-1,
157 /* --------------------------------------------------------------------- */
160 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
163 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
164 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
165 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
167 switch (minfo->fbcon.var.bits_per_pixel) {
171 if (info->interlaced) {
173 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
184 if (minfo->crtc1.panpos >= 0) {
189 panpos = minfo->crtc1.panpos;
193 minfo->crtc1.panpos = -1; /* No update pending anymore */
214 minfo->crtc1.vsync.cnt++;
216 wake_up_interruptible(&minfo->crtc1.vsync.wait);
221 minfo->crtc2.vsync.cnt++;
222 wake_up_interruptible(&minfo->crtc2.vsync.wait);
232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
237 if (!test_and_set_bit(0, &minfo->irq_flags)) {
238 if (request_irq(minfo->pcidev->irq, matrox_irq,
240 clear_bit(0, &minfo->irq_flags);
241 return -EINVAL;
260 if (test_and_clear_bit(0, &minfo->irq_flags)) {
261 /* Flush pending pan-at-vbl request... */
263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
267 free_irq(minfo->pcidev->irq, minfo);
279 vs = &minfo->crtc1.vsync;
282 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
283 return -ENODEV;
285 vs = &minfo->crtc2.vsync;
288 return -ENODEV;
295 cnt = vs->cnt;
296 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
302 return -ETIMEDOUT;
307 /* --------------------------------------------------------------------- */
322 if (minfo->dead)
325 minfo->fbcon.var.xoffset = var->xoffset;
326 minfo->fbcon.var.yoffset = var->yoffset;
327 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
328 pos += minfo->curr.ydstorg.chunks;
329 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
330 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
331 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
332 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
335 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
342 if (minfo->devflags.support32MB)
345 minfo->crtc1.panpos = p2;
348 minfo->crtc1.panpos = -1;
360 /* Currently we are holding big kernel lock on all dead & usecount updates.
361 * Destroy everything after all users release it. Especially do not unregister
362 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
368 minfo->dead = 1;
369 if (minfo->usecount) {
374 unregister_framebuffer(&minfo->fbcon);
376 arch_phys_wc_del(minfo->wc_cookie);
377 iounmap(minfo->mmio.vbase.vaddr);
378 iounmap(minfo->video.vbase.vaddr);
379 release_mem_region(minfo->video.base, minfo->video.len_maximum);
380 release_mem_region(minfo->mmio.base, 16384);
394 if (minfo->dead) {
395 return -ENXIO;
397 minfo->usecount++;
399 minfo->userusecount++;
411 if (0 == --minfo->userusecount) {
415 if (!(--minfo->usecount) && minfo->dead) {
444 if (minfo->devflags.video64bits)
469 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
478 xres += rounding-over;
492 width = minfo->capable.vxres;
494 if (minfo->devflags.precise_width) {
512 switch (var->bits_per_pixel) {
553 unsigned int bpp = var->bits_per_pixel;
560 case 4: if (!minfo->capable.cfb4) return -EINVAL;
566 default: return -EINVAL;
569 vramlen = minfo->video.len_usable;
570 if (var->yres_virtual < var->yres)
571 var->yres_virtual = var->yres;
572 if (var->xres_virtual < var->xres)
573 var->xres_virtual = var->xres;
575 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
578 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
584 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
589 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
594 while (m2 >= m1) m2 -= m1;
599 max_yres = (vramlen - m2) / linelen;
600 if (var->yres_virtual > max_yres)
601 var->yres_virtual = max_yres;
605 if (var->yres_virtual > 32767)
606 var->yres_virtual = 32767;
608 if it was possible. We should return -EINVAL, but I disagree */
609 if (var->yres_virtual < var->yres)
610 var->yres = var->yres_virtual;
611 if (var->xres_virtual < var->xres)
612 var->xres = var->xres_virtual;
613 if (var->xoffset + var->xres > var->xres_virtual)
614 var->xoffset = var->xres_virtual - var->xres;
615 if (var->yoffset + var->yres > var->yres_virtual)
616 var->yoffset = var->yres_virtual - var->yres;
618 if (bpp == 16 && var->green.length == 5) {
619 bpp--; /* an artificial value - 15 */
622 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
624 var->clr.offset = rgbt->clr.offset;\
625 var->clr.length = rgbt->clr.length
631 *visual = rgbt->visual;
636 var->transp.length, var->red.length, var->green.length, var->blue.length,
637 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
640 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
641 var->xres_virtual, var->yres_virtual);
660 if (regno >= minfo->curr.cmap_len)
663 if (minfo->fbcon.var.grayscale) {
668 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
669 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
670 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
671 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
673 switch (minfo->fbcon.var.bits_per_pixel) {
686 (red << minfo->fbcon.var.red.offset) |
687 (green << minfo->fbcon.var.green.offset) |
688 (blue << minfo->fbcon.var.blue.offset) |
689 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
690 minfo->cmap[regno] = col | (col << 16);
697 minfo->cmap[regno] =
698 (red << minfo->fbcon.var.red.offset) |
699 (green << minfo->fbcon.var.green.offset) |
700 (blue << minfo->fbcon.var.blue.offset) |
701 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
709 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
712 strcpy(fix->id,"MATROX");
714 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
715 fix->ypanstep = 1;
716 fix->ywrapstep = 0;
717 fix->mmio_start = minfo->mmio.base;
718 fix->mmio_len = minfo->mmio.len;
719 fix->accel = minfo->devflags.accelerator;
724 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
727 mutex_lock(&minfo->fbcon.mm_lock);
728 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
729 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
730 mutex_unlock(&minfo->fbcon.mm_lock);
741 if (minfo->dead) {
742 return -ENXIO;
760 if (minfo->dead) {
761 return -ENXIO;
764 var = &info->var;
767 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
769 minfo->fbcon.fix.visual = visual;
770 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
771 minfo->fbcon.fix.type_aux = 0;
772 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
776 minfo->curr.cmap_len = cmap_len;
777 ydstorg += minfo->devflags.ydstorg;
778 minfo->curr.ydstorg.bytes = ydstorg;
779 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
780 if (var->bits_per_pixel == 4)
781 minfo->curr.ydstorg.pixels = ydstorg;
783 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
784 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
792 switch (var->bits_per_pixel) {
800 hw = &minfo->hw;
802 down_read(&minfo->altout.lock);
804 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
805 minfo->outputs[out].output->compute) {
806 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
809 up_read(&minfo->altout.lock);
810 minfo->crtc1.pixclock = mt.pixclock;
811 minfo->crtc1.mnp = mt.mnp;
812 minfo->hw_switch->init(minfo, &mt);
813 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
814 pos += minfo->curr.ydstorg.chunks;
816 hw->CRTC[0x0D] = pos & 0xFF;
817 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
818 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
819 hw->CRTCEXT[8] = pos >> 21;
820 minfo->hw_switch->restore(minfo);
822 down_read(&minfo->altout.lock);
824 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
825 minfo->outputs[out].output->program) {
826 minfo->outputs[out].output->program(minfo->outputs[out].data);
830 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
831 minfo->outputs[out].output->start) {
832 minfo->outputs[out].output->start(minfo->outputs[out].data);
835 up_read(&minfo->altout.lock);
839 minfo->initialized = 1;
850 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
853 vblank->vcount = mga_inl(M_VCOUNT);
858 vblank->flags |= FB_VBLANK_HBLANKING;
860 vblank->flags |= FB_VBLANK_VSYNCING;
861 if (vblank->vcount >= minfo->fbcon.var.yres)
862 vblank->flags |= FB_VBLANK_VBLANKING;
863 if (test_bit(0, &minfo->irq_flags)) {
864 vblank->flags |= FB_VBLANK_HAVE_COUNT;
867 vblank->count = minfo->crtc1.vsync.cnt;
884 if (minfo->dead) {
885 return -ENXIO;
898 return -EFAULT;
906 return -EFAULT;
917 return -EFAULT;
919 return -ENXIO;
920 down_read(&minfo->altout.lock);
921 oproc = minfo->outputs[mom.output].output;
923 val = -ENXIO;
924 } else if (!oproc->verifymode) {
928 val = -EINVAL;
931 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
934 if (minfo->outputs[mom.output].mode != mom.mode) {
935 minfo->outputs[mom.output].mode = mom.mode;
939 up_read(&minfo->altout.lock);
942 switch (minfo->outputs[mom.output].src) {
950 down_read(&minfo->crtc2.lock);
951 crtc2 = minfo->crtc2.info;
953 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
954 up_read(&minfo->crtc2.lock);
967 return -EFAULT;
969 return -ENXIO;
970 down_read(&minfo->altout.lock);
971 oproc = minfo->outputs[mom.output].output;
973 val = -ENXIO;
975 mom.mode = minfo->outputs[mom.output].mode;
978 up_read(&minfo->altout.lock);
982 return -EFAULT;
992 return -EFAULT;
996 return -ENXIO;
997 if (!minfo->outputs[i].output)
998 return -ENXIO;
999 switch (minfo->outputs[i].src) {
1004 return -EBUSY;
1008 if (minfo->devflags.panellink) {
1011 return -EINVAL;
1013 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1014 return -EBUSY;
1022 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1024 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1026 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1028 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1042 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1047 return -EFAULT;
1056 if (minfo->outputs[i].output) {
1057 switch (minfo->outputs[i].src) {
1065 if (minfo->devflags.panellink) {
1072 return -EFAULT;
1081 if (minfo->outputs[i].output) {
1086 return -EFAULT;
1096 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1100 return -EFAULT;
1110 return -EFAULT;
1112 down_read(&minfo->altout.lock);
1113 if (!minfo->outputs[1].output) {
1114 err = -ENXIO;
1115 } else if (minfo->outputs[1].output->getqueryctrl) {
1116 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1118 err = -EINVAL;
1120 up_read(&minfo->altout.lock);
1123 return -EFAULT;
1132 return -EFAULT;
1134 down_read(&minfo->altout.lock);
1135 if (!minfo->outputs[1].output) {
1136 err = -ENXIO;
1137 } else if (minfo->outputs[1].output->getctrl) {
1138 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1140 err = -EINVAL;
1142 up_read(&minfo->altout.lock);
1145 return -EFAULT;
1154 return -EFAULT;
1156 down_read(&minfo->altout.lock);
1157 if (!minfo->outputs[1].output) {
1158 err = -ENXIO;
1159 } else if (minfo->outputs[1].output->setctrl) {
1160 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1162 err = -EINVAL;
1164 up_read(&minfo->altout.lock);
1168 return -ENOTTY;
1182 if (minfo->dead)
1231 /* 9-F */
1247 static int cross4MB = -1; /* "matroxfb:cross4MB" */
1259 static int dev = -1; /* "matroxfb:dev:xxxxx" */
1261 static int depth = -1; /* "matroxfb:depth:xxxxx" */
1271 static int sync = -1; /* "matroxfb:sync:xxxxx" */
1276 static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1277 static int memtype = -1; /* "matroxfb:memtype:xxx" */
1278 static char outputs[8]; /* "matroxfb:outputs:xxx" */
1296 vm = minfo->video.vbase;
1315 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1326 *realSize = offs - 0x100000;
1328 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1389 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1492 "MGA-G100 (PCI)"},
1499 "MGA-G100 (AGP)"},
1506 "MGA-G200 (PCI)"},
1513 "MGA-G200eW (PCI)"},
1520 "MGA-G200 (AGP)"},
1548 "MGA-G200 (AGP)"},
1608 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1609 if (minfo->devflags.g450dac) {
1610 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1611 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1613 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1615 ptr = outputs;
1623 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1625 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1626 } else if (c == '2' && minfo->devflags.crtc2) {
1627 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1629 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1634 outputs[0] = 0;
1654 minfo->hw_switch = b->base->lowlevel;
1655 minfo->devflags.accelerator = b->base->accelID;
1656 minfo->max_pixel_clock = b->maxclk;
1658 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1659 minfo->capable.plnwt = 1;
1660 minfo->chip = b->chip;
1661 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1662 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1663 if (b->flags & DEVF_TEXT4B) {
1664 minfo->devflags.vgastep = 4;
1665 minfo->devflags.textmode = 4;
1666 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1667 } else if (b->flags & DEVF_TEXT16B) {
1668 minfo->devflags.vgastep = 16;
1669 minfo->devflags.textmode = 1;
1670 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1672 minfo->devflags.vgastep = 8;
1673 minfo->devflags.textmode = 1;
1674 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1676 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1677 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1678 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1679 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1680 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1681 minfo->devflags.dfp_type = dfp_type;
1682 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1683 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1684 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1686 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1687 minfo->outputs[2].data = minfo;
1688 minfo->outputs[2].output = &panellink_output;
1689 minfo->outputs[2].src = minfo->outputs[2].default_src;
1690 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1691 minfo->devflags.panellink = 1;
1694 if (minfo->capable.cross4MB < 0)
1695 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1696 if (b->flags & DEVF_SWAPS) {
1697 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1698 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1699 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1701 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1702 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1703 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1705 err = -EINVAL;
1714 memsize = b->base->maxvram;
1721 minfo->video.len_maximum = memsize;
1728 err = -ENOMEM;
1730 minfo->mmio.vbase.vaddr = ioremap(ctrlptr_phys, 16384);
1731 if (!minfo->mmio.vbase.vaddr) {
1735 minfo->mmio.base = ctrlptr_phys;
1736 minfo->mmio.len = 16384;
1737 minfo->video.base = video_base_phys;
1738 minfo->video.vbase.vaddr = ioremap_wc(video_base_phys, memsize);
1739 if (!minfo->video.vbase.vaddr) {
1748 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1749 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1755 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1759 minfo->devflags.nopciretry = 1;
1761 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1762 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1763 minfo->hw.MXoptionReg = mga_option;
1765 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1766 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1767 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1770 err = -ENXIO;
1772 if (minfo->hw_switch->preinit(minfo)) {
1776 err = -ENOMEM;
1777 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1781 minfo->devflags.ydstorg = 0;
1783 minfo->video.base = video_base_phys;
1784 minfo->video.len_usable = minfo->video.len;
1785 if (minfo->video.len_usable > b->base->maxdisplayable)
1786 minfo->video.len_usable = b->base->maxdisplayable;
1788 minfo->wc_cookie = arch_phys_wc_add(video_base_phys,
1789 minfo->video.len);
1791 if (!minfo->devflags.novga)
1794 minfo->hw_switch->reset(minfo);
1796 minfo->fbcon.monspecs.hfmin = 0;
1797 minfo->fbcon.monspecs.hfmax = fh;
1798 minfo->fbcon.monspecs.vfmin = 0;
1799 minfo->fbcon.monspecs.vfmax = fv;
1800 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1803 vesafb_defined.red = colors[depth-1].red;
1804 vesafb_defined.green = colors[depth-1].green;
1805 vesafb_defined.blue = colors[depth-1].blue;
1806 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1812 minfo->fbops = matroxfb_ops;
1813 minfo->fbcon.fbops = &minfo->fbops;
1814 minfo->fbcon.pseudo_palette = minfo->cmap;
1815 minfo->fbcon.flags = FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1816 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1822 minfo->video.len_usable &= PAGE_MASK;
1823 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1828 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1850 if (sync != -1)
1905 /* Note: mac_vmode_to_var() does not set all parameters */
1919 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1921 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1926 minfo->fbcon.var = vesafb_defined;
1927 err = -EINVAL;
1933 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1938 minfo->fbcon.device = &minfo->pcidev->dev;
1939 if (register_framebuffer(&minfo->fbcon) < 0) {
1942 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id);
1946 if (!minfo->initialized) {
1947 fb_info(&minfo->fbcon, "initializing hardware\n");
1951 fb_set_var(&minfo->fbcon, &vesafb_defined);
1957 iounmap(minfo->video.vbase.vaddr);
1959 iounmap(minfo->mmio.vbase.vaddr);
1961 release_mem_region(video_base_phys, minfo->video.len_maximum);
1976 list_add(&drv->node, &matroxfb_driver_list);
1980 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1982 p = drv->probe(minfo);
1984 minfo->drivers_data[minfo->drivers_count] = p;
1985 minfo->drivers[minfo->drivers_count++] = drv;
1994 list_del(&drv->node);
1998 for (i = 0; i < minfo->drivers_count; ) {
1999 if (minfo->drivers[i] == drv) {
2000 if (drv && drv->remove)
2001 drv->remove(minfo, minfo->drivers_data[i]);
2002 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
2003 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
2013 list_add(&minfo->next_fb, &matroxfb_list);
2016 drv = matroxfb_driver_l(drv->node.next)) {
2017 if (drv->probe) {
2018 void *p = drv->probe(minfo);
2020 minfo->drivers_data[i] = p;
2021 minfo->drivers[i++] = drv;
2027 minfo->drivers_count = i;
2033 list_del(&minfo->next_fb);
2034 for (i = 0; i < minfo->drivers_count; i++) {
2035 struct matroxfb_driver* drv = minfo->drivers[i];
2037 if (drv && drv->remove)
2038 drv->remove(minfo, minfo->drivers_data[i]);
2055 svid = pdev->subsystem_vendor;
2056 sid = pdev->subsystem_device;
2057 for (b = dev_list; b->vendor; b++) {
2058 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2059 if (b->svid)
2060 if ((b->svid != svid) || (b->sid != sid)) continue;
2064 if (!b->vendor)
2065 return -ENODEV;
2068 dev--;
2069 return -ENODEV;
2073 return -1;
2078 return -ENOMEM;
2080 minfo->pcidev = pdev;
2081 minfo->dead = 0;
2082 minfo->usecount = 0;
2083 minfo->userusecount = 0;
2087 minfo->devflags.memtype = memtype;
2088 if (memtype != -1)
2091 minfo->devflags.novga = novga;
2092 minfo->devflags.nobios = nobios;
2093 minfo->devflags.noinit = noinit;
2099 minfo->devflags.novga = 1;
2100 minfo->devflags.nobios = 1;
2101 minfo->devflags.noinit = 0;
2104 minfo->devflags.nopciretry = no_pci_retry;
2105 minfo->devflags.mga_24bpp_fix = inv24;
2106 minfo->devflags.precise_width = option_precise_width;
2107 minfo->devflags.sgram = sgram;
2108 minfo->capable.cross4MB = cross4MB;
2110 spin_lock_init(&minfo->lock.DAC);
2111 spin_lock_init(&minfo->lock.accel);
2112 init_rwsem(&minfo->crtc2.lock);
2113 init_rwsem(&minfo->altout.lock);
2114 mutex_init(&minfo->fbcon.mm_lock);
2115 minfo->irq_flags = 0;
2116 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2117 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2118 minfo->crtc1.panpos = -1;
2126 return -1;
2179 /* **************************** init-time only **************************** */
2197 /* 10-FF */
2278 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2279 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2285 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2286 if (RSptr->vesa == vesa) break;
2288 if (!RSptr->vesa) {
2293 int res = RSResolution(RSptr->info)-1;
2312 if (depth == -1)
2313 depth = RSDepth(RSptr->info);
2321 return -ENODEV;
2325 dev = -1; /* accept all new devices... */
2329 /* **************************** exit-time only **************************** */
2337 /* ************************* init in-kernel code ************************** */
2398 else if (!strncmp(this_opt, "outputs:", 8))
2399 strscpy(outputs, this_opt + 8, sizeof(outputs));
2486 return -ENODEV;
2490 return -ENXIO;
2504 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2519 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2523 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2535 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2537 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2561 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2563 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2565 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2575 module_param_string(outputs, outputs, sizeof(outputs), 0);
2576 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2589 return -ENXIO;
2605 else if (depth != -1) {
2607 depth = -1;