Lines Matching refs:cfb
109 #define cyber2000fb_writel(val, reg, cfb) writel(val, (cfb)->regs + (reg))
110 #define cyber2000fb_writew(val, reg, cfb) writew(val, (cfb)->regs + (reg))
111 #define cyber2000fb_writeb(val, reg, cfb) writeb(val, (cfb)->regs + (reg))
113 #define cyber2000fb_readb(reg, cfb) readb((cfb)->regs + (reg))
116 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
118 cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
122 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
124 cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
128 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
130 cyber2000fb_writeb(reg, 0x3ce, cfb);
131 return cyber2000fb_readb(0x3cf, cfb);
135 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
137 cyber2000fb_readb(0x3da, cfb);
138 cyber2000fb_writeb(reg, 0x3c0, cfb);
139 cyber2000fb_readb(0x3c1, cfb);
140 cyber2000fb_writeb(val, 0x3c0, cfb);
144 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
146 cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
157 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
160 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
165 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
166 cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
167 cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
170 if (cfb->fb.var.bits_per_pixel > 8)
171 col = ((u32 *)cfb->fb.pseudo_palette)[col];
172 cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
174 dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
175 if (cfb->fb.var.bits_per_pixel == 24) {
176 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
180 cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
181 cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
182 cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
183 cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
189 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
193 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
198 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
199 cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
200 cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
202 src = region->sx + region->sy * cfb->fb.var.xres_virtual;
203 dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
212 src += (region->height - 1) * cfb->fb.var.xres_virtual;
213 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
217 if (cfb->fb.var.bits_per_pixel == 24) {
218 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
222 cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
223 cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
224 cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
225 cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
227 CO_REG_CMD_H, cfb);
232 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
235 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
238 while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
241 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
267 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
268 struct fb_var_screeninfo *var = &cfb->fb.var;
272 switch (cfb->fb.fix.visual) {
293 cfb->palette[regno].red = red;
294 cfb->palette[regno].green = green;
295 cfb->palette[regno].blue = blue;
297 cyber2000fb_writeb(regno, 0x3c8, cfb);
298 cyber2000fb_writeb(red, 0x3c9, cfb);
299 cyber2000fb_writeb(green, 0x3c9, cfb);
300 cyber2000fb_writeb(blue, 0x3c9, cfb);
319 cfb->palette[regno << 2].green = green;
325 cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
326 cyber2000fb_writeb(cfb->palette[regno >> 1].red,
327 0x3c9, cfb);
328 cyber2000fb_writeb(green, 0x3c9, cfb);
329 cyber2000fb_writeb(cfb->palette[regno >> 1].blue,
330 0x3c9, cfb);
332 green = cfb->palette[regno << 3].green;
338 cfb->palette[regno << 3].red = red;
339 cfb->palette[regno << 3].green = green;
340 cfb->palette[regno << 3].blue = blue;
346 cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
347 cyber2000fb_writeb(red, 0x3c9, cfb);
348 cyber2000fb_writeb(green, 0x3c9, cfb);
349 cyber2000fb_writeb(blue, 0x3c9, cfb);
354 cfb->palette[regno << 4].red = red;
355 cfb->palette[regno << 4].green = green;
356 cfb->palette[regno << 4].blue = blue;
362 cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
363 cyber2000fb_writeb(red, 0x3c9, cfb);
364 cyber2000fb_writeb(green, 0x3c9, cfb);
365 cyber2000fb_writeb(blue, 0x3c9, cfb);
401 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
432 static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
435 unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
437 cyber2000fb_writeb(0x56, 0x3ce, cfb);
438 i = cyber2000fb_readb(0x3cf, cfb);
439 cyber2000fb_writeb(i | 4, 0x3cf, cfb);
440 cyber2000fb_writeb(val, 0x3c6, cfb);
441 cyber2000fb_writeb(i, 0x3cf, cfb);
443 cyber2000fb_readb(0x3cf, cfb);
446 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
454 cyber2000fb_writeb(i, 0x3c8, cfb);
455 cyber2000fb_writeb(0, 0x3c9, cfb);
456 cyber2000fb_writeb(0, 0x3c9, cfb);
457 cyber2000fb_writeb(0, 0x3c9, cfb);
460 cyber2000fb_writeb(0xef, 0x3c2, cfb);
461 cyber2000_crtcw(0x11, 0x0b, cfb);
462 cyber2000_attrw(0x11, 0x00, cfb);
464 cyber2000_seqw(0x00, 0x01, cfb);
465 cyber2000_seqw(0x01, 0x01, cfb);
466 cyber2000_seqw(0x02, 0x0f, cfb);
467 cyber2000_seqw(0x03, 0x00, cfb);
468 cyber2000_seqw(0x04, 0x0e, cfb);
469 cyber2000_seqw(0x00, 0x03, cfb);
472 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
475 cyber2000_crtcw(i, 0, cfb);
477 cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
478 cyber2000_grphw(0x00, 0x00, cfb);
479 cyber2000_grphw(0x01, 0x00, cfb);
480 cyber2000_grphw(0x02, 0x00, cfb);
481 cyber2000_grphw(0x03, 0x00, cfb);
482 cyber2000_grphw(0x04, 0x00, cfb);
483 cyber2000_grphw(0x05, 0x60, cfb);
484 cyber2000_grphw(0x06, 0x05, cfb);
485 cyber2000_grphw(0x07, 0x0f, cfb);
486 cyber2000_grphw(0x08, 0xff, cfb);
490 cyber2000_attrw(i, i, cfb);
492 cyber2000_attrw(0x10, 0x01, cfb);
493 cyber2000_attrw(0x11, 0x00, cfb);
494 cyber2000_attrw(0x12, 0x0f, cfb);
495 cyber2000_attrw(0x13, 0x00, cfb);
496 cyber2000_attrw(0x14, 0x00, cfb);
499 spin_lock(&cfb->reg_b0_lock);
500 cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
501 cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb);
502 cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
503 cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb);
504 cyber2000_grphw(0x90, 0x01, cfb);
505 cyber2000_grphw(0xb9, 0x80, cfb);
506 cyber2000_grphw(0xb9, 0x00, cfb);
507 spin_unlock(&cfb->reg_b0_lock);
509 cfb->ramdac_ctrl = hw->ramdac;
510 cyber2000fb_write_ramdac_ctrl(cfb);
512 cyber2000fb_writeb(0x20, 0x3c0, cfb);
513 cyber2000fb_writeb(0xff, 0x3c6, cfb);
515 cyber2000_grphw(0x14, hw->fetch, cfb);
517 ((hw->pitch >> 4) & 0x30), cfb);
518 cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
523 cyber2000fb_writew(hw->width, CO_REG_SRC_WIDTH, cfb);
524 cyber2000fb_writew(hw->width, CO_REG_DEST_WIDTH, cfb);
525 cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
529 cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
544 cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
545 cyber2000_crtcw(0x0c, base >> 8, cfb);
546 cyber2000_crtcw(0x0d, base, cfb);
552 cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
653 cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
657 const u_long ref_ps = cfb->ref_ps;
670 new_pll = pll_ps / cfb->divisors[div2];
749 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
830 if (mem > cfb->fb.fix.smem_len)
831 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
839 err = cyber2000fb_decode_clock(&hw, cfb, var);
843 err = cyber2000fb_decode_crtc(&hw, cfb, var);
852 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
853 struct fb_var_screeninfo *var = &cfb->fb.var;
916 BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
917 BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
921 if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
925 cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
934 mem = cfb->fb.fix.line_length * var->yres_virtual;
935 BUG_ON(mem > cfb->fb.fix.smem_len);
944 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
946 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
948 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
950 cyber2000fb_set_timing(cfb, &hw);
951 cyber2000fb_update_start(cfb, var);
962 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
964 if (cyber2000fb_update_start(cfb, var))
967 cfb->fb.var.xoffset = var->xoffset;
968 cfb->fb.var.yoffset = var->yoffset;
971 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
973 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
998 struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
1017 cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1021 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1023 cyber2000fb_write_ramdac_ctrl(cfb);
1031 cyber2000fb_writeb(i, 0x3c8, cfb);
1032 cyber2000fb_writeb(0, 0x3c9, cfb);
1033 cyber2000fb_writeb(0, 0x3c9, cfb);
1034 cyber2000fb_writeb(0, 0x3c9, cfb);
1038 cyber2000fb_writeb(i, 0x3c8, cfb);
1039 cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1040 cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1041 cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1047 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1049 cyber2000fb_write_ramdac_ctrl(cfb);
1080 void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1082 cfb->func_use_count += 1;
1084 if (cfb->func_use_count == 1) {
1087 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1089 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1096 void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1098 if (cfb->func_use_count == 1) {
1101 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1103 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1106 if (cfb->func_use_count == 0)
1109 cfb->func_use_count -= 1;
1120 static void cyber2000fb_enable_ddc(struct cfb_info *cfb)
1121 __acquires(&cfb->reg_b0_lock)
1123 spin_lock(&cfb->reg_b0_lock);
1124 cyber2000fb_writew(0x1bf, 0x3ce, cfb);
1127 static void cyber2000fb_disable_ddc(struct cfb_info *cfb)
1128 __releases(&cfb->reg_b0_lock)
1130 cyber2000fb_writew(0x0bf, 0x3ce, cfb);
1131 spin_unlock(&cfb->reg_b0_lock);
1137 struct cfb_info *cfb = data;
1140 cyber2000fb_enable_ddc(cfb);
1141 reg = cyber2000_grphr(DDC_REG, cfb);
1146 cyber2000_grphw(DDC_REG, reg, cfb);
1147 cyber2000fb_disable_ddc(cfb);
1152 struct cfb_info *cfb = data;
1155 cyber2000fb_enable_ddc(cfb);
1156 reg = cyber2000_grphr(DDC_REG, cfb);
1161 cyber2000_grphw(DDC_REG, reg, cfb);
1162 cyber2000fb_disable_ddc(cfb);
1167 struct cfb_info *cfb = data;
1170 cyber2000fb_enable_ddc(cfb);
1171 retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SCL_IN);
1172 cyber2000fb_disable_ddc(cfb);
1179 struct cfb_info *cfb = data;
1182 cyber2000fb_enable_ddc(cfb);
1183 retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SDA_IN);
1184 cyber2000fb_disable_ddc(cfb);
1189 static int cyber2000fb_setup_ddc_bus(struct cfb_info *cfb)
1191 strscpy(cfb->ddc_adapter.name, cfb->fb.fix.id,
1192 sizeof(cfb->ddc_adapter.name));
1193 cfb->ddc_adapter.owner = THIS_MODULE;
1194 cfb->ddc_adapter.algo_data = &cfb->ddc_algo;
1195 cfb->ddc_adapter.dev.parent = cfb->fb.device;
1196 cfb->ddc_algo.setsda = cyber2000fb_ddc_setsda;
1197 cfb->ddc_algo.setscl = cyber2000fb_ddc_setscl;
1198 cfb->ddc_algo.getsda = cyber2000fb_ddc_getsda;
1199 cfb->ddc_algo.getscl = cyber2000fb_ddc_getscl;
1200 cfb->ddc_algo.udelay = 10;
1201 cfb->ddc_algo.timeout = 20;
1202 cfb->ddc_algo.data = cfb;
1204 i2c_set_adapdata(&cfb->ddc_adapter, cfb);
1206 return i2c_bit_add_bus(&cfb->ddc_adapter);
1213 struct cfb_info *cfb = data;
1216 spin_lock(&cfb->reg_b0_lock);
1217 latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1221 cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1222 spin_unlock(&cfb->reg_b0_lock);
1227 struct cfb_info *cfb = data;
1230 spin_lock(&cfb->reg_b0_lock);
1231 latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1235 cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1236 spin_unlock(&cfb->reg_b0_lock);
1241 struct cfb_info *cfb = data;
1244 spin_lock(&cfb->reg_b0_lock);
1245 ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_DAT);
1246 spin_unlock(&cfb->reg_b0_lock);
1253 struct cfb_info *cfb = data;
1256 spin_lock(&cfb->reg_b0_lock);
1257 ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_CLK);
1258 spin_unlock(&cfb->reg_b0_lock);
1263 static int cyber2000fb_i2c_register(struct cfb_info *cfb)
1265 strscpy(cfb->i2c_adapter.name, cfb->fb.fix.id,
1266 sizeof(cfb->i2c_adapter.name));
1267 cfb->i2c_adapter.owner = THIS_MODULE;
1268 cfb->i2c_adapter.algo_data = &cfb->i2c_algo;
1269 cfb->i2c_adapter.dev.parent = cfb->fb.device;
1270 cfb->i2c_algo.setsda = cyber2000fb_i2c_setsda;
1271 cfb->i2c_algo.setscl = cyber2000fb_i2c_setscl;
1272 cfb->i2c_algo.getsda = cyber2000fb_i2c_getsda;
1273 cfb->i2c_algo.getscl = cyber2000fb_i2c_getscl;
1274 cfb->i2c_algo.udelay = 5;
1275 cfb->i2c_algo.timeout = msecs_to_jiffies(100);
1276 cfb->i2c_algo.data = cfb;
1278 return i2c_bit_add_bus(&cfb->i2c_adapter);
1281 static void cyber2000fb_i2c_unregister(struct cfb_info *cfb)
1283 i2c_del_adapter(&cfb->i2c_adapter);
1286 #define cyber2000fb_i2c_register(cfb) (0)
1287 #define cyber2000fb_i2c_unregister(cfb) do { } while (0)
1347 static void cyberpro_init_hw(struct cfb_info *cfb)
1352 cyber2000_grphw(igs_regs[i], igs_regs[i + 1], cfb);
1354 if (cfb->id == ID_CYBERPRO_5000) {
1356 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1357 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1358 cyber2000fb_writeb(val, 0x3cf, cfb);
1364 struct cfb_info *cfb;
1366 cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
1367 if (!cfb)
1371 cfb->id = id;
1374 cfb->ref_ps = 40690; /* 24.576 MHz */
1376 cfb->ref_ps = 69842; /* 14.31818 MHz (69841?) */
1378 cfb->divisors[0] = 1;
1379 cfb->divisors[1] = 2;
1380 cfb->divisors[2] = 4;
1383 cfb->divisors[3] = 8;
1385 cfb->divisors[3] = 6;
1387 strcpy(cfb->fb.fix.id, name);
1389 cfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
1390 cfb->fb.fix.type_aux = 0;
1391 cfb->fb.fix.xpanstep = 0;
1392 cfb->fb.fix.ypanstep = 1;
1393 cfb->fb.fix.ywrapstep = 0;
1397 cfb->fb.fix.accel = 0;
1401 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1405 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1409 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1413 cfb->fb.var.nonstd = 0;
1414 cfb->fb.var.activate = FB_ACTIVATE_NOW;
1415 cfb->fb.var.height = -1;
1416 cfb->fb.var.width = -1;
1417 cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1419 cfb->fb.fbops = &cyber2000fb_ops;
1420 cfb->fb.flags = FBINFO_HWACCEL_YPAN;
1421 cfb->fb.pseudo_palette = cfb->pseudo_palette;
1423 spin_lock_init(&cfb->reg_b0_lock);
1425 fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1427 return cfb;
1430 static void cyberpro_free_fb_info(struct cfb_info *cfb)
1432 if (cfb) {
1436 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1438 kfree(cfb);
1481 static int cyberpro_common_probe(struct cfb_info *cfb)
1487 cyberpro_init_hw(cfb);
1494 cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1495 cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1500 switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
1515 cfb->fb.fix.smem_len = smem_size;
1516 cfb->fb.fix.mmio_len = MMIO_SIZE;
1517 cfb->fb.screen_base = cfb->region;
1520 if (cyber2000fb_setup_ddc_bus(cfb) == 0)
1521 cfb->ddc_registered = true;
1525 if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
1527 printk(KERN_ERR "%s: no valid mode found\n", cfb->fb.fix.id);
1531 cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1532 (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1534 if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1535 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1537 /* fb_set_var(&cfb->fb.var, -1, &cfb->fb); */
1545 h_sync = 1953125000 / cfb->fb.var.pixclock;
1546 h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1547 cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1548 v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1549 cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1552 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1553 cfb->fb.var.xres, cfb->fb.var.yres,
1556 err = cyber2000fb_i2c_register(cfb);
1560 err = register_framebuffer(&cfb->fb);
1562 cyber2000fb_i2c_unregister(cfb);
1566 if (err && cfb->ddc_registered)
1567 i2c_del_adapter(&cfb->ddc_adapter);
1572 static void cyberpro_common_remove(struct cfb_info *cfb)
1574 unregister_framebuffer(&cfb->fb);
1576 if (cfb->ddc_registered)
1577 i2c_del_adapter(&cfb->ddc_adapter);
1579 cyber2000fb_i2c_unregister(cfb);
1582 static void cyberpro_common_resume(struct cfb_info *cfb)
1584 cyberpro_init_hw(cfb);
1589 cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1590 cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1596 cyber2000fb_set_par(&cfb->fb);
1609 static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1651 if (cfb->id == ID_CYBERPRO_2010) {
1653 cfb->fb.fix.id);
1655 val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1658 cfb->fb.fix.id);
1662 if (cfb->id == ID_CYBERPRO_5000)
1665 cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1675 struct cfb_info *cfb;
1690 cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1691 if (!cfb)
1694 err = pci_request_regions(dev, cfb->fb.fix.id);
1698 cfb->irq = dev->irq;
1699 cfb->region = pci_ioremap_bar(dev, 0);
1700 if (!cfb->region) {
1705 cfb->regs = cfb->region + MMIO_OFFSET;
1706 cfb->fb.device = &dev->dev;
1707 cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1708 cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1716 err = cyberpro_pci_enable_mmio(cfb);
1723 cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1724 cfb->mclk_div = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1731 cfb->mclk_mult = 0xdb;
1732 cfb->mclk_div = 0x54;
1736 err = cyberpro_common_probe(cfb);
1743 pci_set_drvdata(dev, cfb);
1745 int_cfb_info = cfb;
1750 iounmap(cfb->region);
1754 cyberpro_free_fb_info(cfb);
1762 struct cfb_info *cfb = pci_get_drvdata(dev);
1764 if (cfb) {
1765 cyberpro_common_remove(cfb);
1766 iounmap(cfb->region);
1767 cyberpro_free_fb_info(cfb);
1769 if (cfb == int_cfb_info)
1787 struct cfb_info *cfb = dev_get_drvdata(dev);
1789 if (cfb) {
1790 cyberpro_pci_enable_mmio(cfb);
1791 cyberpro_common_resume(cfb);