1 // SPDX-License-Identifier: GPL-2.0
36 #define MAX_N		255-8
60 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, tmp | CLOCK_STROBE, par);  in aty_StrobeClock()
81 			   const union aty_pll *pll, u32 bpp, u32 accel)  in aty_set_dac_514()  argument
83 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_dac_514()
124 			      u32 bpp, union aty_pll *pll)  in aty_var_to_pll_514()  argument
154 			pll->ibm514.m = RGB514_clocks[i].m;  in aty_var_to_pll_514()
155 			pll->ibm514.n = RGB514_clocks[i].n;  in aty_var_to_pll_514()
158 	return -EINVAL;  in aty_var_to_pll_514()
162 			      const union aty_pll *pll)  in aty_pll_514_to_var()  argument
164 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_pll_514_to_var()
167 	df = pll->ibm514.m >> 6;  in aty_pll_514_to_var()
168 	vco_div_count = pll->ibm514.m & 0x3f;  in aty_pll_514_to_var()
169 	ref_div_count = pll->ibm514.n;  in aty_pll_514_to_var()
171 	return ((par->ref_clk_per * ref_div_count) << (3 - df))/  in aty_pll_514_to_var()
176 			    const union aty_pll *pll)  in aty_set_pll_514()  argument
178 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_pll_514()
181 	aty_st_514(0x10, 0x01, par);	/* PLL Control 1 */  in aty_set_pll_514()
183 	aty_st_514(0x8f, 0x1f, par);	/* PLL Ref. Divider Input */  in aty_set_pll_514()
186 	aty_st_514(0x20, pll->ibm514.m, par);	/* F0 / M0 */  in aty_set_pll_514()
187 	aty_st_514(0x21, pll->ibm514.n, par);	/* F1 / N0 */  in aty_set_pll_514()
202      *  ATI 68860-B DAC
206 				  const union aty_pll *pll, u32 bpp,  in aty_set_dac_ATI68860_B()  argument
209 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_dac_ATI68860_B()
219 		    0x60 | 0x00 /*(info->mach64DAC8Bit ? 0x00 : 0x01) */ ;  in aty_set_dac_ATI68860_B()
255 	if (info->fix.smem_len < ONE_MB)  in aty_set_dac_ATI68860_B()
257 	else if (info->fix.smem_len == ONE_MB)  in aty_set_dac_ATI68860_B()
289 				 const union aty_pll *pll, u32 bpp,  in aty_set_dac_ATT21C498()  argument
292 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_dac_ATT21C498()
297 	dotClock = 100000000 / pll->ics2595.period_in_ps;  in aty_set_dac_ATT21C498()
321 	if (1 /* info->mach64DAC8Bit */ )  in aty_set_dac_ATT21C498()
342 				u32 bpp, union aty_pll *pll)  in aty_var_to_pll_18818()  argument
344 	u32 MHz100;		/* in 0.01 MHz */  in aty_var_to_pll_18818()
351 	program_bits = -1;  in aty_var_to_pll_18818()
355 		return -EINVAL;  in aty_var_to_pll_18818()
357 		return -EINVAL;  in aty_var_to_pll_18818()
370 	if (program_bits == -1) {  in aty_var_to_pll_18818()
371 		program_bits = MHz100 - N_ADJ_2595;  in aty_var_to_pll_18818()
390 	pll->ics2595.program_bits = program_bits;  in aty_var_to_pll_18818()
391 	pll->ics2595.locationAddr = 0;  in aty_var_to_pll_18818()
392 	pll->ics2595.post_divider = post_divider;  in aty_var_to_pll_18818()
393 	pll->ics2595.period_in_ps = vclk_per;  in aty_var_to_pll_18818()
399 				const union aty_pll *pll)  in aty_pll_18818_to_var()  argument
401 	return (pll->ics2595.period_in_ps);	/* default for now */  in aty_pll_18818_to_var()
410 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,  in aty_ICS2595_put1bit()
414 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (0 << 3),  in aty_ICS2595_put1bit()
420 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (1 << 3),  in aty_ICS2595_put1bit()
428 			     const union aty_pll *pll)  in aty_set_pll18818()  argument
430 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_pll18818()
440 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par);  in aty_set_pll18818()
448 	program_bits = pll->ics2595.program_bits;  in aty_set_pll18818()
449 	locationAddr = pll->ics2595.locationAddr;  in aty_set_pll18818()
452 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par);	/* Strobe = 0 */  in aty_set_pll18818()
454 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 1, par);	/* Strobe = 0 */  in aty_set_pll18818()
475 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,  in aty_set_pll18818()
479 	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,  in aty_set_pll18818()
480 		 ((pll->ics2595.locationAddr & 0x0F) | CLOCK_STROBE), par);  in aty_set_pll18818()
496 			       u32 bpp, union aty_pll *pll)  in aty_var_to_pll_1703()  argument
498 	u32 mhz100;		/* in 0.01 MHz */  in aty_var_to_pll_1703()
529 		temp -= (short) (mach64RefFreq << 1);  in aty_var_to_pll_1703()
556 	pll->ics2595.program_bits = program_bits;  in aty_var_to_pll_1703()
557 	pll->ics2595.locationAddr = 0;  in aty_var_to_pll_1703()
558 	pll->ics2595.post_divider = divider;	/* fuer nix */  in aty_var_to_pll_1703()
559 	pll->ics2595.period_in_ps = vclk_per;  in aty_var_to_pll_1703()
565 			       const union aty_pll *pll)  in aty_pll_1703_to_var()  argument
567 	return (pll->ics2595.period_in_ps);	/* default for now */  in aty_pll_1703_to_var()
571 			     const union aty_pll *pll)  in aty_set_pll_1703()  argument
573 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_pll_1703()
583 	program_bits = pll->ics2595.program_bits;  in aty_set_pll_1703()
584 	locationAddr = pll->ics2595.locationAddr;  in aty_set_pll_1703()
612 			       u32 bpp, union aty_pll *pll)  in aty_var_to_pll_8398()  argument
616 	u32 mhz100;		/* in 0.01 MHz */  in aty_var_to_pll_8398()
659 					diff = longMHz100 - fOut;  in aty_var_to_pll_8398()
661 					diff = fOut - longMHz100;  in aty_var_to_pll_8398()
674 	pll->ics2595.program_bits = program_bits;  in aty_var_to_pll_8398()
675 	pll->ics2595.locationAddr = 0;  in aty_var_to_pll_8398()
676 	pll->ics2595.post_divider = 0;  in aty_var_to_pll_8398()
677 	pll->ics2595.period_in_ps = vclk_per;  in aty_var_to_pll_8398()
683 			       const union aty_pll *pll)  in aty_pll_8398_to_var()  argument
685 	return (pll->ics2595.period_in_ps);	/* default for now */  in aty_pll_8398_to_var()
689 			     const union aty_pll *pll)  in aty_set_pll_8398()  argument
691 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_pll_8398()
702 	program_bits = pll->ics2595.program_bits;  in aty_set_pll_8398()
703 	locationAddr = pll->ics2595.locationAddr;  in aty_set_pll_8398()
735 			      u32 bpp, union aty_pll *pll)  in aty_var_to_pll_408()  argument
737 	u32 mhz100;		/* in 0.01 MHz */  in aty_var_to_pll_408()
767 		temp -= ((short) (mach64RefFreq << 1));  in aty_var_to_pll_408()
792 	pll->ics2595.program_bits = program_bits;  in aty_var_to_pll_408()
793 	pll->ics2595.locationAddr = 0;  in aty_var_to_pll_408()
794 	pll->ics2595.post_divider = divider;	/* fuer nix */  in aty_var_to_pll_408()
795 	pll->ics2595.period_in_ps = vclk_per;  in aty_var_to_pll_408()
801 			      const union aty_pll *pll)  in aty_pll_408_to_var()  argument
803 	return (pll->ics2595.period_in_ps);	/* default for now */  in aty_pll_408_to_var()
807 			    const union aty_pll *pll)  in aty_set_pll_408()  argument
809 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_pll_408()
820 	program_bits = pll->ics2595.program_bits;  in aty_set_pll_408()
821 	locationAddr = pll->ics2595.locationAddr;  in aty_set_pll_408()
882 				   const union aty_pll *pll, u32 bpp,  in aty_set_dac_unsupported()  argument
885 	struct atyfb_par *par = (struct atyfb_par *) info->par;  in aty_set_dac_unsupported()
889 	/* new in 2.2.3p1 from Geert. ???????? */  in aty_set_dac_unsupported()