Lines Matching +full:400 +full:mhz
17 #define REF_FREQ_2595 1432 /* 14.33 MHz (exact 14.31818) */
20 #define MAX_FREQ_2595 15938 /* 159.38 MHz (really 170.486) */
21 #define MIN_FREQ_2595 8000 /* 80.00 MHz ( 85.565) */
23 #define ABS_MIN_FREQ_2595 1000 /* 10.00 MHz (really 10.697) */
136 8000, (3 << 6) | 20, 9}, /* 7395 ps / 135.2273 MHz */ in aty_var_to_pll_514()
138 10000, (1 << 6) | 19, 3}, /* 9977 ps / 100.2273 MHz */ in aty_var_to_pll_514()
140 13000, (1 << 6) | 2, 3}, /* 12509 ps / 79.9432 MHz */ in aty_var_to_pll_514()
142 14000, (2 << 6) | 8, 7}, /* 13394 ps / 74.6591 MHz */ in aty_var_to_pll_514()
144 16000, (1 << 6) | 44, 6}, /* 15378 ps / 65.0284 MHz */ in aty_var_to_pll_514()
146 25000, (1 << 6) | 15, 5}, /* 17460 ps / 57.2727 MHz */ in aty_var_to_pll_514()
148 50000, (0 << 6) | 53, 7}, /* 33145 ps / 30.1705 MHz */ in aty_var_to_pll_514()
344 u32 MHz100; /* in 0.01 MHz */ in aty_var_to_pll_18818()
498 u32 mhz100; /* in 0.01 MHz */ in aty_var_to_pll_1703()
510 mach64RefFreq = REF_FREQ_2595; /* 14.32 MHz */ in aty_var_to_pll_1703()
616 u32 mhz100; /* in 0.01 MHz */ in aty_var_to_pll_8398()
737 u32 mhz100; /* in 0.01 MHz */ in aty_var_to_pll_408()
749 mach64RefFreq = REF_FREQ_2595; /* 14.32 MHz */ in aty_var_to_pll_408()
837 udelay(400); /* delay for 400 us */ in aty_set_pll_408()
858 udelay(400); /* delay for 400 us */ in aty_set_pll_408()