Lines Matching +full:control +full:- +full:parent
1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/phy/phy-sun4i-usb.h>
102 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work()
105 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work()
106 struct musb *musb = glue->musb; in sunxi_musb_work()
110 spin_lock_irqsave(&musb->lock, flags); in sunxi_musb_work()
112 devctl = readb(musb->mregs + SUNXI_MUSB_DEVCTL); in sunxi_musb_work()
113 if (test_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags)) { in sunxi_musb_work()
114 set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_work()
115 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; in sunxi_musb_work()
119 clear_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_work()
120 musb->xceiv->otg->state = OTG_STATE_B_IDLE; in sunxi_musb_work()
124 writeb(devctl, musb->mregs + SUNXI_MUSB_DEVCTL); in sunxi_musb_work()
126 spin_unlock_irqrestore(&musb->lock, flags); in sunxi_musb_work()
129 vbus_on = test_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_work()
130 phy_on = test_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags); in sunxi_musb_work()
134 phy_power_on(glue->phy); in sunxi_musb_work()
135 set_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags); in sunxi_musb_work()
137 phy_power_off(glue->phy); in sunxi_musb_work()
138 clear_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags); in sunxi_musb_work()
142 if (test_and_clear_bit(SUNXI_MUSB_FL_PHY_MODE_PEND, &glue->flags)) in sunxi_musb_work()
143 phy_set_mode(glue->phy, glue->phy_mode); in sunxi_musb_work()
148 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_set_vbus()
151 set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_set_vbus()
152 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; in sunxi_musb_set_vbus()
154 clear_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_set_vbus()
157 schedule_work(&glue->work); in sunxi_musb_set_vbus()
162 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_pre_root_reset_end()
164 sun4i_usb_phy_set_squelch_detect(glue->phy, false); in sunxi_musb_pre_root_reset_end()
169 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_post_root_reset_end()
171 sun4i_usb_phy_set_squelch_detect(glue->phy, true); in sunxi_musb_post_root_reset_end()
179 spin_lock_irqsave(&musb->lock, flags); in sunxi_musb_interrupt()
181 musb->int_usb = readb(musb->mregs + SUNXI_MUSB_INTRUSB); in sunxi_musb_interrupt()
182 if (musb->int_usb) in sunxi_musb_interrupt()
183 writeb(musb->int_usb, musb->mregs + SUNXI_MUSB_INTRUSB); in sunxi_musb_interrupt()
185 if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) { in sunxi_musb_interrupt()
187 musb_ep_select(musb->mregs, 0); in sunxi_musb_interrupt()
188 musb_writeb(musb->mregs, MUSB_FADDR, 0); in sunxi_musb_interrupt()
191 musb->int_tx = readw(musb->mregs + SUNXI_MUSB_INTRTX); in sunxi_musb_interrupt()
192 if (musb->int_tx) in sunxi_musb_interrupt()
193 writew(musb->int_tx, musb->mregs + SUNXI_MUSB_INTRTX); in sunxi_musb_interrupt()
195 musb->int_rx = readw(musb->mregs + SUNXI_MUSB_INTRRX); in sunxi_musb_interrupt()
196 if (musb->int_rx) in sunxi_musb_interrupt()
197 writew(musb->int_rx, musb->mregs + SUNXI_MUSB_INTRRX); in sunxi_musb_interrupt()
201 spin_unlock_irqrestore(&musb->lock, flags); in sunxi_musb_interrupt()
212 set_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags); in sunxi_musb_host_notifier()
214 clear_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags); in sunxi_musb_host_notifier()
216 set_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags); in sunxi_musb_host_notifier()
217 schedule_work(&glue->work); in sunxi_musb_host_notifier()
224 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_init()
228 musb->phy = glue->phy; in sunxi_musb_init()
229 musb->xceiv = glue->xceiv; in sunxi_musb_init()
231 if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags)) { in sunxi_musb_init()
232 ret = sunxi_sram_claim(musb->controller->parent); in sunxi_musb_init()
237 ret = clk_prepare_enable(glue->clk); in sunxi_musb_init()
241 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) { in sunxi_musb_init()
242 ret = reset_control_deassert(glue->rst); in sunxi_musb_init()
247 writeb(SUNXI_MUSB_VEND0_PIO_MODE, musb->mregs + SUNXI_MUSB_VEND0); in sunxi_musb_init()
250 ret = devm_extcon_register_notifier(glue->dev, glue->extcon, in sunxi_musb_init()
251 EXTCON_USB_HOST, &glue->host_nb); in sunxi_musb_init()
255 ret = phy_init(glue->phy); in sunxi_musb_init()
259 musb->isr = sunxi_musb_interrupt; in sunxi_musb_init()
261 /* Stop the musb-core from doing runtime pm (not supported on sunxi) */ in sunxi_musb_init()
262 pm_runtime_get(musb->controller); in sunxi_musb_init()
267 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) in sunxi_musb_init()
268 reset_control_assert(glue->rst); in sunxi_musb_init()
270 clk_disable_unprepare(glue->clk); in sunxi_musb_init()
272 if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags)) in sunxi_musb_init()
273 sunxi_sram_release(musb->controller->parent); in sunxi_musb_init()
279 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_exit()
281 pm_runtime_put(musb->controller); in sunxi_musb_exit()
283 cancel_work_sync(&glue->work); in sunxi_musb_exit()
284 if (test_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags)) in sunxi_musb_exit()
285 phy_power_off(glue->phy); in sunxi_musb_exit()
287 phy_exit(glue->phy); in sunxi_musb_exit()
289 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) in sunxi_musb_exit()
290 reset_control_assert(glue->rst); in sunxi_musb_exit()
292 clk_disable_unprepare(glue->clk); in sunxi_musb_exit()
293 if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags)) in sunxi_musb_exit()
294 sunxi_sram_release(musb->controller->parent); in sunxi_musb_exit()
296 devm_usb_put_phy(glue->dev, glue->xceiv); in sunxi_musb_exit()
303 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_enable()
305 glue->musb = musb; in sunxi_musb_enable()
308 if (test_and_set_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_enable()
311 schedule_work(&glue->work); in sunxi_musb_enable()
316 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_disable()
318 clear_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags); in sunxi_musb_disable()
333 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_set_mode()
347 dev_err(musb->controller->parent, in sunxi_musb_set_mode()
349 return -EINVAL; in sunxi_musb_set_mode()
352 if (glue->phy_mode == new_mode) in sunxi_musb_set_mode()
355 if (musb->port_mode != MUSB_OTG) { in sunxi_musb_set_mode()
356 dev_err(musb->controller->parent, in sunxi_musb_set_mode()
358 return -EINVAL; in sunxi_musb_set_mode()
361 if (musb->port1_status & USB_PORT_STAT_ENABLE) in sunxi_musb_set_mode()
368 glue->phy_mode = new_mode; in sunxi_musb_set_mode()
369 set_bit(SUNXI_MUSB_FL_PHY_MODE_PEND, &glue->flags); in sunxi_musb_set_mode()
370 schedule_work(&glue->work); in sunxi_musb_set_mode()
377 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent); in sunxi_musb_recover()
380 * Schedule a phy_set_mode with the current glue->phy_mode value, in sunxi_musb_recover()
383 set_bit(SUNXI_MUSB_FL_PHY_MODE_PEND, &glue->flags); in sunxi_musb_recover()
384 schedule_work(&glue->work); in sunxi_musb_recover()
391 * 0x00 - 0x17 fifo regs, 1 long per fifo
392 * 0x40 - 0x57 generic control regs (power - frame)
393 * 0x80 - 0x8f ep control regs (addressed through hw_ep->regs, indexed)
394 * 0x90 - 0x97 fifo control regs (indexed)
395 * 0x98 - 0x9f multipoint / busctl regs (indexed)
421 if (addr == sunxi_musb->mregs) { in sunxi_musb_readb()
422 /* generic control or fifo control reg access */ in sunxi_musb_readb()
443 glue = dev_get_drvdata(sunxi_musb->controller->parent); in sunxi_musb_readb()
446 &glue->flags)) in sunxi_musb_readb()
451 dev_warn(sunxi_musb->controller->parent, in sunxi_musb_readb()
452 "sunxi-musb does not have ULPI bus control register\n"); in sunxi_musb_readb()
464 dev_err(sunxi_musb->controller->parent, in sunxi_musb_readb()
468 } else if (addr == (sunxi_musb->mregs + 0x80)) { in sunxi_musb_readb()
469 /* ep control reg access */ in sunxi_musb_readb()
476 dev_err(sunxi_musb->controller->parent, in sunxi_musb_readb()
478 (int)(addr - sunxi_musb->mregs)); in sunxi_musb_readb()
484 if (addr == sunxi_musb->mregs) { in sunxi_musb_writeb()
485 /* generic control or fifo control reg access */ in sunxi_musb_writeb()
499 dev_warn(sunxi_musb->controller->parent, in sunxi_musb_writeb()
500 "sunxi-musb does not have testmode\n"); in sunxi_musb_writeb()
509 dev_warn(sunxi_musb->controller->parent, in sunxi_musb_writeb()
510 "sunxi-musb does not have ULPI bus control register\n"); in sunxi_musb_writeb()
522 dev_err(sunxi_musb->controller->parent, in sunxi_musb_writeb()
526 } else if (addr == (sunxi_musb->mregs + 0x80)) { in sunxi_musb_writeb()
527 /* ep control reg access */ in sunxi_musb_writeb()
533 dev_err(sunxi_musb->controller->parent, in sunxi_musb_writeb()
535 (int)(addr - sunxi_musb->mregs)); in sunxi_musb_writeb()
540 if (addr == sunxi_musb->mregs) { in sunxi_musb_readw()
541 /* generic control or fifo control reg access */ in sunxi_musb_readw()
560 dev_err(sunxi_musb->controller->parent, in sunxi_musb_readw()
564 } else if (addr == (sunxi_musb->mregs + 0x80)) { in sunxi_musb_readw()
565 /* ep control reg access */ in sunxi_musb_readw()
569 dev_err(sunxi_musb->controller->parent, in sunxi_musb_readw()
571 (int)(addr - sunxi_musb->mregs)); in sunxi_musb_readw()
577 if (addr == sunxi_musb->mregs) { in sunxi_musb_writew()
578 /* generic control or fifo control reg access */ in sunxi_musb_writew()
595 dev_err(sunxi_musb->controller->parent, in sunxi_musb_writew()
599 } else if (addr == (sunxi_musb->mregs + 0x80)) { in sunxi_musb_writew()
600 /* ep control reg access */ in sunxi_musb_writew()
604 dev_err(sunxi_musb->controller->parent, in sunxi_musb_writew()
606 (int)(addr - sunxi_musb->mregs)); in sunxi_musb_writew()
684 struct device_node *np = pdev->dev.of_node; in sunxi_musb_probe()
689 dev_err(&pdev->dev, "Error no device tree node found\n"); in sunxi_musb_probe()
690 return -EINVAL; in sunxi_musb_probe()
693 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); in sunxi_musb_probe()
695 return -ENOMEM; in sunxi_musb_probe()
698 switch (usb_get_dr_mode(&pdev->dev)) { in sunxi_musb_probe()
702 glue->phy_mode = PHY_MODE_USB_HOST; in sunxi_musb_probe()
708 glue->phy_mode = PHY_MODE_USB_DEVICE; in sunxi_musb_probe()
714 glue->phy_mode = PHY_MODE_USB_OTG; in sunxi_musb_probe()
718 dev_err(&pdev->dev, "Invalid or missing 'dr_mode' property\n"); in sunxi_musb_probe()
719 return -EINVAL; in sunxi_musb_probe()
723 cfg = of_device_get_match_data(&pdev->dev); in sunxi_musb_probe()
725 return -EINVAL; in sunxi_musb_probe()
727 pdata.config = cfg->hdrc_config; in sunxi_musb_probe()
729 glue->dev = &pdev->dev; in sunxi_musb_probe()
730 INIT_WORK(&glue->work, sunxi_musb_work); in sunxi_musb_probe()
731 glue->host_nb.notifier_call = sunxi_musb_host_notifier; in sunxi_musb_probe()
733 if (cfg->has_sram) in sunxi_musb_probe()
734 set_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags); in sunxi_musb_probe()
736 if (cfg->has_reset) in sunxi_musb_probe()
737 set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags); in sunxi_musb_probe()
739 if (cfg->no_configdata) in sunxi_musb_probe()
740 set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags); in sunxi_musb_probe()
742 glue->clk = devm_clk_get(&pdev->dev, NULL); in sunxi_musb_probe()
743 if (IS_ERR(glue->clk)) { in sunxi_musb_probe()
744 dev_err(&pdev->dev, "Error getting clock: %ld\n", in sunxi_musb_probe()
745 PTR_ERR(glue->clk)); in sunxi_musb_probe()
746 return PTR_ERR(glue->clk); in sunxi_musb_probe()
749 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) { in sunxi_musb_probe()
750 glue->rst = devm_reset_control_get(&pdev->dev, NULL); in sunxi_musb_probe()
751 if (IS_ERR(glue->rst)) in sunxi_musb_probe()
752 return dev_err_probe(&pdev->dev, PTR_ERR(glue->rst), in sunxi_musb_probe()
756 glue->extcon = extcon_get_edev_by_phandle(&pdev->dev, 0); in sunxi_musb_probe()
757 if (IS_ERR(glue->extcon)) in sunxi_musb_probe()
758 return dev_err_probe(&pdev->dev, PTR_ERR(glue->extcon), in sunxi_musb_probe()
761 glue->phy = devm_phy_get(&pdev->dev, "usb"); in sunxi_musb_probe()
762 if (IS_ERR(glue->phy)) in sunxi_musb_probe()
763 return dev_err_probe(&pdev->dev, PTR_ERR(glue->phy), in sunxi_musb_probe()
766 glue->usb_phy = usb_phy_generic_register(); in sunxi_musb_probe()
767 if (IS_ERR(glue->usb_phy)) { in sunxi_musb_probe()
768 dev_err(&pdev->dev, "Error registering usb-phy %ld\n", in sunxi_musb_probe()
769 PTR_ERR(glue->usb_phy)); in sunxi_musb_probe()
770 return PTR_ERR(glue->usb_phy); in sunxi_musb_probe()
773 glue->xceiv = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); in sunxi_musb_probe()
774 if (IS_ERR(glue->xceiv)) { in sunxi_musb_probe()
775 ret = PTR_ERR(glue->xceiv); in sunxi_musb_probe()
776 dev_err(&pdev->dev, "Error getting usb-phy %d\n", ret); in sunxi_musb_probe()
783 pinfo.name = "musb-hdrc"; in sunxi_musb_probe()
785 pinfo.parent = &pdev->dev; in sunxi_musb_probe()
786 pinfo.fwnode = of_fwnode_handle(pdev->dev.of_node); in sunxi_musb_probe()
788 pinfo.res = pdev->resource; in sunxi_musb_probe()
789 pinfo.num_res = pdev->num_resources; in sunxi_musb_probe()
793 glue->musb_pdev = platform_device_register_full(&pinfo); in sunxi_musb_probe()
794 if (IS_ERR(glue->musb_pdev)) { in sunxi_musb_probe()
795 ret = PTR_ERR(glue->musb_pdev); in sunxi_musb_probe()
796 dev_err(&pdev->dev, "Error registering musb dev: %d\n", ret); in sunxi_musb_probe()
803 usb_phy_generic_unregister(glue->usb_phy); in sunxi_musb_probe()
810 struct platform_device *usb_phy = glue->usb_phy; in sunxi_musb_remove()
812 platform_device_unregister(glue->musb_pdev); in sunxi_musb_remove()
846 { .compatible = "allwinner,sun4i-a10-musb",
848 { .compatible = "allwinner,sun6i-a31-musb",
850 { .compatible = "allwinner,sun8i-a33-musb",
852 { .compatible = "allwinner,sun8i-h3-musb",
854 { .compatible = "allwinner,suniv-f1c100s-musb",
864 .name = "musb-sunxi",