Lines Matching +full:toggle +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
8 * Copyright (C) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
18 #include <linux/dma-mapping.h>
24 /* MUSB HOST status 22-mar-2006
26 * - There's still lots of partial code duplication for fault paths, so
29 * - PIO mostly behaved when last tested.
36 * - DMA (CPPI) ... partially behaves, not currently recommended
41 * - DMA (Mentor/OMAP) ...has at least toggle update problems
43 * - [23-feb-2009] minimal traffic scheduling to avoid bulk RX packet
46 * - Not tested with HNP, but some SRP paths seem to behave.
48 * NOTE 24-August-2006:
50 * - Bulk traffic finally uses both sides of hardware ep1, freeing up an
53 * with "ping" where RX loses. (a) ping to davinci, even "ping -f",
54 * fine; but (b) ping _from_ davinci, even "ping -c 1", ICMP RX loses
75 return *(struct musb **) hcd->hcd_priv; in hcd_to_musb()
88 struct musb *musb = ep->musb; in musb_h_tx_flush_fifo()
89 void __iomem *epio = ep->regs; in musb_h_tx_flush_fifo()
107 * I found using a usb-ethernet device and running iperf in musb_h_tx_flush_fifo()
113 if (dev_WARN_ONCE(musb->controller, retries-- < 1, in musb_h_tx_flush_fifo()
115 ep->epnum, csr)) in musb_h_tx_flush_fifo()
123 void __iomem *epio = ep->regs; in musb_h_ep0_flush_fifo()
135 } while (--retries); in musb_h_ep0_flush_fifo()
138 ep->epnum, csr); in musb_h_ep0_flush_fifo()
153 if (ep->epnum) { in musb_h_tx_start()
154 txcsr = musb_readw(ep->regs, MUSB_TXCSR); in musb_h_tx_start()
156 musb_writew(ep->regs, MUSB_TXCSR, txcsr); in musb_h_tx_start()
159 musb_writew(ep->regs, MUSB_CSR0, txcsr); in musb_h_tx_start()
169 txcsr = musb_readw(ep->regs, MUSB_TXCSR); in musb_h_tx_dma_start()
171 if (is_cppi_enabled(ep->musb)) in musb_h_tx_dma_start()
173 musb_writew(ep->regs, MUSB_TXCSR, txcsr); in musb_h_tx_dma_start()
178 if (is_in != 0 || ep->is_shared_fifo) in musb_ep_set_qh()
179 ep->in_qh = qh; in musb_ep_set_qh()
180 if (is_in == 0 || ep->is_shared_fifo) in musb_ep_set_qh()
181 ep->out_qh = qh; in musb_ep_set_qh()
186 return is_in ? ep->in_qh : ep->out_qh; in musb_ep_get_qh()
199 void __iomem *mbase = musb->mregs; in musb_start_urb()
201 void *buf = urb->transfer_buffer; in musb_start_urb()
203 struct musb_hw_ep *hw_ep = qh->hw_ep; in musb_start_urb()
204 int epnum = hw_ep->epnum; in musb_start_urb()
207 qh->offset = 0; in musb_start_urb()
208 qh->segsize = 0; in musb_start_urb()
211 switch (qh->type) { in musb_start_urb()
215 musb->ep0_stage = MUSB_EP0_START; in musb_start_urb()
216 buf = urb->setup_packet; in musb_start_urb()
220 qh->iso_idx = 0; in musb_start_urb()
221 qh->frame = 0; in musb_start_urb()
222 offset = urb->iso_frame_desc[0].offset; in musb_start_urb()
223 len = urb->iso_frame_desc[0].length; in musb_start_urb()
227 buf = urb->transfer_buffer + urb->actual_length; in musb_start_urb()
228 len = urb->transfer_buffer_length - urb->actual_length; in musb_start_urb()
242 switch (qh->type) { in musb_start_urb()
251 * this code; and we don't init urb->start_frame... in musb_start_urb()
253 qh->frame = 0; in musb_start_urb()
256 qh->frame = urb->start_frame; in musb_start_urb()
267 hw_ep->tx_channel ? "dma" : "pio"); in musb_start_urb()
269 if (!hw_ep->tx_channel) in musb_start_urb()
278 __releases(musb->lock) in musb_giveback()
279 __acquires(musb->lock) in musb_giveback()
283 usb_hcd_unlink_urb_from_ep(musb->hcd, urb); in musb_giveback()
284 spin_unlock(&musb->lock); in musb_giveback()
285 usb_hcd_giveback_urb(musb->hcd, urb, status); in musb_giveback()
286 spin_lock(&musb->lock); in musb_giveback()
300 struct musb_hw_ep *ep = qh->hw_ep; in musb_advance_schedule()
301 int ready = qh->is_ready; in musb_advance_schedule()
303 u16 toggle; in musb_advance_schedule() local
305 status = (urb->status == -EINPROGRESS) ? 0 : urb->status; in musb_advance_schedule()
307 /* save toggle eagerly, for paranoia */ in musb_advance_schedule()
308 switch (qh->type) { in musb_advance_schedule()
311 toggle = musb->io.get_toggle(qh, !is_in); in musb_advance_schedule()
312 usb_settoggle(urb->dev, qh->epnum, !is_in, toggle ? 1 : 0); in musb_advance_schedule()
315 if (status == 0 && urb->error_count) in musb_advance_schedule()
316 status = -EXDEV; in musb_advance_schedule()
320 qh->is_ready = 0; in musb_advance_schedule()
322 qh->is_ready = ready; in musb_advance_schedule()
325 * musb->lock had been unlocked in musb_giveback, so qh may in musb_advance_schedule()
331 * invalidate qh as soon as list_empty(&hep->urb_list) in musb_advance_schedule()
333 if (qh && list_empty(&qh->hep->urb_list)) { in musb_advance_schedule()
335 struct dma_controller *dma = musb->dma_controller; in musb_advance_schedule()
338 ep->rx_reinit = 1; in musb_advance_schedule()
339 if (ep->rx_channel) { in musb_advance_schedule()
340 dma->channel_release(ep->rx_channel); in musb_advance_schedule()
341 ep->rx_channel = NULL; in musb_advance_schedule()
344 ep->tx_reinit = 1; in musb_advance_schedule()
345 if (ep->tx_channel) { in musb_advance_schedule()
346 dma->channel_release(ep->tx_channel); in musb_advance_schedule()
347 ep->tx_channel = NULL; in musb_advance_schedule()
353 qh->hep->hcpriv = NULL; in musb_advance_schedule()
355 switch (qh->type) { in musb_advance_schedule()
362 if (qh->mux == 1) { in musb_advance_schedule()
363 head = qh->ring.prev; in musb_advance_schedule()
364 list_del(&qh->ring); in musb_advance_schedule()
374 * de-allocated if it's tracked and allocated; in musb_advance_schedule()
383 if (qh != NULL && qh->is_ready) { in musb_advance_schedule()
385 hw_ep->epnum, is_in ? 'R' : 'T', next_urb(qh)); in musb_advance_schedule()
394 * leave toggle alone (may not have been saved yet) in musb_h_flush_rxfifo()
402 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
403 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
406 return musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_h_flush_rxfifo()
421 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx()
422 void __iomem *epio = hw_ep->regs; in musb_host_packet_rx()
423 struct musb_qh *qh = hw_ep->in_qh; in musb_host_packet_rx()
424 int pipe = urb->pipe; in musb_host_packet_rx()
425 void *buffer = urb->transfer_buffer; in musb_host_packet_rx()
430 urb->transfer_buffer, qh->offset, in musb_host_packet_rx()
431 urb->transfer_buffer_length); in musb_host_packet_rx()
439 status = -EILSEQ; in musb_host_packet_rx()
440 urb->error_count++; in musb_host_packet_rx()
443 d = urb->iso_frame_desc + qh->iso_idx; in musb_host_packet_rx()
444 buf = buffer + d->offset; in musb_host_packet_rx()
445 length = d->length; in musb_host_packet_rx()
448 status = -EOVERFLOW; in musb_host_packet_rx()
449 urb->error_count++; in musb_host_packet_rx()
455 urb->actual_length += length; in musb_host_packet_rx()
456 d->actual_length = length; in musb_host_packet_rx()
458 d->status = status; in musb_host_packet_rx()
461 done = (++qh->iso_idx >= urb->number_of_packets); in musb_host_packet_rx()
463 /* non-isoch */ in musb_host_packet_rx()
464 buf = buffer + qh->offset; in musb_host_packet_rx()
465 length = urb->transfer_buffer_length - qh->offset; in musb_host_packet_rx()
467 if (urb->status == -EINPROGRESS) in musb_host_packet_rx()
468 urb->status = -EOVERFLOW; in musb_host_packet_rx()
473 urb->actual_length += length; in musb_host_packet_rx()
474 qh->offset += length; in musb_host_packet_rx()
477 done = (urb->actual_length == urb->transfer_buffer_length) in musb_host_packet_rx()
478 || (rx_count < qh->maxpacket) in musb_host_packet_rx()
479 || (urb->status != -EINPROGRESS); in musb_host_packet_rx()
481 && (urb->status == -EINPROGRESS) in musb_host_packet_rx()
482 && (urb->transfer_flags & URB_SHORT_NOT_OK) in musb_host_packet_rx()
483 && (urb->actual_length in musb_host_packet_rx()
484 < urb->transfer_buffer_length)) in musb_host_packet_rx()
485 urb->status = -EREMOTEIO; in musb_host_packet_rx()
507 * to address data toggle, NYET, and DMA or PIO.
511 * the busy/not-empty tests are basically paranoia.
516 struct musb_hw_ep *ep = musb->endpoints + epnum; in musb_rx_reinit()
524 /* if programmed for Tx, put it in RX mode */ in musb_rx_reinit()
525 if (ep->is_shared_fifo) { in musb_rx_reinit()
526 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
529 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
530 musb_writew(ep->regs, MUSB_TXCSR, in musb_rx_reinit()
535 * Clear the MODE bit (and everything else) to enable Rx. in musb_rx_reinit()
539 musb_writew(ep->regs, MUSB_TXCSR, MUSB_TXCSR_DMAMODE); in musb_rx_reinit()
540 musb_writew(ep->regs, MUSB_TXCSR, 0); in musb_rx_reinit()
542 /* scrub all previous state, clearing toggle */ in musb_rx_reinit()
544 csr = musb_readw(ep->regs, MUSB_RXCSR); in musb_rx_reinit()
546 WARNING("rx%d, packet/%d ready?\n", ep->epnum, in musb_rx_reinit()
547 musb_readw(ep->regs, MUSB_RXCOUNT)); in musb_rx_reinit()
552 if (musb->is_multipoint) { in musb_rx_reinit()
553 musb_write_rxfunaddr(musb, epnum, qh->addr_reg); in musb_rx_reinit()
554 musb_write_rxhubaddr(musb, epnum, qh->h_addr_reg); in musb_rx_reinit()
555 musb_write_rxhubport(musb, epnum, qh->h_port_reg); in musb_rx_reinit()
557 musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg); in musb_rx_reinit()
560 musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg); in musb_rx_reinit()
561 musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg); in musb_rx_reinit()
564 * to disable double buffer mode. in musb_rx_reinit()
566 musb_writew(ep->regs, MUSB_RXMAXP, in musb_rx_reinit()
567 qh->maxpacket | ((qh->hb_mult - 1) << 11)); in musb_rx_reinit()
569 ep->rx_reinit = 0; in musb_rx_reinit()
574 u32 *length, u8 *mode) in musb_tx_dma_set_mode_mentor() argument
576 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_mentor()
577 void __iomem *epio = hw_ep->regs; in musb_tx_dma_set_mode_mentor()
578 u16 pkt_size = qh->maxpacket; in musb_tx_dma_set_mode_mentor()
581 if (*length > channel->max_len) in musb_tx_dma_set_mode_mentor()
582 *length = channel->max_len; in musb_tx_dma_set_mode_mentor()
586 *mode = 1; in musb_tx_dma_set_mode_mentor()
598 if (qh->hb_mult == 1 || (qh->hb_mult > 1 && in musb_tx_dma_set_mode_mentor()
599 can_bulk_split(hw_ep->musb, qh->type))) in musb_tx_dma_set_mode_mentor()
602 *mode = 0; in musb_tx_dma_set_mode_mentor()
606 channel->desired_mode = *mode; in musb_tx_dma_set_mode_mentor()
612 u8 *mode) in musb_tx_dma_set_mode_cppi_tusb() argument
614 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_cppi_tusb()
616 channel->actual_len = 0; in musb_tx_dma_set_mode_cppi_tusb()
619 * TX uses "RNDIS" mode automatically but needs help in musb_tx_dma_set_mode_cppi_tusb()
620 * to identify the zero-length-final-packet case. in musb_tx_dma_set_mode_cppi_tusb()
622 *mode = (urb->transfer_flags & URB_ZERO_PACKET) ? 1 : 0; in musb_tx_dma_set_mode_cppi_tusb()
629 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_program()
630 u16 pkt_size = qh->maxpacket; in musb_tx_dma_program()
631 u8 mode; in musb_tx_dma_program() local
633 if (musb_dma_inventra(hw_ep->musb) || musb_dma_ux500(hw_ep->musb)) in musb_tx_dma_program()
635 &length, &mode); in musb_tx_dma_program()
636 else if (is_cppi_enabled(hw_ep->musb) || tusb_dma_omap(hw_ep->musb)) in musb_tx_dma_program()
637 musb_tx_dma_set_mode_cppi_tusb(hw_ep, urb, &mode); in musb_tx_dma_program()
641 qh->segsize = length; in musb_tx_dma_program()
649 if (!dma->channel_program(channel, pkt_size, mode, in musb_tx_dma_program()
650 urb->transfer_dma + offset, length)) { in musb_tx_dma_program()
651 void __iomem *epio = hw_ep->regs; in musb_tx_dma_program()
654 dma->channel_release(channel); in musb_tx_dma_program()
655 hw_ep->tx_channel = NULL; in musb_tx_dma_program()
676 void __iomem *mbase = musb->mregs; in musb_ep_program()
677 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program()
678 void __iomem *epio = hw_ep->regs; in musb_ep_program()
680 u16 packet_sz = qh->maxpacket; in musb_ep_program()
686 is_out ? "-->" : "<--", in musb_ep_program()
687 epnum, urb, urb->dev->speed, in musb_ep_program()
688 qh->addr_reg, qh->epnum, is_out ? "out" : "in", in musb_ep_program()
689 qh->h_addr_reg, qh->h_port_reg, in musb_ep_program()
699 hw_ep->tx_channel = NULL; in musb_ep_program()
703 dma_controller = musb->dma_controller; in musb_ep_program()
705 dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel; in musb_ep_program()
707 dma_channel = dma_controller->channel_alloc( in musb_ep_program()
710 hw_ep->tx_channel = dma_channel; in musb_ep_program()
712 hw_ep->rx_channel = dma_channel; in musb_ep_program()
728 int_txe = musb->intrtxe; in musb_ep_program()
739 if (!hw_ep->tx_double_buffered) in musb_ep_program()
757 if (!hw_ep->tx_double_buffered) in musb_ep_program()
758 csr |= musb->io.set_toggle(qh, is_out, urb); in musb_ep_program()
771 if (musb->is_multipoint) { in musb_ep_program()
772 musb_write_txfunaddr(musb, epnum, qh->addr_reg); in musb_ep_program()
773 musb_write_txhubaddr(musb, epnum, qh->h_addr_reg); in musb_ep_program()
774 musb_write_txhubport(musb, epnum, qh->h_port_reg); in musb_ep_program()
777 musb_writeb(mbase, MUSB_FADDR, qh->addr_reg); in musb_ep_program()
781 musb_writeb(epio, MUSB_TXTYPE, qh->type_reg); in musb_ep_program()
782 if (can_bulk_split(musb, qh->type)) { in musb_ep_program()
783 qh->hb_mult = hw_ep->max_packet_sz_tx in musb_ep_program()
786 | ((qh->hb_mult) - 1) << 11); in musb_ep_program()
789 qh->maxpacket | in musb_ep_program()
790 ((qh->hb_mult - 1) << 11)); in musb_ep_program()
792 musb_writeb(epio, MUSB_TXINTERVAL, qh->intv_reg); in musb_ep_program()
794 musb_writeb(epio, MUSB_NAKLIMIT0, qh->intv_reg); in musb_ep_program()
795 if (musb->is_multipoint) in musb_ep_program()
797 qh->type_reg); in musb_ep_program()
800 if (can_bulk_split(musb, qh->type)) in musb_ep_program()
801 load_count = min((u32) hw_ep->max_packet_sz_tx, in musb_ep_program()
812 qh->segsize = load_count; in musb_ep_program()
814 sg_miter_start(&qh->sg_miter, urb->sg, 1, in musb_ep_program()
817 if (!sg_miter_next(&qh->sg_miter)) { in musb_ep_program()
818 dev_err(musb->controller, in musb_ep_program()
821 sg_miter_stop(&qh->sg_miter); in musb_ep_program()
824 buf = qh->sg_miter.addr + urb->sg->offset + in musb_ep_program()
825 urb->actual_length; in musb_ep_program()
827 qh->sg_miter.length); in musb_ep_program()
829 qh->sg_miter.consumed = load_count; in musb_ep_program()
830 sg_miter_stop(&qh->sg_miter); in musb_ep_program()
835 /* re-enable interrupt */ in musb_ep_program()
842 if (hw_ep->rx_reinit) { in musb_ep_program()
844 csr |= musb->io.set_toggle(qh, is_out, urb); in musb_ep_program()
846 if (qh->type == USB_ENDPOINT_XFER_INT) in musb_ep_program()
850 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
856 hw_ep->epnum, csr); in musb_ep_program()
858 /* scrub any stale state, leaving toggle alone */ in musb_ep_program()
866 dma_channel->actual_len = 0L; in musb_ep_program()
867 qh->segsize = len; in musb_ep_program()
870 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
871 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
877 dma_ok = dma_controller->channel_program(dma_channel, in musb_ep_program()
878 packet_sz, !(urb->transfer_flags & in musb_ep_program()
880 urb->transfer_dma + offset, in musb_ep_program()
881 qh->segsize); in musb_ep_program()
883 dma_controller->channel_release(dma_channel); in musb_ep_program()
884 hw_ep->rx_channel = dma_channel = NULL; in musb_ep_program()
891 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
892 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
896 /* Schedule next QH from musb->in_bulk/out_bulk and move the current qh to
904 void __iomem *mbase = musb->mregs; in musb_bulk_nak_timeout()
905 void __iomem *epio = ep->regs; in musb_bulk_nak_timeout()
908 u16 toggle; in musb_bulk_nak_timeout() local
910 musb_ep_select(mbase, ep->epnum); in musb_bulk_nak_timeout()
912 dma = is_dma_capable() ? ep->rx_channel : NULL; in musb_bulk_nak_timeout()
916 * then the NAK Timeout bit ref MUSBMHDRC USB 2.0 HIGH-SPEED in musb_bulk_nak_timeout()
917 * DUAL-ROLE CONTROLLER Programmer's Guide, section 9.2.2 in musb_bulk_nak_timeout()
926 cur_qh = first_qh(&musb->in_bulk); in musb_bulk_nak_timeout()
928 dma = is_dma_capable() ? ep->tx_channel : NULL; in musb_bulk_nak_timeout()
936 cur_qh = first_qh(&musb->out_bulk); in musb_bulk_nak_timeout()
941 dma->status = MUSB_DMA_STATUS_CORE_ABORT; in musb_bulk_nak_timeout()
942 musb->dma_controller->channel_abort(dma); in musb_bulk_nak_timeout()
943 urb->actual_length += dma->actual_len; in musb_bulk_nak_timeout()
944 dma->actual_len = 0L; in musb_bulk_nak_timeout()
946 toggle = musb->io.get_toggle(cur_qh, !is_in); in musb_bulk_nak_timeout()
947 usb_settoggle(urb->dev, cur_qh->epnum, !is_in, toggle ? 1 : 0); in musb_bulk_nak_timeout()
951 list_move_tail(&cur_qh->ring, &musb->in_bulk); in musb_bulk_nak_timeout()
953 /* get the next qh from musb->in_bulk */ in musb_bulk_nak_timeout()
954 next_qh = first_qh(&musb->in_bulk); in musb_bulk_nak_timeout()
957 ep->rx_reinit = 1; in musb_bulk_nak_timeout()
960 list_move_tail(&cur_qh->ring, &musb->out_bulk); in musb_bulk_nak_timeout()
962 /* get the next qh from musb->out_bulk */ in musb_bulk_nak_timeout()
963 next_qh = first_qh(&musb->out_bulk); in musb_bulk_nak_timeout()
966 ep->tx_reinit = 1; in musb_bulk_nak_timeout()
983 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue()
984 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_continue()
987 switch (musb->ep0_stage) { in musb_h_ep0_continue()
989 fifo_dest = urb->transfer_buffer + urb->actual_length; in musb_h_ep0_continue()
990 fifo_count = min_t(size_t, len, urb->transfer_buffer_length - in musb_h_ep0_continue()
991 urb->actual_length); in musb_h_ep0_continue()
993 urb->status = -EOVERFLOW; in musb_h_ep0_continue()
997 urb->actual_length += fifo_count; in musb_h_ep0_continue()
998 if (len < qh->maxpacket) { in musb_h_ep0_continue()
1002 } else if (urb->actual_length < in musb_h_ep0_continue()
1003 urb->transfer_buffer_length) in musb_h_ep0_continue()
1007 request = (struct usb_ctrlrequest *) urb->setup_packet; in musb_h_ep0_continue()
1009 if (!request->wLength) { in musb_h_ep0_continue()
1010 musb_dbg(musb, "start no-DATA"); in musb_h_ep0_continue()
1012 } else if (request->bRequestType & USB_DIR_IN) { in musb_h_ep0_continue()
1013 musb_dbg(musb, "start IN-DATA"); in musb_h_ep0_continue()
1014 musb->ep0_stage = MUSB_EP0_IN; in musb_h_ep0_continue()
1018 musb_dbg(musb, "start OUT-DATA"); in musb_h_ep0_continue()
1019 musb->ep0_stage = MUSB_EP0_OUT; in musb_h_ep0_continue()
1024 fifo_count = min_t(size_t, qh->maxpacket, in musb_h_ep0_continue()
1025 urb->transfer_buffer_length - in musb_h_ep0_continue()
1026 urb->actual_length); in musb_h_ep0_continue()
1028 fifo_dest = (u8 *) (urb->transfer_buffer in musb_h_ep0_continue()
1029 + urb->actual_length); in musb_h_ep0_continue()
1036 urb->actual_length += fifo_count; in musb_h_ep0_continue()
1041 ERR("bogus ep0 stage %d\n", musb->ep0_stage); in musb_h_ep0_continue()
1059 void __iomem *mbase = musb->mregs; in musb_h_ep0_irq()
1060 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq()
1061 void __iomem *epio = hw_ep->regs; in musb_h_ep0_irq()
1062 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_irq()
1076 csr, qh, len, urb, musb->ep0_stage); in musb_h_ep0_irq()
1079 if (MUSB_EP0_STATUS == musb->ep0_stage) { in musb_h_ep0_irq()
1087 status = -EPIPE; in musb_h_ep0_irq()
1091 status = -EPROTO; in musb_h_ep0_irq()
1101 * if (qh->ring.next != &musb->control), then in musb_h_ep0_irq()
1112 urb->status = status; in musb_h_ep0_irq()
1144 csr = (MUSB_EP0_IN == musb->ep0_stage) in musb_h_ep0_irq()
1148 if (usb_pipeout(urb->pipe) in musb_h_ep0_irq()
1149 || !urb->transfer_buffer_length) in musb_h_ep0_irq()
1160 musb->ep0_stage = MUSB_EP0_STATUS; in musb_h_ep0_irq()
1168 musb->ep0_stage = MUSB_EP0_IDLE; in musb_h_ep0_irq()
1181 submit_urb ->
1182 - if queue was empty, Program Endpoint
1183 - ... which starts DMA to fifo in mode 1 or 0
1185 DMA Isr (transfer complete) -> TxAvail()
1186 - Stop DMA (~DmaEnab) (<--- Alert ... currently happens
1188 - TxPktRdy has to be set in mode 0 or for
1189 short packets in mode 1.
1194 /* Service a Tx-Available or dma completion irq for the endpoint */
1202 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx()
1203 void __iomem *epio = hw_ep->regs; in musb_host_tx()
1204 struct musb_qh *qh = hw_ep->out_qh; in musb_host_tx()
1207 void __iomem *mbase = musb->mregs; in musb_host_tx()
1220 pipe = urb->pipe; in musb_host_tx()
1221 dma = is_dma_capable() ? hw_ep->tx_channel : NULL; in musb_host_tx()
1232 status = -EPIPE; in musb_host_tx()
1235 /* (NON-ISO) dma was disabled, fifo flushed */ in musb_host_tx()
1238 status = -ETIMEDOUT; in musb_host_tx()
1241 if (USB_ENDPOINT_XFER_BULK == qh->type && qh->mux == 1 in musb_host_tx()
1242 && !list_is_singular(&musb->out_bulk)) { in musb_host_tx()
1252 * if (bulk && qh->ring.next != &musb->out_bulk), then in musb_host_tx()
1266 dma->status = MUSB_DMA_STATUS_CORE_ABORT; in musb_host_tx()
1267 musb->dma_controller->channel_abort(dma); in musb_host_tx()
1298 * DMA has completed. But if we're using DMA mode 1 (multi in musb_host_tx()
1302 * switch back to mode 0 to get that interrupt; we'll come in musb_host_tx()
1310 * it being 0 at this moment -- DMA interrupt latency in musb_host_tx()
1313 * programmer's guide... :-) in musb_host_tx()
1316 * in order not to re-trigger the packet send (this bit in musb_host_tx()
1319 * double-buffered FIFO mode, so we do an extra TXCSR in musb_host_tx()
1338 * Re-read TXCSR as we have spoiled its previous value. in musb_host_tx()
1346 * only if the FIFO still has data -- that should prevent the in musb_host_tx()
1347 * "missed" TXPKTRDY interrupts and deal with double-buffered in musb_host_tx()
1348 * FIFO mode too... in musb_host_tx()
1360 length = dma->actual_len; in musb_host_tx()
1362 length = qh->segsize; in musb_host_tx()
1363 qh->offset += length; in musb_host_tx()
1368 d = urb->iso_frame_desc + qh->iso_idx; in musb_host_tx()
1369 d->actual_length = length; in musb_host_tx()
1370 d->status = status; in musb_host_tx()
1371 if (++qh->iso_idx >= urb->number_of_packets) { in musb_host_tx()
1375 offset = d->offset; in musb_host_tx()
1376 length = d->length; in musb_host_tx()
1378 } else if (dma && urb->transfer_buffer_length == qh->offset) { in musb_host_tx()
1382 if (qh->segsize < qh->maxpacket) in musb_host_tx()
1384 else if (qh->offset == urb->transfer_buffer_length in musb_host_tx()
1385 && !(urb->transfer_flags in musb_host_tx()
1389 offset = qh->offset; in musb_host_tx()
1390 length = urb->transfer_buffer_length - offset; in musb_host_tx()
1396 /* urb->status != -EINPROGRESS means request has been faulted, in musb_host_tx()
1399 if (urb->status != -EINPROGRESS) { in musb_host_tx()
1402 status = urb->status; in musb_host_tx()
1407 urb->status = status; in musb_host_tx()
1408 urb->actual_length = qh->offset; in musb_host_tx()
1412 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1426 * REVISIT: some docs say that when hw_ep->tx_double_buffered, in musb_host_tx()
1427 * (and presumably, FIFO is not half-full) we should write *two* in musb_host_tx()
1430 if (length > qh->maxpacket) in musb_host_tx()
1431 length = qh->maxpacket; in musb_host_tx()
1433 usb_hcd_unmap_urb_for_dma(musb->hcd, urb); in musb_host_tx()
1439 if (!urb->transfer_buffer) { in musb_host_tx()
1441 if (!sg_miter_next(&qh->sg_miter)) { in musb_host_tx()
1442 dev_err(musb->controller, "error: sg list empty\n"); in musb_host_tx()
1443 sg_miter_stop(&qh->sg_miter); in musb_host_tx()
1444 status = -EINVAL; in musb_host_tx()
1447 length = min_t(u32, length, qh->sg_miter.length); in musb_host_tx()
1448 musb_write_fifo(hw_ep, length, qh->sg_miter.addr); in musb_host_tx()
1449 qh->sg_miter.consumed = length; in musb_host_tx()
1450 sg_miter_stop(&qh->sg_miter); in musb_host_tx()
1452 musb_write_fifo(hw_ep, length, urb->transfer_buffer + offset); in musb_host_tx()
1455 qh->segsize = length; in musb_host_tx()
1470 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_iso_cppi41()
1471 void __iomem *epio = hw_ep->regs; in musb_rx_dma_iso_cppi41()
1476 buf = (void *)urb->iso_frame_desc[qh->iso_idx].offset + in musb_rx_dma_iso_cppi41()
1477 (u32)urb->transfer_dma; in musb_rx_dma_iso_cppi41()
1479 length = urb->iso_frame_desc[qh->iso_idx].length; in musb_rx_dma_iso_cppi41()
1483 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_rx_dma_iso_cppi41()
1485 return dma->channel_program(channel, qh->maxpacket, 0, in musb_rx_dma_iso_cppi41()
1502 submit_urb ->
1503 - if queue was empty, ProgramEndpoint
1504 - first IN token is sent out (by setting ReqPkt)
1505 LinuxIsr -> RxReady()
1507 | - Set in mode 0 (DmaEnab, ~ReqPkt)
1508 | -> DMA Isr (transfer complete) -> RxReady()
1509 | - Ack receive (~RxPktRdy), turn off DMA (~DmaEnab)
1510 | - if urb not complete, send next IN token (ReqPkt)
1513 ---------------------------
1515 * Nuances of mode 1:
1520 * difficult. Hence mode 1 is not used.
1527 * - iff URB_SHORT_NOT_OK, short RX status is -EREMOTEIO.
1529 * - overflow (full, PLUS more bytes in the terminal packet)
1531 * So for example, usb-storage sets URB_SHORT_NOT_OK, and would
1532 * thus be a great candidate for using mode 1 ... for all but the
1541 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_inventra_cppi41()
1542 void __iomem *epio = hw_ep->regs; in musb_rx_dma_inventra_cppi41()
1547 pipe = urb->pipe; in musb_rx_dma_inventra_cppi41()
1552 d = urb->iso_frame_desc + qh->iso_idx; in musb_rx_dma_inventra_cppi41()
1553 d->actual_length = len; in musb_rx_dma_inventra_cppi41()
1556 * for iso_frame_desc->length in musb_rx_dma_inventra_cppi41()
1558 if (d->status != -EILSEQ && d->status != -EOVERFLOW) in musb_rx_dma_inventra_cppi41()
1559 d->status = 0; in musb_rx_dma_inventra_cppi41()
1561 if (++qh->iso_idx >= urb->number_of_packets) { in musb_rx_dma_inventra_cppi41()
1565 if (musb_dma_cppi41(hw_ep->musb)) in musb_rx_dma_inventra_cppi41()
1573 done = (urb->actual_length + len >= in musb_rx_dma_inventra_cppi41()
1574 urb->transfer_buffer_length in musb_rx_dma_inventra_cppi41()
1575 || channel->actual_len < qh->maxpacket in musb_rx_dma_inventra_cppi41()
1576 || channel->rx_packet_done); in musb_rx_dma_inventra_cppi41()
1589 /* Disadvantage of using mode 1:
1595 * If you try to use mode 1 for (transfer_buffer_length - 512), and try
1596 * to use the extra IN token to grab the last packet using mode 0, then
1599 * such that it gets lost when RxCSR is re-set at the end of the mode 1
1601 * try to configure for mode 0 soon after the mode 1 transfer is
1612 struct musb *musb = hw_ep->musb; in musb_rx_dma_in_inventra_cppi41()
1613 void __iomem *epio = hw_ep->regs; in musb_rx_dma_in_inventra_cppi41()
1614 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_in_inventra_cppi41()
1620 pipe = urb->pipe; in musb_rx_dma_in_inventra_cppi41()
1626 d = urb->iso_frame_desc + qh->iso_idx; in musb_rx_dma_in_inventra_cppi41()
1629 d_status = -EILSEQ; in musb_rx_dma_in_inventra_cppi41()
1630 urb->error_count++; in musb_rx_dma_in_inventra_cppi41()
1632 if (rx_count > d->length) { in musb_rx_dma_in_inventra_cppi41()
1634 d_status = -EOVERFLOW; in musb_rx_dma_in_inventra_cppi41()
1635 urb->error_count++; in musb_rx_dma_in_inventra_cppi41()
1638 rx_count, d->length); in musb_rx_dma_in_inventra_cppi41()
1640 length = d->length; in musb_rx_dma_in_inventra_cppi41()
1643 d->status = d_status; in musb_rx_dma_in_inventra_cppi41()
1644 buf = urb->transfer_dma + d->offset; in musb_rx_dma_in_inventra_cppi41()
1647 buf = urb->transfer_dma + urb->actual_length; in musb_rx_dma_in_inventra_cppi41()
1650 channel->desired_mode = 0; in musb_rx_dma_in_inventra_cppi41()
1652 /* because of the issue below, mode 1 will in musb_rx_dma_in_inventra_cppi41()
1655 if ((urb->transfer_flags & URB_SHORT_NOT_OK) in musb_rx_dma_in_inventra_cppi41()
1656 && (urb->transfer_buffer_length - urb->actual_length) in musb_rx_dma_in_inventra_cppi41()
1657 > qh->maxpacket) in musb_rx_dma_in_inventra_cppi41()
1658 channel->desired_mode = 1; in musb_rx_dma_in_inventra_cppi41()
1659 if (rx_count < hw_ep->max_packet_sz_rx) { in musb_rx_dma_in_inventra_cppi41()
1661 channel->desired_mode = 0; in musb_rx_dma_in_inventra_cppi41()
1663 length = urb->transfer_buffer_length; in musb_rx_dma_in_inventra_cppi41()
1667 /* See comments above on disadvantages of using mode 1 */ in musb_rx_dma_in_inventra_cppi41()
1671 if (channel->desired_mode == 0) in musb_rx_dma_in_inventra_cppi41()
1678 if (qh->hb_mult == 1) in musb_rx_dma_in_inventra_cppi41()
1687 done = dma->channel_program(channel, qh->maxpacket, in musb_rx_dma_in_inventra_cppi41()
1688 channel->desired_mode, in musb_rx_dma_in_inventra_cppi41()
1692 dma->channel_release(channel); in musb_rx_dma_in_inventra_cppi41()
1693 hw_ep->rx_channel = NULL; in musb_rx_dma_in_inventra_cppi41()
1727 * and high-bandwidth IN transfer cases.
1732 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx()
1733 struct dma_controller *c = musb->dma_controller; in musb_host_rx()
1734 void __iomem *epio = hw_ep->regs; in musb_host_rx()
1735 struct musb_qh *qh = hw_ep->in_qh; in musb_host_rx()
1737 void __iomem *mbase = musb->mregs; in musb_host_rx()
1748 dma = is_dma_capable() ? hw_ep->rx_channel : NULL; in musb_host_rx()
1756 /* REVISIT -- THIS SHOULD NEVER HAPPEN ... but, at least in musb_host_rx()
1774 status = -EPIPE; in musb_host_rx()
1777 dev_err(musb->controller, "ep%d RX three-strikes error", epnum); in musb_host_rx()
1780 * The three-strikes error could only happen when the USB in musb_host_rx()
1782 * off. So return the fatal error -ESHUTDOWN so hopefully the in musb_host_rx()
1785 status = -ESHUTDOWN; in musb_host_rx()
1793 if (USB_ENDPOINT_XFER_ISOC != qh->type) { in musb_host_rx()
1804 if (usb_pipebulk(urb->pipe) in musb_host_rx()
1805 && qh->mux == 1 in musb_host_rx()
1806 && !list_is_singular(&musb->in_bulk)) { in musb_host_rx()
1824 status = -EPROTO; in musb_host_rx()
1831 dma->status = MUSB_DMA_STATUS_CORE_ABORT; in musb_host_rx()
1832 musb->dma_controller->channel_abort(dma); in musb_host_rx()
1833 xfer_len = dma->actual_len; in musb_host_rx()
1852 /* FIXME this is _way_ too much in-line logic for Mentor DMA */ in musb_host_rx()
1861 dma->status = MUSB_DMA_STATUS_CORE_ABORT; in musb_host_rx()
1862 musb->dma_controller->channel_abort(dma); in musb_host_rx()
1863 xfer_len = dma->actual_len; in musb_host_rx()
1877 xfer_len = dma->actual_len; in musb_host_rx()
1883 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_host_rx()
1888 musb_dbg(hw_ep->musb, in musb_host_rx()
1897 } else if (urb->status == -EINPROGRESS) { in musb_host_rx()
1900 status = -EPROTO; in musb_host_rx()
1916 musb_dbg(hw_ep->musb, in musb_host_rx()
1919 (unsigned long long) urb->transfer_dma in musb_host_rx()
1920 + urb->actual_length, in musb_host_rx()
1921 qh->offset, in musb_host_rx()
1922 urb->transfer_buffer_length); in musb_host_rx()
1928 dev_err(musb->controller, "error: rx_dma failed\n"); in musb_host_rx()
1935 usb_hcd_unmap_urb_for_dma(musb->hcd, urb); in musb_host_rx()
1941 if (!urb->transfer_buffer) { in musb_host_rx()
1942 qh->use_sg = true; in musb_host_rx()
1943 sg_miter_start(&qh->sg_miter, urb->sg, 1, in musb_host_rx()
1947 if (qh->use_sg) { in musb_host_rx()
1948 if (!sg_miter_next(&qh->sg_miter)) { in musb_host_rx()
1949 dev_err(musb->controller, "error: sg list empty\n"); in musb_host_rx()
1950 sg_miter_stop(&qh->sg_miter); in musb_host_rx()
1951 status = -EINVAL; in musb_host_rx()
1955 urb->transfer_buffer = qh->sg_miter.addr; in musb_host_rx()
1956 received_len = urb->actual_length; in musb_host_rx()
1957 qh->offset = 0x0; in musb_host_rx()
1961 received_len = urb->actual_length - in musb_host_rx()
1963 qh->sg_miter.consumed = received_len; in musb_host_rx()
1964 sg_miter_stop(&qh->sg_miter); in musb_host_rx()
1974 urb->actual_length += xfer_len; in musb_host_rx()
1975 qh->offset += xfer_len; in musb_host_rx()
1977 if (qh->use_sg) { in musb_host_rx()
1978 qh->use_sg = false; in musb_host_rx()
1979 urb->transfer_buffer = NULL; in musb_host_rx()
1982 if (urb->status == -EINPROGRESS) in musb_host_rx()
1983 urb->status = status; in musb_host_rx()
2003 u8 toggle; in musb_schedule() local
2008 if (qh->type == USB_ENDPOINT_XFER_CONTROL) { in musb_schedule()
2009 head = &musb->control; in musb_schedule()
2010 hw_ep = musb->control_ep; in musb_schedule()
2024 best_end = -1; in musb_schedule()
2026 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
2027 epnum < musb->nr_endpoints; in musb_schedule()
2034 if (hw_ep == musb->bulk_ep) in musb_schedule()
2038 diff = hw_ep->max_packet_sz_rx; in musb_schedule()
2040 diff = hw_ep->max_packet_sz_tx; in musb_schedule()
2041 diff -= (qh->maxpacket * qh->hb_mult); in musb_schedule()
2049 * a zero toggle. If the BULK transfer starts on a 1 in musb_schedule()
2050 * toggle then this transfer will fail as the mentor in musb_schedule()
2051 * controller starts the Bulk transfer on a 0 toggle in musb_schedule()
2052 * irrespective of the programming of the toggle bits in musb_schedule()
2057 hw_ep = musb->endpoints + epnum; in musb_schedule()
2058 toggle = usb_gettoggle(urb->dev, qh->epnum, !is_in); in musb_schedule()
2059 txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE) in musb_schedule()
2061 if (!is_in && (qh->type == USB_ENDPOINT_XFER_BULK) && in musb_schedule()
2062 toggle && (txtype == USB_ENDPOINT_XFER_ISOC)) in musb_schedule()
2070 if (best_end < 0 && qh->type == USB_ENDPOINT_XFER_BULK) { in musb_schedule()
2071 hw_ep = musb->bulk_ep; in musb_schedule()
2073 head = &musb->in_bulk; in musb_schedule()
2075 head = &musb->out_bulk; in musb_schedule()
2084 if (qh->dev) in musb_schedule()
2085 qh->intv_reg = in musb_schedule()
2086 (USB_SPEED_HIGH == qh->dev->speed) ? 8 : 4; in musb_schedule()
2089 dev_err(musb->controller, in musb_schedule()
2091 musb_ep_xfertype_string(qh->type), in musb_schedule()
2092 qh->hb_mult, qh->maxpacket); in musb_schedule()
2093 return -ENOSPC; in musb_schedule()
2097 qh->mux = 0; in musb_schedule()
2098 hw_ep = musb->endpoints + best_end; in musb_schedule()
2103 list_add_tail(&qh->ring, head); in musb_schedule()
2104 qh->mux = 1; in musb_schedule()
2106 qh->hw_ep = hw_ep; in musb_schedule()
2107 qh->hep->hcpriv = qh; in musb_schedule()
2120 struct usb_host_endpoint *hep = urb->ep; in musb_urb_enqueue()
2122 struct usb_endpoint_descriptor *epd = &hep->desc; in musb_urb_enqueue()
2128 if (!is_host_active(musb) || !musb->is_active) in musb_urb_enqueue()
2129 return -ENODEV; in musb_urb_enqueue()
2133 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2135 qh = ret ? NULL : hep->hcpriv; in musb_urb_enqueue()
2137 urb->hcpriv = qh; in musb_urb_enqueue()
2138 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2141 * hep->urb_list now ... so we're done, unless hep wasn't yet in musb_urb_enqueue()
2144 * REVISIT best to keep hep->hcpriv valid until the endpoint gets in musb_urb_enqueue()
2145 * disabled, testing for empty qh->ring and avoiding qh setup costs in musb_urb_enqueue()
2159 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2161 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2162 return -ENOMEM; in musb_urb_enqueue()
2165 qh->hep = hep; in musb_urb_enqueue()
2166 qh->dev = urb->dev; in musb_urb_enqueue()
2167 INIT_LIST_HEAD(&qh->ring); in musb_urb_enqueue()
2168 qh->is_ready = 1; in musb_urb_enqueue()
2170 qh->maxpacket = usb_endpoint_maxp(epd); in musb_urb_enqueue()
2171 qh->type = usb_endpoint_type(epd); in musb_urb_enqueue()
2177 qh->hb_mult = usb_endpoint_maxp_mult(epd); in musb_urb_enqueue()
2178 if (qh->hb_mult > 1) { in musb_urb_enqueue()
2179 int ok = (qh->type == USB_ENDPOINT_XFER_ISOC); in musb_urb_enqueue()
2182 ok = (usb_pipein(urb->pipe) && musb->hb_iso_rx) in musb_urb_enqueue()
2183 || (usb_pipeout(urb->pipe) && musb->hb_iso_tx); in musb_urb_enqueue()
2185 dev_err(musb->controller, in musb_urb_enqueue()
2187 musb_ep_xfertype_string(qh->type), in musb_urb_enqueue()
2188 qh->hb_mult, qh->maxpacket & 0x7ff); in musb_urb_enqueue()
2189 ret = -EMSGSIZE; in musb_urb_enqueue()
2192 qh->maxpacket &= 0x7ff; in musb_urb_enqueue()
2195 qh->epnum = usb_endpoint_num(epd); in musb_urb_enqueue()
2197 /* NOTE: urb->dev->devnum is wrong during SET_ADDRESS */ in musb_urb_enqueue()
2198 qh->addr_reg = (u8) usb_pipedevice(urb->pipe); in musb_urb_enqueue()
2201 type_reg = (qh->type << 4) | qh->epnum; in musb_urb_enqueue()
2202 switch (urb->dev->speed) { in musb_urb_enqueue()
2212 qh->type_reg = type_reg; in musb_urb_enqueue()
2215 switch (qh->type) { in musb_urb_enqueue()
2221 if (urb->dev->speed <= USB_SPEED_FULL) { in musb_urb_enqueue()
2222 interval = max_t(u8, epd->bInterval, 1); in musb_urb_enqueue()
2228 interval = min_t(u8, epd->bInterval, 16); in musb_urb_enqueue()
2235 * interval = (USB_SPEED_HIGH == urb->dev->speed) ? 16 : 2; in musb_urb_enqueue()
2247 qh->intv_reg = interval; in musb_urb_enqueue()
2250 if (musb->is_multipoint) { in musb_urb_enqueue()
2251 struct usb_device *parent = urb->dev->parent; in musb_urb_enqueue()
2253 if (parent != hcd->self.root_hub) { in musb_urb_enqueue()
2254 qh->h_addr_reg = (u8) parent->devnum; in musb_urb_enqueue()
2257 if (urb->dev->tt) { in musb_urb_enqueue()
2258 qh->h_port_reg = (u8) urb->dev->ttport; in musb_urb_enqueue()
2259 if (urb->dev->tt->hub) in musb_urb_enqueue()
2260 qh->h_addr_reg = in musb_urb_enqueue()
2261 (u8) urb->dev->tt->hub->devnum; in musb_urb_enqueue()
2262 if (urb->dev->tt->multi) in musb_urb_enqueue()
2263 qh->h_addr_reg |= 0x80; in musb_urb_enqueue()
2268 /* invariant: hep->hcpriv is null OR the qh that's already scheduled. in musb_urb_enqueue()
2272 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2273 if (hep->hcpriv || !next_urb(qh)) { in musb_urb_enqueue()
2282 epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK); in musb_urb_enqueue()
2285 urb->hcpriv = qh; in musb_urb_enqueue()
2286 /* FIXME set urb->start_frame for iso/intr, it's tested in in musb_urb_enqueue()
2290 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2294 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2296 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2310 struct musb_hw_ep *ep = qh->hw_ep; in musb_cleanup_urb()
2311 struct musb *musb = ep->musb; in musb_cleanup_urb()
2312 void __iomem *epio = ep->regs; in musb_cleanup_urb()
2313 unsigned hw_end = ep->epnum; in musb_cleanup_urb()
2314 void __iomem *regs = ep->musb->mregs; in musb_cleanup_urb()
2315 int is_in = usb_pipein(urb->pipe); in musb_cleanup_urb()
2323 dma = is_in ? ep->rx_channel : ep->tx_channel; in musb_cleanup_urb()
2325 status = ep->musb->dma_controller->channel_abort(dma); in musb_cleanup_urb()
2326 musb_dbg(musb, "abort %cX%d DMA for urb %p --> %d", in musb_cleanup_urb()
2327 is_in ? 'R' : 'T', ep->epnum, in musb_cleanup_urb()
2329 urb->actual_length += dma->actual_len; in musb_cleanup_urb()
2334 if (ep->epnum && is_in) { in musb_cleanup_urb()
2335 /* giveback saves bulk toggle */ in musb_cleanup_urb()
2340 musb_platform_clear_ep_rxintr(musb, ep->epnum); in musb_cleanup_urb()
2341 } else if (ep->epnum) { in musb_cleanup_urb()
2359 musb_advance_schedule(ep->musb, urb, ep, is_in); in musb_cleanup_urb()
2368 int is_in = usb_pipein(urb->pipe); in musb_urb_dequeue()
2373 spin_lock_irqsave(&musb->lock, flags); in musb_urb_dequeue()
2378 qh = urb->hcpriv; in musb_urb_dequeue()
2388 * Otherwise abort current transfer, pending DMA, etc.; urb->status in musb_urb_dequeue()
2392 * NOTE: qh is invalid unless !list_empty(&hep->urb_list) in musb_urb_dequeue()
2394 if (!qh->is_ready in musb_urb_dequeue()
2395 || urb->urb_list.prev != &qh->hep->urb_list in musb_urb_dequeue()
2396 || musb_ep_get_qh(qh->hw_ep, is_in) != qh) { in musb_urb_dequeue()
2397 int ready = qh->is_ready; in musb_urb_dequeue()
2399 qh->is_ready = 0; in musb_urb_dequeue()
2401 qh->is_ready = ready; in musb_urb_dequeue()
2406 if (ready && list_empty(&qh->hep->urb_list)) { in musb_urb_dequeue()
2407 musb_ep_set_qh(qh->hw_ep, is_in, NULL); in musb_urb_dequeue()
2408 qh->hep->hcpriv = NULL; in musb_urb_dequeue()
2409 list_del(&qh->ring); in musb_urb_dequeue()
2415 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_dequeue()
2423 u8 is_in = hep->desc.bEndpointAddress & USB_DIR_IN; in musb_h_disable()
2429 spin_lock_irqsave(&musb->lock, flags); in musb_h_disable()
2431 qh = hep->hcpriv; in musb_h_disable()
2435 /* NOTE: qh is invalid unless !list_empty(&hep->urb_list) */ in musb_h_disable()
2438 qh->is_ready = 0; in musb_h_disable()
2439 if (musb_ep_get_qh(qh->hw_ep, is_in) == qh) { in musb_h_disable()
2443 if (!urb->unlinked) in musb_h_disable()
2444 urb->status = -ESHUTDOWN; in musb_h_disable()
2452 while (!list_empty(&hep->urb_list)) { in musb_h_disable()
2454 urb->status = -ESHUTDOWN; in musb_h_disable()
2455 musb_advance_schedule(musb, urb, qh->hw_ep, is_in); in musb_h_disable()
2459 * other transfers, and since !qh->is_ready nothing in musb_h_disable()
2462 while (!list_empty(&hep->urb_list)) in musb_h_disable()
2463 musb_giveback(musb, next_urb(qh), -ESHUTDOWN); in musb_h_disable()
2465 hep->hcpriv = NULL; in musb_h_disable()
2466 list_del(&qh->ring); in musb_h_disable()
2470 spin_unlock_irqrestore(&musb->lock, flags); in musb_h_disable()
2477 return musb_readw(musb->mregs, MUSB_FRAME); in musb_h_get_frame_number()
2487 hcd->state = HC_STATE_RUNNING; in musb_h_start()
2488 musb->port1_status = 0; in musb_h_start()
2495 hcd->state = HC_STATE_HALT; in musb_h_stop()
2519 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_bus_suspend()
2527 if (musb->is_active) { in musb_bus_suspend()
2530 return -EBUSY; in musb_bus_suspend()
2539 if (musb->config && in musb_bus_resume()
2540 musb->config->host_port_deassert_reset_at_resume) in musb_bus_resume()
2562 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) in musb_free_temp_buffer()
2567 temp = container_of(urb->transfer_buffer, struct musb_temp_buffer, in musb_free_temp_buffer()
2571 if (usb_pipeisoc(urb->pipe)) in musb_free_temp_buffer()
2572 length = urb->transfer_buffer_length; in musb_free_temp_buffer()
2574 length = urb->actual_length; in musb_free_temp_buffer()
2576 memcpy(temp->old_xfer_buffer, temp->data, length); in musb_free_temp_buffer()
2578 urb->transfer_buffer = temp->old_xfer_buffer; in musb_free_temp_buffer()
2579 kfree(temp->kmalloc_ptr); in musb_free_temp_buffer()
2581 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; in musb_free_temp_buffer()
2591 if (urb->num_sgs || urb->sg || in musb_alloc_temp_buffer()
2592 urb->transfer_buffer_length == 0 || in musb_alloc_temp_buffer()
2593 !((uintptr_t)urb->transfer_buffer & (MUSB_USB_DMA_ALIGN - 1))) in musb_alloc_temp_buffer()
2599 kmalloc_size = urb->transfer_buffer_length + in musb_alloc_temp_buffer()
2600 sizeof(struct musb_temp_buffer) + MUSB_USB_DMA_ALIGN - 1; in musb_alloc_temp_buffer()
2604 return -ENOMEM; in musb_alloc_temp_buffer()
2610 temp->kmalloc_ptr = kmalloc_ptr; in musb_alloc_temp_buffer()
2611 temp->old_xfer_buffer = urb->transfer_buffer; in musb_alloc_temp_buffer()
2613 memcpy(temp->data, urb->transfer_buffer, in musb_alloc_temp_buffer()
2614 urb->transfer_buffer_length); in musb_alloc_temp_buffer()
2615 urb->transfer_buffer = temp->data; in musb_alloc_temp_buffer()
2617 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; in musb_alloc_temp_buffer()
2634 if (musb->hwvers < MUSB_HWVERS_1800) in musb_map_urb_for_dma()
2655 if (musb->hwvers < MUSB_HWVERS_1800) in musb_unmap_urb_for_dma()
2663 .description = "musb-hcd",
2696 struct device *dev = musb->controller; in musb_host_alloc()
2698 /* usbcore sets dev->driver_data to hcd, and sometimes uses that... */ in musb_host_alloc()
2699 musb->hcd = usb_create_hcd(&musb_hc_driver, dev, dev_name(dev)); in musb_host_alloc()
2700 if (!musb->hcd) in musb_host_alloc()
2701 return -EINVAL; in musb_host_alloc()
2703 *musb->hcd->hcd_priv = (unsigned long) musb; in musb_host_alloc()
2704 musb->hcd->self.uses_pio_for_control = 1; in musb_host_alloc()
2705 musb->hcd->uses_new_polling = 1; in musb_host_alloc()
2706 musb->hcd->has_tt = 1; in musb_host_alloc()
2713 if (musb->port_mode == MUSB_PERIPHERAL) in musb_host_cleanup()
2715 usb_remove_hcd(musb->hcd); in musb_host_cleanup()
2720 usb_put_hcd(musb->hcd); in musb_host_free()
2726 struct usb_hcd *hcd = musb->hcd; in musb_host_setup()
2728 if (musb->port_mode == MUSB_HOST) { in musb_host_setup()
2733 if (musb->xceiv) { in musb_host_setup()
2734 otg_set_host(musb->xceiv->otg, &hcd->self); in musb_host_setup()
2735 musb->xceiv->otg->host = &hcd->self; in musb_host_setup()
2737 phy_set_mode(musb->phy, PHY_MODE_USB_HOST); in musb_host_setup()
2741 hcd->self.otg_port = 0; in musb_host_setup()
2742 hcd->power_budget = 2 * (power_budget ? : 250); in musb_host_setup()
2743 hcd->skip_phy_initialization = 1; in musb_host_setup()
2749 device_wakeup_enable(hcd->self.controller); in musb_host_setup()
2755 usb_hcd_resume_root_hub(musb->hcd); in musb_host_resume_root_hub()
2761 if (musb->hcd->status_urb) in musb_host_poke_root_hub()
2762 usb_hcd_poll_rh_status(musb->hcd); in musb_host_poke_root_hub()
2764 usb_hcd_resume_root_hub(musb->hcd); in musb_host_poke_root_hub()