Lines Matching full:ep0
180 /* Clear EP0 and Tx/Rx EPn interrupts status */ in mtu3_intr_status_clear()
307 /* set/clear the stall and toggle bits for non-ep0 */
403 /* for non-ep0 */
505 /* for non-ep0 */
531 * 1. when device IP supports SS, the fifo of EP0, TX EPs, RX EPs
535 * the total fifo size of non-ep0, and ep0's is fixed to 64B,
537 * Due to the first 64B should be reserved for EP0, non-ep0's fifo
582 u32 maxpacket = mtu->g.ep0->maxpacket; in mtu3_ep0_setup()
593 /* Enable EP0 interrupt */ in mtu3_ep0_setup()
614 /* one for ep0, another is reserved */ in mtu3_mem_alloc()
623 /* ep0 uses in_eps[0], out_eps[0] is reserved */ in mtu3_mem_alloc()
624 mtu->ep0 = mtu->in_eps; in mtu3_mem_alloc()
625 mtu->ep0->mtu = mtu; in mtu3_mem_alloc()
626 mtu->ep0->epnum = 0; in mtu3_mem_alloc()
721 mtu->g.ep0->maxpacket = maxpkt; in mtu3_link_isr()