1342 #define SETIREG(r, i, d) sisusb_setidxreg(sisusb, r, i, d)  macro
1360 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1362 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1365 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1367 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1369 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1371 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1373 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1375 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1377 		ret |= SETIREG(SISSR, 0x16, tmp8);  in sisusb_triggersr16()
1393 	ret |= SETIREG(SISSR, 0x13, 0x00);  in sisusb_getbuswidth()
1396 		ret |= SETIREG(SISSR, 0x14, 0x12);  in sisusb_getbuswidth()
1399 		ret |= SETIREG(SISSR, 0x14, 0x02);  in sisusb_getbuswidth()
1459 				ret |= SETIREG(SISSR, 0x14, 0x00);  in sisusb_getbuswidth()
1465 			ret |= SETIREG(SISSR, 0x14, 0x03);  in sisusb_getbuswidth()
1487 					ret |= SETIREG(SISSR, 0x14, 0x01);  in sisusb_getbuswidth()
1511 			ret |= SETIREG(SISSR, 0x21, tmp1);  in sisusb_verify_mclk()
1547 	ret = SETIREG(SISSR, 0x14, tmp);  in sisusb_set_rank()
1723 	SETIREG(SISCR, 0x63, cr63 & 0xbf);  in sisusb_set_default_mode()
1727 	SETIREG(SISSR, 0x00, 0x03);	/* seq */  in sisusb_set_default_mode()
1728 	SETIREG(SISSR, 0x01, 0x21);  in sisusb_set_default_mode()
1729 	SETIREG(SISSR, 0x02, 0x0f);  in sisusb_set_default_mode()
1730 	SETIREG(SISSR, 0x03, 0x00);  in sisusb_set_default_mode()
1731 	SETIREG(SISSR, 0x04, 0x0e);  in sisusb_set_default_mode()
1734 		SETIREG(SISCR, i, crtcrdata[i]);  in sisusb_set_default_mode()
1748 		SETIREG(SISGR, i, grcdata[i]);  in sisusb_set_default_mode()
1752 		SETIREG(SISSR, i, 0x00);  in sisusb_set_default_mode()
1756 	SETIREG(SISCR, 0x11, 0x00);	/* crtc */  in sisusb_set_default_mode()
1758 		SETIREG(SISCR, j, crtcdata[i]);  in sisusb_set_default_mode()
1761 		SETIREG(SISCR, j, crtcdata[i]);  in sisusb_set_default_mode()
1764 		SETIREG(SISCR, j, crtcdata[i]);  in sisusb_set_default_mode()
1767 		SETIREG(SISSR, j, crtcdata[i]);  in sisusb_set_default_mode()
1769 	SETIREG(SISSR, 0x0E, (crtcdata[16] & 0xE0));  in sisusb_set_default_mode()
1771 	SETIREG(SISCR, 0x14, 0x4f);  in sisusb_set_default_mode()
1774 	SETIREG(SISCR, 0x13, (du & 0xff));  in sisusb_set_default_mode()
1777 	SETIREG(SISSR, 0x10, tmp8);  in sisusb_set_default_mode()
1778 	SETIREG(SISSR, 0x31, 0x00);	/* VCLK */  in sisusb_set_default_mode()
1779 	SETIREG(SISSR, 0x2b, 0x1b);  in sisusb_set_default_mode()
1780 	SETIREG(SISSR, 0x2c, 0xe1);  in sisusb_set_default_mode()
1781 	SETIREG(SISSR, 0x2d, 0x01);  in sisusb_set_default_mode()
1783 	SETIREG(SISSR, 0x08, 0xae);  in sisusb_set_default_mode()
1785 	SETIREG(SISSR, 0x08, 0x34);  in sisusb_set_default_mode()
1789 	SETIREG(SISCR, 0x19, 0x00);  in sisusb_set_default_mode()
1796 	SETIREG(SISCR, 0x52, 0x6c);  in sisusb_set_default_mode()
1798 	SETIREG(SISCR, 0x0d, 0x00);	/* adjust frame */  in sisusb_set_default_mode()
1799 	SETIREG(SISCR, 0x0c, 0x00);  in sisusb_set_default_mode()
1800 	SETIREG(SISSR, 0x0d, 0x00);  in sisusb_set_default_mode()
1803 	SETIREG(SISCR, 0x32, 0x20);  in sisusb_set_default_mode()
1805 	SETIREG(SISCR, 0x63, (cr63 & 0xbf));  in sisusb_set_default_mode()
1806 	SETIREG(SISSR, 0x31, (sr31 & 0xfb));  in sisusb_set_default_mode()
1809 		SETIREG(SISSR, 0x20, 0xa1);	/* enable engines */  in sisusb_set_default_mode()
1812 		SETIREG(SISSR, 0x26, 0x01);	/* disable cmdqueue */  in sisusb_set_default_mode()
1813 		SETIREG(SISSR, 0x27, 0x1f);  in sisusb_set_default_mode()
1814 		SETIREG(SISSR, 0x26, 0x00);  in sisusb_set_default_mode()
1817 	SETIREG(SISCR, 0x34, 0x44);	/* we just set std mode #44 */  in sisusb_set_default_mode()
1869 		ret |= SETIREG(SISSR, 0x05, 0x86);  in sisusb_init_gfxcore()
1875 			ret |= SETIREG(SISSR, i, 0x00);  in sisusb_init_gfxcore()
1878 			ret |= SETIREG(SISSR, i, 0x00);  in sisusb_init_gfxcore()
1881 			ret |= SETIREG(SISSR, i, 0x00);  in sisusb_init_gfxcore()
1884 			ret |= SETIREG(SISSR, i, 0x00);  in sisusb_init_gfxcore()
1887 			ret |= SETIREG(SISCR, i, 0x00);  in sisusb_init_gfxcore()
1892 		ret |= SETIREG(SISCR, 0x63, 0x80);  in sisusb_init_gfxcore()
1897 		ret |= SETIREG(SISSR, 0x28, mclktable[ramtype * 4]);  in sisusb_init_gfxcore()
1898 		ret |= SETIREG(SISSR, 0x29, mclktable[(ramtype * 4) + 1]);  in sisusb_init_gfxcore()
1899 		ret |= SETIREG(SISSR, 0x2a, mclktable[(ramtype * 4) + 2]);  in sisusb_init_gfxcore()
1901 		ret |= SETIREG(SISSR, 0x2e, eclktable[ramtype * 4]);  in sisusb_init_gfxcore()
1902 		ret |= SETIREG(SISSR, 0x2f, eclktable[(ramtype * 4) + 1]);  in sisusb_init_gfxcore()
1903 		ret |= SETIREG(SISSR, 0x30, eclktable[(ramtype * 4) + 2]);  in sisusb_init_gfxcore()
1905 		ret |= SETIREG(SISSR, 0x07, 0x18);  in sisusb_init_gfxcore()
1906 		ret |= SETIREG(SISSR, 0x11, 0x0f);  in sisusb_init_gfxcore()
1912 			ret |= SETIREG(SISSR, i,  in sisusb_init_gfxcore()
1916 			ret |= SETIREG(SISCR, i,  in sisusb_init_gfxcore()
1920 		ret |= SETIREG(SISCR, 0x49, 0xaa);  in sisusb_init_gfxcore()
1922 		ret |= SETIREG(SISSR, 0x1f, 0x00);  in sisusb_init_gfxcore()
1923 		ret |= SETIREG(SISSR, 0x20, 0xa0);  in sisusb_init_gfxcore()
1924 		ret |= SETIREG(SISSR, 0x23, 0xf6);  in sisusb_init_gfxcore()
1925 		ret |= SETIREG(SISSR, 0x24, 0x0d);  in sisusb_init_gfxcore()
1926 		ret |= SETIREG(SISSR, 0x25, 0x33);  in sisusb_init_gfxcore()
1928 		ret |= SETIREG(SISSR, 0x11, 0x0f);  in sisusb_init_gfxcore()
1937 		ret |= SETIREG(SISPART1, 0x00, 0x00);  in sisusb_init_gfxcore()
1942 		ret |= SETIREG(SISPART1, 0x02, 0x00);  in sisusb_init_gfxcore()
1943 		ret |= SETIREG(SISPART1, 0x2e, 0x08);  in sisusb_init_gfxcore()
1948 		ret |= SETIREG(SISSR, 0x25, tmp8);  in sisusb_init_gfxcore()
1950 		ret |= SETIREG(SISCR, 0x49, tmp8);  in sisusb_init_gfxcore()
1952 		ret |= SETIREG(SISSR, 0x27, 0x1f);  in sisusb_init_gfxcore()
1953 		ret |= SETIREG(SISSR, 0x31, 0x00);  in sisusb_init_gfxcore()
1954 		ret |= SETIREG(SISSR, 0x32, 0x11);  in sisusb_init_gfxcore()
1955 		ret |= SETIREG(SISSR, 0x33, 0x00);  in sisusb_init_gfxcore()
1960 		ret |= SETIREG(SISCR, 0x83, 0x00);  in sisusb_init_gfxcore()
1982 				ret |= SETIREG(SISSR, 0x14, 0x31);  in sisusb_init_gfxcore()
1988 			ret |= SETIREG(SISSR, 0x14, 0x31);  in sisusb_init_gfxcore()
1993 		ret |= SETIREG(SISSR, 0x16, ramtypetable1[4 + ramtype]);  in sisusb_init_gfxcore()
1994 		ret |= SETIREG(SISSR, 0x17, ramtypetable1[8 + ramtype]);  in sisusb_init_gfxcore()
1995 		ret |= SETIREG(SISSR, 0x19, ramtypetable1[16 + ramtype]);  in sisusb_init_gfxcore()
1999 		ret |= SETIREG(SISSR, 0x22, 0xfb);  in sisusb_init_gfxcore()
2000 		ret |= SETIREG(SISSR, 0x21, 0xa5);  in sisusb_init_gfxcore()
2011 #undef SETIREG