119 	halted = readl(&xhci->op_regs->status) & STS_HALT;  in xhci_quiesce()
123 	cmd = readl(&xhci->op_regs->command);  in xhci_quiesce()
125 	writel(cmd, &xhci->op_regs->command);  in xhci_quiesce()
143 	ret = xhci_handshake(&xhci->op_regs->status,  in xhci_halt()
164 	temp = readl(&xhci->op_regs->command);  in xhci_start()
168 	writel(temp, &xhci->op_regs->command);  in xhci_start()
174 	ret = xhci_handshake(&xhci->op_regs->status,  in xhci_start()
202 	state = readl(&xhci->op_regs->status);  in xhci_reset()
215 	command = readl(&xhci->op_regs->command);  in xhci_reset()
217 	writel(command, &xhci->op_regs->command);  in xhci_reset()
229 	ret = xhci_handshake_check_state(xhci, &xhci->op_regs->command,  in xhci_reset()
243 	ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us);  in xhci_reset()
285 	val = readl(&xhci->op_regs->command);  in xhci_zero_64b_regs()
287 	writel(val, &xhci->op_regs->command);  in xhci_zero_64b_regs()
290 	val = readl(&xhci->op_regs->status);  in xhci_zero_64b_regs()
292 	writel(val, &xhci->op_regs->status);  in xhci_zero_64b_regs()
295 	val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);  in xhci_zero_64b_regs()
297 		xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);  in xhci_zero_64b_regs()
298 	val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);  in xhci_zero_64b_regs()
300 		xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);  in xhci_zero_64b_regs()
318 	err = xhci_handshake(&xhci->op_regs->status,  in xhci_zero_64b_regs()
506 	temp = readl(&xhci->op_regs->command);  in xhci_run_finished()
508 	writel(temp, &xhci->op_regs->command);  in xhci_run_finished()
641 	temp = readl(&xhci->op_regs->status);  in xhci_stop()
642 	writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);  in xhci_stop()
650 			readl(&xhci->op_regs->status));  in xhci_stop()
697 			readl(&xhci->op_regs->status));  in xhci_shutdown()
707 	xhci->s3.command = readl(&xhci->op_regs->command);  in xhci_save_registers()
708 	xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);  in xhci_save_registers()
709 	xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);  in xhci_save_registers()
710 	xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);  in xhci_save_registers()
732 	writel(xhci->s3.command, &xhci->op_regs->command);  in xhci_restore_registers()
733 	writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);  in xhci_restore_registers()
734 	xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);  in xhci_restore_registers()
735 	writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);  in xhci_restore_registers()
756 	val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);  in xhci_set_cmd_ring_deq()
765 	xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);  in xhci_set_cmd_ring_deq()
849 	status = readl(&xhci->op_regs->status);  in xhci_pending_portevent()
928 	command = readl(&xhci->op_regs->command);  in xhci_suspend()
930 	writel(command, &xhci->op_regs->command);  in xhci_suspend()
935 	if (xhci_handshake(&xhci->op_regs->status,  in xhci_suspend()
947 	command = readl(&xhci->op_regs->command);  in xhci_suspend()
949 	writel(command, &xhci->op_regs->command);  in xhci_suspend()
951 	if (xhci_handshake(&xhci->op_regs->status,  in xhci_suspend()
962 		res = readl(&xhci->op_regs->status);  in xhci_suspend()
1033 		retval = xhci_handshake(&xhci->op_regs->status,  in xhci_resume()
1047 		command = readl(&xhci->op_regs->command);  in xhci_resume()
1049 		writel(command, &xhci->op_regs->command);  in xhci_resume()
1055 		if (xhci_handshake(&xhci->op_regs->status,  in xhci_resume()
1063 	temp = readl(&xhci->op_regs->status);  in xhci_resume()
1095 		temp = readl(&xhci->op_regs->status);  in xhci_resume()
1096 		writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);  in xhci_resume()
1103 			    readl(&xhci->op_regs->status));  in xhci_resume()
1139 	command = readl(&xhci->op_regs->command);  in xhci_resume()
1141 	writel(command, &xhci->op_regs->command);  in xhci_resume()
1142 	xhci_handshake(&xhci->op_regs->status, STS_HALT,  in xhci_resume()
1707 	temp = readl(&xhci->op_regs->status);  in xhci_urb_dequeue()
3998 	state = readl(&xhci->op_regs->status);  in xhci_disable_slot()
4298 	temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);  in xhci_setup_device()
5293 	xhci->op_regs = hcd->regs +  in xhci_gen_setup()