Lines Matching full:xhci
3 * xHCI host controller driver PCI Bus Glue.
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-pci.h"
116 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) in xhci_msix_sync_irqs() argument
118 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_msix_sync_irqs()
129 static void xhci_cleanup_msix(struct xhci_hcd *xhci) in xhci_cleanup_msix() argument
131 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_cleanup_msix()
137 free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci)); in xhci_cleanup_msix()
146 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_try_enable_msi() local
153 if (xhci->quirks & XHCI_BROKEN_MSI) in xhci_try_enable_msi()
163 * - max_interrupters: the max number of interrupts requested, capped to xhci HCSPARAMS1. in xhci_try_enable_msi()
166 xhci->nvecs = min(num_online_cpus() + 1, xhci->max_interrupters); in xhci_try_enable_msi()
169 xhci->nvecs = pci_alloc_irq_vectors(pdev, 1, xhci->nvecs, in xhci_try_enable_msi()
171 if (xhci->nvecs < 0) { in xhci_try_enable_msi()
172 xhci_dbg_trace(xhci, trace_xhci_dbg_init, in xhci_try_enable_msi()
178 xhci_to_hcd(xhci)); in xhci_try_enable_msi()
187 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable %s interrupt", in xhci_try_enable_msi()
193 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n"); in xhci_try_enable_msi()
204 xhci_err(xhci, "request interrupt %d failed\n", pdev->irq); in xhci_try_enable_msi()
226 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pci_stop() local
231 xhci_cleanup_msix(xhci); in xhci_pci_stop()
235 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) in xhci_pci_reinit() argument
245 xhci_dbg(xhci, "MWI active\n"); in xhci_pci_reinit()
247 xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); in xhci_pci_reinit()
251 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_pci_quirks() argument
261 xhci->quirks |= XHCI_RESET_EP_QUIRK; in xhci_pci_quirks()
262 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, in xhci_pci_quirks()
267 xhci->quirks |= XHCI_SLOW_SUSPEND; in xhci_pci_quirks()
268 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, in xhci_pci_quirks()
274 xhci->quirks |= XHCI_BROKEN_STREAMS; in xhci_pci_quirks()
279 xhci->quirks |= XHCI_BROKEN_MSI; in xhci_pci_quirks()
280 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, in xhci_pci_quirks()
288 xhci->quirks |= XHCI_BROKEN_STREAMS; in xhci_pci_quirks()
291 xhci->quirks |= XHCI_NEC_HOST; in xhci_pci_quirks()
302 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_9; in xhci_pci_quirks()
306 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_9; in xhci_pci_quirks()
308 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96) in xhci_pci_quirks()
309 xhci->quirks |= XHCI_AMD_0x96_HOST; in xhci_pci_quirks()
313 xhci->quirks |= XHCI_AMD_PLL_FIX; in xhci_pci_quirks()
320 xhci->quirks |= XHCI_SUSPEND_DELAY; in xhci_pci_quirks()
324 xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND; in xhci_pci_quirks()
327 xhci->quirks |= XHCI_DISABLE_SPARSE; in xhci_pci_quirks()
328 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
332 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; in xhci_pci_quirks()
339 xhci->quirks |= XHCI_U2_DISABLE_WAKE; in xhci_pci_quirks()
343 xhci->quirks |= XHCI_BROKEN_D3COLD_S2I; in xhci_pci_quirks()
346 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_pci_quirks()
347 xhci->quirks |= XHCI_INTEL_HOST; in xhci_pci_quirks()
348 xhci->quirks |= XHCI_AVOID_BEI; in xhci_pci_quirks()
352 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; in xhci_pci_quirks()
353 xhci->limit_active_eps = 64; in xhci_pci_quirks()
354 xhci->quirks |= XHCI_SW_BW_CHECKING; in xhci_pci_quirks()
358 * switch the ports from xHCI to EHCI on shutdown. We can't use in xhci_pci_quirks()
363 xhci->quirks |= XHCI_SPURIOUS_REBOOT; in xhci_pci_quirks()
368 xhci->quirks |= XHCI_SPURIOUS_REBOOT; in xhci_pci_quirks()
369 xhci->quirks |= XHCI_SPURIOUS_WAKEUP; in xhci_pci_quirks()
380 xhci->quirks |= XHCI_PME_STUCK_QUIRK; in xhci_pci_quirks()
384 xhci->quirks |= XHCI_SSIC_PORT_UNUSED; in xhci_pci_quirks()
389 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW; in xhci_pci_quirks()
396 xhci->quirks |= XHCI_MISSING_CAS; in xhci_pci_quirks()
402 xhci->quirks |= XHCI_RESET_TO_DEFAULT; in xhci_pci_quirks()
416 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; in xhci_pci_quirks()
421 xhci->quirks |= XHCI_ETRON_HOST; in xhci_pci_quirks()
422 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
423 xhci->quirks |= XHCI_BROKEN_STREAMS; in xhci_pci_quirks()
424 xhci->quirks |= XHCI_NO_SOFT_RETRY; in xhci_pci_quirks()
429 xhci->quirks |= XHCI_ZERO_64B_REGS; in xhci_pci_quirks()
433 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
434 xhci->quirks |= XHCI_ZERO_64B_REGS; in xhci_pci_quirks()
437 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
441 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
446 xhci->quirks |= XHCI_BROKEN_STREAMS; in xhci_pci_quirks()
449 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_pci_quirks()
450 xhci->quirks |= XHCI_TRB_OVERFETCH; in xhci_pci_quirks()
459 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_pci_quirks()
460 xhci->quirks |= XHCI_BROKEN_STREAMS; in xhci_pci_quirks()
464 xhci->quirks |= XHCI_NO_64BIT_SUPPORT; in xhci_pci_quirks()
470 xhci->quirks |= XHCI_NO_64BIT_SUPPORT; in xhci_pci_quirks()
474 xhci->quirks |= XHCI_ASMEDIA_MODIFY_FLOWCONTROL; in xhci_pci_quirks()
478 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
481 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7; in xhci_pci_quirks()
486 xhci->quirks |= XHCI_RESET_PLL_ON_DISCONNECT; in xhci_pci_quirks()
491 xhci->quirks |= XHCI_NO_SOFT_RETRY; in xhci_pci_quirks()
494 xhci->quirks |= XHCI_ZHAOXIN_HOST; in xhci_pci_quirks()
495 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_pci_quirks()
498 xhci->quirks |= XHCI_RESET_ON_RESUME; in xhci_pci_quirks()
499 xhci->quirks |= XHCI_TRB_OVERFETCH; in xhci_pci_quirks()
503 xhci->quirks |= XHCI_TRB_OVERFETCH; in xhci_pci_quirks()
508 xhci->quirks |= XHCI_CDNS_SCTX_QUIRK; in xhci_pci_quirks()
511 if (xhci->hci_version >= 0x120) in xhci_pci_quirks()
512 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; in xhci_pci_quirks()
514 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_pci_quirks()
515 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, in xhci_pci_quirks()
534 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_find_lpm_incapable_ports() local
535 struct xhci_hub *rhub = &xhci->usb3_rhub; in xhci_find_lpm_incapable_ports()
568 struct xhci_hcd *xhci; in xhci_pci_setup() local
573 xhci = hcd_to_xhci(hcd); in xhci_pci_setup()
576 xhci->imod_interval = 40000; in xhci_pci_setup()
585 xhci->allow_single_roothub = 1; in xhci_pci_setup()
587 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) in xhci_pci_setup()
591 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int)sbrn); in xhci_pci_setup()
594 return xhci_pci_reinit(xhci, pdev); in xhci_pci_setup()
609 * function) in order to create a second roothub under xHCI.
614 struct xhci_hcd *xhci; in xhci_pci_common_probe() local
639 xhci = hcd_to_xhci(hcd); in xhci_pci_common_probe()
640 xhci->reset = reset; in xhci_pci_common_probe()
642 if (!xhci_has_one_roothub(xhci)) { in xhci_pci_common_probe()
643 xhci->shared_hcd = usb_create_shared_hcd(&xhci_pci_hc_driver, &dev->dev, in xhci_pci_common_probe()
645 if (!xhci->shared_hcd) { in xhci_pci_common_probe()
650 retval = xhci_ext_cap_init(xhci); in xhci_pci_common_probe()
654 retval = usb_add_hcd(xhci->shared_hcd, dev->irq, IRQF_SHARED); in xhci_pci_common_probe()
658 retval = xhci_ext_cap_init(xhci); in xhci_pci_common_probe()
663 usb3_hcd = xhci_get_usb3_hcd(xhci); in xhci_pci_common_probe()
664 if (usb3_hcd && !(xhci->quirks & XHCI_BROKEN_STREAMS) && HCC_MAX_PSA(xhci->hcc_params) >= 4) in xhci_pci_common_probe()
672 else if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW) in xhci_pci_common_probe()
683 usb_put_hcd(xhci->shared_hcd); in xhci_pci_common_probe()
690 EXPORT_SYMBOL_NS_GPL(xhci_pci_common_probe, "xhci");
692 /* handled by xhci-pci-renesas if enabled */
710 struct xhci_hcd *xhci; in xhci_pci_remove() local
713 xhci = hcd_to_xhci(pci_get_drvdata(dev)); in xhci_pci_remove()
714 set_power_d3 = xhci->quirks & XHCI_SPURIOUS_WAKEUP; in xhci_pci_remove()
716 xhci->xhc_state |= XHCI_STATE_REMOVING; in xhci_pci_remove()
720 else if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW) in xhci_pci_remove()
723 if (xhci->shared_hcd) { in xhci_pci_remove()
724 usb_remove_hcd(xhci->shared_hcd); in xhci_pci_remove()
725 usb_put_hcd(xhci->shared_hcd); in xhci_pci_remove()
726 xhci->shared_hcd = NULL; in xhci_pci_remove()
735 EXPORT_SYMBOL_NS_GPL(xhci_pci_remove, "xhci");
738 * In some Intel xHCI controllers, in order to get D3 working,
740 * SSIC PORT need to be marked as "unused" before putting xHCI
742 * Without this change, xHCI might not enter D3 state.
746 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_ssic_port_unused_quirk() local
752 reg = (void __iomem *) xhci->cap_regs + in xhci_ssic_port_unused_quirk()
776 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
781 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pme_quirk() local
785 reg = (void __iomem *) xhci->cap_regs + 0x80a4; in xhci_pme_quirk()
802 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pci_suspend() local
810 if (xhci->quirks & XHCI_COMP_MODE_QUIRK) in xhci_pci_suspend()
816 xhci->quirks & (XHCI_BROKEN_D3COLD_S2I)) in xhci_pci_suspend()
820 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) in xhci_pci_suspend()
823 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED) in xhci_pci_suspend()
826 if (xhci->quirks & XHCI_DISABLE_SPARSE) in xhci_pci_suspend()
829 ret = xhci_suspend(xhci, do_wakeup); in xhci_pci_suspend()
832 xhci_msix_sync_irqs(xhci); in xhci_pci_suspend()
834 if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED)) in xhci_pci_suspend()
842 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pci_resume() local
847 reset_control_reset(xhci->reset); in xhci_pci_resume()
850 * not support xHCI natively. That means that during system resume, it in xhci_pci_resume()
854 * The BIOS is supposed to remember whether the OS had xHCI ports in xhci_pci_resume()
855 * enabled before resume, and switch the ports back to xHCI when the in xhci_pci_resume()
859 * Unconditionally switch the ports back to xHCI after a system resume. in xhci_pci_resume()
860 * It should not matter whether the EHCI or xHCI controller is in xhci_pci_resume()
861 * resumed first. It's enough to do the switchover in xHCI because in xhci_pci_resume()
864 * xHCI host controllers) have been resumed. in xhci_pci_resume()
870 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED) in xhci_pci_resume()
873 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) in xhci_pci_resume()
876 return xhci_resume(xhci, power_lost, is_auto_resume); in xhci_pci_resume()
881 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pci_poweroff_late() local
896 if (!(xhci->quirks & XHCI_RESET_TO_DEFAULT)) in xhci_pci_poweroff_late()
899 for (i = 0; i < xhci->max_ports; i++) { in xhci_pci_poweroff_late()
900 port = &xhci->hw_ports[i]; in xhci_pci_poweroff_late()
906 if (!port->slot_id || !xhci->devs[port->slot_id]) { in xhci_pci_poweroff_late()
907 xhci_err(xhci, "No dev for slot_id %d for port %d-%d in U3\n", in xhci_pci_poweroff_late()
913 udev = xhci->devs[port->slot_id]->udev; in xhci_pci_poweroff_late()
919 xhci_dbg(xhci, "port %d-%d in U3 without wakeup, disable it\n", in xhci_pci_poweroff_late()
930 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_pci_shutdown() local
934 xhci_cleanup_msix(xhci); in xhci_pci_shutdown()
937 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) in xhci_pci_shutdown()
945 /* handle any USB 3.0 xHCI controller */
985 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");