Lines Matching +full:no +full:- +full:temp +full:- +full:support

1 // SPDX-License-Identifier: GPL-2.0
18 #include "xhci-trace.h"
54 bos->bLength = USB_DT_BOS_SIZE; in xhci_create_usb3x_bos_desc()
55 bos->bDescriptorType = USB_DT_BOS; in xhci_create_usb3x_bos_desc()
56 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
58 bos->bNumDeviceCaps = 1; in xhci_create_usb3x_bos_desc()
61 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
62 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
63 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
68 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
73 if (port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
76 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
77 if ((port_cap->psi[i] & PLT_MASK) == PLT_SYM) in xhci_create_usb3x_bos_desc()
81 ssac = port_cap->psi_count + num_sym_ssa - 1; in xhci_create_usb3x_bos_desc()
82 ssic = port_cap->psi_uid_count - 1; in xhci_create_usb3x_bos_desc()
89 ssic = (ssac + 1) / 2 - 1; in xhci_create_usb3x_bos_desc()
92 bos->bNumDeviceCaps++; in xhci_create_usb3x_bos_desc()
93 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
103 ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE; in xhci_create_usb3x_bos_desc()
104 ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
105 ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE; in xhci_create_usb3x_bos_desc()
106 ss_cap->bmAttributes = 0; /* set later */ in xhci_create_usb3x_bos_desc()
107 ss_cap->wSpeedSupported = cpu_to_le16(USB_5GBPS_OPERATION); in xhci_create_usb3x_bos_desc()
108 ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION; in xhci_create_usb3x_bos_desc()
109 ss_cap->bU1devExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
110 ss_cap->bU2DevExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
112 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
114 ss_cap->bmAttributes |= USB_LTM_SUPPORT; in xhci_create_usb3x_bos_desc()
116 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
117 reg = readl(&xhci->cap_regs->hcs_params3); in xhci_create_usb3x_bos_desc()
118 ss_cap->bU1devExitLat = HCS_U1_LATENCY(reg); in xhci_create_usb3x_bos_desc()
119 ss_cap->bU2DevExitLat = cpu_to_le16(HCS_U2_LATENCY(reg)); in xhci_create_usb3x_bos_desc()
122 if (wLength < le16_to_cpu(bos->wTotalLength)) in xhci_create_usb3x_bos_desc()
126 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
130 ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); in xhci_create_usb3x_bos_desc()
131 ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
132 ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; in xhci_create_usb3x_bos_desc()
133 ssp_cap->bReserved = 0; in xhci_create_usb3x_bos_desc()
134 ssp_cap->wReserved = 0; in xhci_create_usb3x_bos_desc()
135 ssp_cap->bmAttributes = in xhci_create_usb3x_bos_desc()
139 if (!port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
141 ssp_cap->bmSublinkSpeedAttr[i] = in xhci_create_usb3x_bos_desc()
149 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
160 psi = port_cap->psi[i]; in xhci_create_usb3x_bos_desc()
201 u32 prev = port_cap->psi[i - 1]; in xhci_create_usb3x_bos_desc()
227 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
232 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
237 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
242 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
247 ssp_cap->wFunctionalitySupport = in xhci_create_usb3x_bos_desc()
253 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
259 u16 temp; in xhci_common_hub_descriptor() local
261 desc->bHubContrCurrent = 0; in xhci_common_hub_descriptor()
263 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
264 temp = 0; in xhci_common_hub_descriptor()
265 /* Bits 1:0 - support per-port power switching, or power always on */ in xhci_common_hub_descriptor()
266 if (HCC_PPC(xhci->hcc_params)) in xhci_common_hub_descriptor()
267 temp |= HUB_CHAR_INDV_PORT_LPSM; in xhci_common_hub_descriptor()
269 temp |= HUB_CHAR_NO_LPSM; in xhci_common_hub_descriptor()
270 /* Bit 2 - root hubs are not part of a compound device */ in xhci_common_hub_descriptor()
271 /* Bits 4:3 - individual port over current protection */ in xhci_common_hub_descriptor()
272 temp |= HUB_CHAR_INDV_PORT_OCPM; in xhci_common_hub_descriptor()
273 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
274 /* Bit 7 - no port indicators */ in xhci_common_hub_descriptor()
275 desc->wHubCharacteristics = cpu_to_le16(temp); in xhci_common_hub_descriptor()
283 u16 temp; in xhci_usb2_hub_descriptor() local
289 rhub = &xhci->usb2_rhub; in xhci_usb2_hub_descriptor()
290 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
292 desc->bDescriptorType = USB_DT_HUB; in xhci_usb2_hub_descriptor()
293 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
294 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; in xhci_usb2_hub_descriptor()
295 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.8 says 20ms */ in xhci_usb2_hub_descriptor()
302 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
323 memset(desc->u.hs.DeviceRemovable, 0xff, in xhci_usb2_hub_descriptor()
324 sizeof(desc->u.hs.DeviceRemovable)); in xhci_usb2_hub_descriptor()
325 memset(desc->u.hs.PortPwrCtrlMask, 0xff, in xhci_usb2_hub_descriptor()
326 sizeof(desc->u.hs.PortPwrCtrlMask)); in xhci_usb2_hub_descriptor()
329 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i], in xhci_usb2_hub_descriptor()
343 rhub = &xhci->usb3_rhub; in xhci_usb3_hub_descriptor()
344 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
346 desc->bDescriptorType = USB_DT_SS_HUB; in xhci_usb3_hub_descriptor()
347 desc->bDescLength = USB_DT_SS_HUB_SIZE; in xhci_usb3_hub_descriptor()
348 desc->bPwrOn2PwrGood = 50; /* usb 3.1 may fail if less than 100ms */ in xhci_usb3_hub_descriptor()
353 desc->u.ss.bHubHdrDecLat = 0; in xhci_usb3_hub_descriptor()
354 desc->u.ss.wHubDelay = 0; in xhci_usb3_hub_descriptor()
359 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
364 desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable); in xhci_usb3_hub_descriptor()
371 if (hcd->speed >= HCD_USB3) in xhci_hub_descriptor()
395 * connect status, over-current status, port speed, and device removable.
396 * connect status and port speed are also sticky - meaning they're in
407 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
412 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
416 * over-current, reset, link state, and L1 change
431 * xhci_port_state_to_neutral() - Clean up read portsc value back into writeable
439 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
447 /* Save read-only status and port state */ in xhci_port_state_to_neutral()
467 virt_dev = xhci->devs[slot_id]; in xhci_stop_device()
469 return -ENODEV; in xhci_stop_device()
475 return -ENOMEM; in xhci_stop_device()
477 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_device()
478 for (i = LAST_EP_INDEX; i > 0; i--) { in xhci_stop_device()
479 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) { in xhci_stop_device()
483 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, i); in xhci_stop_device()
491 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
492 ret = -ENOMEM; in xhci_stop_device()
499 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
507 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
512 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
515 wait_for_completion(cmd->completion); in xhci_stop_device()
517 if (cmd->status == COMP_COMMAND_ABORTED || in xhci_stop_device()
518 cmd->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_device()
520 ret = -ETIME; in xhci_stop_device()
537 ep = &xhci->devs[slot_id]->eps[i]; in xhci_ring_device()
539 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_ring_device()
540 for (s = 1; s < ep->stream_info->num_streams; s++) in xhci_ring_device()
542 } else if (ep->ring && ep->ring->dequeue) { in xhci_ring_device()
555 hcd = port->rhub->hcd; in xhci_disable_port()
558 if (hcd->speed >= HCD_USB3) { in xhci_disable_port()
563 if (xhci->quirks & XHCI_BROKEN_PORT_PED) { in xhci_disable_port()
569 portsc = readl(port->addr); in xhci_disable_port()
573 writel(portsc | PORT_PE, port->addr); in xhci_disable_port()
575 portsc = readl(port->addr); in xhci_disable_port()
576 xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n", in xhci_disable_port()
577 hcd->self.busnum, port->hcd_portnum + 1, portsc); in xhci_disable_port()
601 port_change_bit = "over-current"; in xhci_clear_port_change_bit()
635 if (hcd->speed >= HCD_USB3) in xhci_get_rhub()
636 return &xhci->usb3_rhub; in xhci_get_rhub()
637 return &xhci->usb2_rhub; in xhci_get_rhub()
641 * xhci_set_port_power() must be called with xhci->lock held.
642 * It will release and re-aquire the lock while calling ACPI
647 __must_hold(&xhci->lock) in xhci_set_port_power()
650 u32 temp; in xhci_set_port_power() local
652 hcd = port->rhub->hcd; in xhci_set_port_power()
653 temp = readl(port->addr); in xhci_set_port_power()
655 xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n", in xhci_set_port_power()
656 hcd->self.busnum, port->hcd_portnum + 1, on ? "ON" : "OFF", temp); in xhci_set_port_power()
658 temp = xhci_port_state_to_neutral(temp); in xhci_set_port_power()
662 writel(temp | PORT_POWER, port->addr); in xhci_set_port_power()
663 readl(port->addr); in xhci_set_port_power()
666 writel(temp & ~PORT_POWER, port->addr); in xhci_set_port_power()
669 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_set_port_power()
670 temp = usb_acpi_power_manageable(hcd->self.root_hub, in xhci_set_port_power()
671 port->hcd_portnum); in xhci_set_port_power()
672 if (temp) in xhci_set_port_power()
673 usb_acpi_set_power_state(hcd->self.root_hub, in xhci_set_port_power()
674 port->hcd_portnum, on); in xhci_set_port_power()
675 spin_lock_irqsave(&xhci->lock, *flags); in xhci_set_port_power()
681 u32 temp; in xhci_port_set_test_mode() local
685 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
686 temp = readl(port->addr + PORTPMSC); in xhci_port_set_test_mode()
687 temp |= test_mode << PORT_TEST_MODE_SHIFT; in xhci_port_set_test_mode()
688 writel(temp, port->addr + PORTPMSC); in xhci_port_set_test_mode()
689 xhci->test_mode = test_mode; in xhci_port_set_test_mode()
696 __must_hold(&xhci->lock) in xhci_enter_test_mode()
702 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_enter_test_mode()
703 for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_enter_test_mode()
704 if (!xhci->devs[i]) in xhci_enter_test_mode()
713 spin_lock_irqsave(&xhci->lock, *flags); in xhci_enter_test_mode()
717 for (i = 0; i < xhci->usb3_rhub.num_ports; i++) in xhci_enter_test_mode()
718 xhci_set_port_power(xhci, xhci->usb3_rhub.ports[i], false, flags); in xhci_enter_test_mode()
720 for (i = 0; i < xhci->usb2_rhub.num_ports; i++) in xhci_enter_test_mode()
721 xhci_set_port_power(xhci, xhci->usb2_rhub.ports[i], false, flags); in xhci_enter_test_mode()
728 pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller); in xhci_enter_test_mode()
741 if (!xhci->test_mode) { in xhci_exit_test_mode()
745 if (xhci->test_mode == USB_TEST_FORCE_ENABLE && in xhci_exit_test_mode()
746 !(xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_exit_test_mode()
751 pm_runtime_allow(xhci_to_hcd(xhci)->self.controller); in xhci_exit_test_mode()
752 xhci->test_mode = 0; in xhci_exit_test_mode()
757 * xhci_port_is_tunneled() - Check if USB3 connection is tunneled over USB4
778 /* Don't try and probe this capability for non-Intel hosts */ in xhci_port_is_tunneled()
780 if (!dev_is_pci(hcd->self.controller) || in xhci_port_is_tunneled()
781 to_pci_dev(hcd->self.controller)->vendor != PCI_VENDOR_ID_INTEL) in xhci_port_is_tunneled()
784 base = &xhci->cap_regs->hc_capbase; in xhci_port_is_tunneled()
788 offset = XHCI_INTEL_SPR_ESS_PORT_OFFSET + port->hcd_portnum * 0x20; in xhci_port_is_tunneled()
802 u32 temp; in xhci_set_link_state() local
805 portsc = readl(port->addr); in xhci_set_link_state()
806 temp = xhci_port_state_to_neutral(portsc); in xhci_set_link_state()
807 temp &= ~PORT_PLS_MASK; in xhci_set_link_state()
808 temp |= PORT_LINK_STROBE | link_state; in xhci_set_link_state()
809 writel(temp, port->addr); in xhci_set_link_state()
811 xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x", in xhci_set_link_state()
812 port->rhub->hcd->self.busnum, port->hcd_portnum + 1, in xhci_set_link_state()
813 portsc, temp); in xhci_set_link_state()
819 u32 temp; in xhci_set_remote_wake_mask() local
821 temp = readl(port->addr); in xhci_set_remote_wake_mask()
822 temp = xhci_port_state_to_neutral(temp); in xhci_set_remote_wake_mask()
825 temp |= PORT_WKCONN_E; in xhci_set_remote_wake_mask()
827 temp &= ~PORT_WKCONN_E; in xhci_set_remote_wake_mask()
830 temp |= PORT_WKDISC_E; in xhci_set_remote_wake_mask()
832 temp &= ~PORT_WKDISC_E; in xhci_set_remote_wake_mask()
835 temp |= PORT_WKOC_E; in xhci_set_remote_wake_mask()
837 temp &= ~PORT_WKOC_E; in xhci_set_remote_wake_mask()
839 writel(temp, port->addr); in xhci_set_remote_wake_mask()
846 u32 temp; in xhci_test_and_clear_bit() local
848 temp = readl(port->addr); in xhci_test_and_clear_bit()
849 if (temp & port_bit) { in xhci_test_and_clear_bit()
850 temp = xhci_port_state_to_neutral(temp); in xhci_test_and_clear_bit()
851 temp |= port_bit; in xhci_test_and_clear_bit()
852 writel(temp, port->addr); in xhci_test_and_clear_bit()
877 /* Return also connection bit - in xhci_hub_report_usb3_link_state()
899 * caused by a delay on the host-device negotiation. in xhci_hub_report_usb3_link_state()
901 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_hub_report_usb3_link_state()
920 u32 all_ports_seen_u0 = ((1 << xhci->usb3_rhub.num_ports) - 1); in xhci_del_comp_mod_timer()
923 if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK)) in xhci_del_comp_mod_timer()
926 if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) { in xhci_del_comp_mod_timer()
927 xhci->port_status_u0 |= 1 << wIndex; in xhci_del_comp_mod_timer()
928 if (xhci->port_status_u0 == all_ports_seen_u0) { in xhci_del_comp_mod_timer()
929 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_del_comp_mod_timer()
947 hcd = port->rhub->hcd; in xhci_handle_usb2_port_link_resume()
948 bus_state = &port->rhub->bus_state; in xhci_handle_usb2_port_link_resume()
950 wIndex = port->hcd_portnum; in xhci_handle_usb2_port_link_resume()
953 return -EINVAL; in xhci_handle_usb2_port_link_resume()
956 if (!port->resume_timestamp) { in xhci_handle_usb2_port_link_resume()
958 if (test_bit(wIndex, &bus_state->resuming_ports)) { in xhci_handle_usb2_port_link_resume()
972 set_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
973 port->resume_timestamp = timeout; in xhci_handle_usb2_port_link_resume()
974 mod_timer(&hcd->rh_timer, timeout); in xhci_handle_usb2_port_link_resume()
975 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
978 } else if (time_after_eq(jiffies, port->resume_timestamp)) { in xhci_handle_usb2_port_link_resume()
981 xhci_dbg(xhci, "resume USB2 port %d-%d\n", in xhci_handle_usb2_port_link_resume()
982 hcd->self.busnum, wIndex + 1); in xhci_handle_usb2_port_link_resume()
984 port->resume_timestamp = 0; in xhci_handle_usb2_port_link_resume()
985 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
987 reinit_completion(&port->rexit_done); in xhci_handle_usb2_port_link_resume()
988 port->rexit_active = true; in xhci_handle_usb2_port_link_resume()
993 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
995 &port->rexit_done, in xhci_handle_usb2_port_link_resume()
997 spin_lock_irqsave(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
1000 if (!port->slot_id) { in xhci_handle_usb2_port_link_resume()
1002 return -ENODEV; in xhci_handle_usb2_port_link_resume()
1004 xhci_ring_device(xhci, port->slot_id); in xhci_handle_usb2_port_link_resume()
1006 int port_status = readl(port->addr); in xhci_handle_usb2_port_link_resume()
1008 xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n", in xhci_handle_usb2_port_link_resume()
1009 hcd->self.busnum, wIndex + 1, port_status); in xhci_handle_usb2_port_link_resume()
1018 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
1019 bus_state->port_c_suspend |= 1 << wIndex; in xhci_handle_usb2_port_link_resume()
1020 bus_state->suspended_ports &= ~(1 << wIndex); in xhci_handle_usb2_port_link_resume()
1031 /* only support rx and tx lane counts of 1 in usb3.1 spec */ in xhci_get_ext_port_status()
1051 bus_state = &port->rhub->bus_state; in xhci_get_usb3_port_status()
1052 xhci = hcd_to_xhci(port->rhub->hcd); in xhci_get_usb3_port_status()
1053 hcd = port->rhub->hcd; in xhci_get_usb3_port_status()
1055 portnum = port->hcd_portnum; in xhci_get_usb3_port_status()
1077 /* no longer suspended or resuming */ in xhci_get_usb3_port_status()
1082 if (bus_state->port_remote_wakeup & (1 << portnum)) { in xhci_get_usb3_port_status()
1083 bus_state->port_remote_wakeup &= ~(1 << portnum); in xhci_get_usb3_port_status()
1084 usb_hcd_end_port_resume(&hcd->self, portnum); in xhci_get_usb3_port_status()
1086 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb3_port_status()
1101 bus_state = &port->rhub->bus_state; in xhci_get_usb2_port_status()
1103 portnum = port->hcd_portnum; in xhci_get_usb2_port_status()
1115 if (bus_state->suspended_ports & (1 << portnum)) { in xhci_get_usb2_port_status()
1116 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1117 bus_state->port_c_suspend |= 1 << portnum; in xhci_get_usb2_port_status()
1125 else if (port->resume_timestamp || port->rexit_active) in xhci_get_usb2_port_status()
1131 * Clear usb2 resume signalling variables if port is no longer suspended in xhci_get_usb2_port_status()
1136 if (port->resume_timestamp || in xhci_get_usb2_port_status()
1137 test_bit(portnum, &bus_state->resuming_ports)) { in xhci_get_usb2_port_status()
1138 port->resume_timestamp = 0; in xhci_get_usb2_port_status()
1139 clear_bit(portnum, &bus_state->resuming_ports); in xhci_get_usb2_port_status()
1140 usb_hcd_end_port_resume(&port->rhub->hcd->self, portnum); in xhci_get_usb2_port_status()
1142 port->rexit_active = 0; in xhci_get_usb2_port_status()
1143 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1152 * - Mark a port as being done with device resume,
1154 * - Stop the Synopsys redriver Compliance Mode polling.
1155 * - Drop and reacquire the xHCI lock, in order to wait for port resume.
1161 __releases(&xhci->lock) in xhci_get_port_status()
1162 __acquires(&xhci->lock) in xhci_get_port_status()
1169 port = rhub->ports[wIndex]; in xhci_get_port_status()
1194 if (hcd->speed >= HCD_USB3) in xhci_get_port_status()
1200 if (bus_state->port_c_suspend & (1 << wIndex)) in xhci_get_port_status()
1212 u32 temp, status; in xhci_hub_control() local
1225 ports = rhub->ports; in xhci_hub_control()
1226 max_ports = rhub->num_ports; in xhci_hub_control()
1227 bus_state = &rhub->bus_state; in xhci_hub_control()
1230 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1233 /* No power source, over-current reported per port */ in xhci_hub_control()
1241 if (hcd->speed >= HCD_USB3 && in xhci_hub_control()
1255 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1259 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1265 wIndex--; in xhci_hub_control()
1266 port = ports[portnum1 - 1]; in xhci_hub_control()
1267 temp = readl(port->addr); in xhci_hub_control()
1268 if (temp == ~(u32)0) { in xhci_hub_control()
1270 retval = -ENODEV; in xhci_hub_control()
1273 trace_xhci_get_port_status(port, temp); in xhci_hub_control()
1274 status = xhci_get_port_status(hcd, bus_state, wIndex, temp, in xhci_hub_control()
1279 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", in xhci_hub_control()
1280 hcd->self.busnum, portnum1, temp, status); in xhci_hub_control()
1287 if (hcd->speed < HCD_USB31 || wLength != 8) { in xhci_hub_control()
1289 retval = -EINVAL; in xhci_hub_control()
1292 port_li = readl(port->addr + PORTLI); in xhci_hub_control()
1293 status = xhci_get_ext_port_status(temp, port_li); in xhci_hub_control()
1311 port = ports[portnum1 - 1]; in xhci_hub_control()
1312 wIndex--; in xhci_hub_control()
1313 temp = readl(port->addr); in xhci_hub_control()
1314 if (temp == ~(u32)0) { in xhci_hub_control()
1316 retval = -ENODEV; in xhci_hub_control()
1319 temp = xhci_port_state_to_neutral(temp); in xhci_hub_control()
1320 /* FIXME: What new port features do we need to support? */ in xhci_hub_control()
1323 temp = readl(port->addr); in xhci_hub_control()
1324 if ((temp & PORT_PLS_MASK) != XDEV_U0) { in xhci_hub_control()
1327 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1329 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1335 temp = readl(port->addr); in xhci_hub_control()
1336 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) in xhci_hub_control()
1337 || (temp & PORT_PLS_MASK) >= XDEV_U3) { in xhci_hub_control()
1338 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", in xhci_hub_control()
1339 hcd->self.busnum, portnum1); in xhci_hub_control()
1343 if (!port->slot_id) { in xhci_hub_control()
1348 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1349 xhci_stop_device(xhci, port->slot_id, 1); in xhci_hub_control()
1350 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1354 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1356 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1358 temp = readl(port->addr); in xhci_hub_control()
1359 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1362 temp = readl(port->addr); in xhci_hub_control()
1365 xhci_dbg(xhci, "Disable port %d-%d\n", in xhci_hub_control()
1366 hcd->self.busnum, portnum1); in xhci_hub_control()
1367 temp = xhci_port_state_to_neutral(temp); in xhci_hub_control()
1372 temp |= PORT_CSC | PORT_PEC | PORT_WRC | in xhci_hub_control()
1375 writel(temp | PORT_PE, port->addr); in xhci_hub_control()
1376 temp = readl(port->addr); in xhci_hub_control()
1382 xhci_dbg(xhci, "Enable port %d-%d\n", in xhci_hub_control()
1383 hcd->self.busnum, portnum1); in xhci_hub_control()
1385 temp = readl(port->addr); in xhci_hub_control()
1404 if (!HCC2_CTC(xhci->hcc_params2)) { in xhci_hub_control()
1409 if ((temp & PORT_CONNECT)) { in xhci_hub_control()
1414 xhci_dbg(xhci, "Enable compliance mode transition for port %d-%d\n", in xhci_hub_control()
1415 hcd->self.busnum, portnum1); in xhci_hub_control()
1418 temp = readl(port->addr); in xhci_hub_control()
1422 if (!(temp & PORT_PE)) { in xhci_hub_control()
1423 retval = -ENODEV; in xhci_hub_control()
1428 xhci_warn(xhci, "Cannot set port %d-%d link state %d\n", in xhci_hub_control()
1429 hcd->self.busnum, portnum1, link_state); in xhci_hub_control()
1436 * U1/U2: no PLC complete event, only set link to U0. in xhci_hub_control()
1441 u32 pls = temp & PORT_PLS_MASK; in xhci_hub_control()
1451 reinit_completion(&port->u3exit_done); in xhci_hub_control()
1460 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1461 if (!wait_for_completion_timeout(&port->u3exit_done, in xhci_hub_control()
1463 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", in xhci_hub_control()
1464 hcd->self.busnum, portnum1); in xhci_hub_control()
1465 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1466 temp = readl(port->addr); in xhci_hub_control()
1472 if (port->slot_id) { in xhci_hub_control()
1475 spin_unlock_irqrestore(&xhci->lock, in xhci_hub_control()
1477 xhci_stop_device(xhci, port->slot_id, 1); in xhci_hub_control()
1478 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1481 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1482 while (retries--) { in xhci_hub_control()
1484 temp = readl(port->addr); in xhci_hub_control()
1485 if ((temp & PORT_PLS_MASK) == XDEV_U3) in xhci_hub_control()
1488 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1489 temp = readl(port->addr); in xhci_hub_control()
1490 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1495 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1503 temp = (temp | PORT_RESET); in xhci_hub_control()
1504 writel(temp, port->addr); in xhci_hub_control()
1506 temp = readl(port->addr); in xhci_hub_control()
1507 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1508 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1512 temp = readl(port->addr); in xhci_hub_control()
1513 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1514 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1517 temp |= PORT_WR; in xhci_hub_control()
1518 writel(temp, port->addr); in xhci_hub_control()
1519 temp = readl(port->addr); in xhci_hub_control()
1522 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1524 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1525 temp &= ~PORT_U1_TIMEOUT_MASK; in xhci_hub_control()
1526 temp |= PORT_U1_TIMEOUT(timeout); in xhci_hub_control()
1527 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1530 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1532 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1533 temp &= ~PORT_U2_TIMEOUT_MASK; in xhci_hub_control()
1534 temp |= PORT_U2_TIMEOUT(timeout); in xhci_hub_control()
1535 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1539 if (hcd->speed != HCD_USB2) in xhci_hub_control()
1551 temp = readl(port->addr); in xhci_hub_control()
1557 port = ports[portnum1 - 1]; in xhci_hub_control()
1559 wIndex--; in xhci_hub_control()
1560 temp = readl(port->addr); in xhci_hub_control()
1561 if (temp == ~(u32)0) { in xhci_hub_control()
1563 retval = -ENODEV; in xhci_hub_control()
1566 /* FIXME: What new port features do we need to support? */ in xhci_hub_control()
1567 temp = xhci_port_state_to_neutral(temp); in xhci_hub_control()
1570 temp = readl(port->addr); in xhci_hub_control()
1572 xhci_dbg(xhci, "PORTSC %04x\n", temp); in xhci_hub_control()
1573 if (temp & PORT_RESET) in xhci_hub_control()
1575 if ((temp & PORT_PLS_MASK) == XDEV_U3) { in xhci_hub_control()
1576 if ((temp & PORT_PE) == 0) in xhci_hub_control()
1579 set_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1580 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1582 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1584 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1586 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1587 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1589 bus_state->port_c_suspend |= 1 << wIndex; in xhci_hub_control()
1591 if (!port->slot_id) { in xhci_hub_control()
1595 xhci_ring_device(xhci, port->slot_id); in xhci_hub_control()
1598 bus_state->port_c_suspend &= ~(1 << wIndex); in xhci_hub_control()
1608 port->addr, temp); in xhci_hub_control()
1626 retval = -EPIPE; in xhci_hub_control()
1628 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1635 * Ports are 0-indexed from the HCD point of view,
1636 * and 1-indexed from the USB core pointer of view.
1644 u32 temp, status; in xhci_hub_status_data() local
1655 ports = rhub->ports; in xhci_hub_status_data()
1656 max_ports = rhub->num_ports; in xhci_hub_status_data()
1657 bus_state = &rhub->bus_state; in xhci_hub_status_data()
1659 /* Initial status is no changes */ in xhci_hub_status_data()
1664 * Inform the usbcore about resume-in-progress by returning in xhci_hub_status_data()
1665 * a non-zero value even if there are no status changes. in xhci_hub_status_data()
1667 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_status_data()
1669 status = bus_state->resuming_ports; in xhci_hub_status_data()
1675 if (xhci->run_graceperiod) { in xhci_hub_status_data()
1676 if (time_before(jiffies, xhci->run_graceperiod)) in xhci_hub_status_data()
1679 xhci->run_graceperiod = 0; in xhci_hub_status_data()
1686 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1687 if (temp == ~(u32)0) { in xhci_hub_status_data()
1689 retval = -ENODEV; in xhci_hub_status_data()
1692 trace_xhci_hub_status_data(ports[i], temp); in xhci_hub_status_data()
1694 if ((temp & mask) != 0 || in xhci_hub_status_data()
1695 (bus_state->port_c_suspend & 1 << i) || in xhci_hub_status_data()
1696 (ports[i]->resume_timestamp && time_after_eq( in xhci_hub_status_data()
1697 jiffies, ports[i]->resume_timestamp))) { in xhci_hub_status_data()
1701 if ((temp & PORT_RC)) in xhci_hub_status_data()
1703 if (temp & PORT_OC) in xhci_hub_status_data()
1708 __func__, hcd->self.busnum); in xhci_hub_status_data()
1709 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_hub_status_data()
1711 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_status_data()
1729 ports = rhub->ports; in xhci_bus_suspend()
1730 max_ports = rhub->num_ports; in xhci_bus_suspend()
1731 bus_state = &rhub->bus_state; in xhci_bus_suspend()
1732 wake_enabled = hcd->self.root_hub->do_remote_wakeup; in xhci_bus_suspend()
1734 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1737 if (bus_state->resuming_ports || /* USB2 */ in xhci_bus_suspend()
1738 bus_state->port_remote_wakeup) { /* USB3 */ in xhci_bus_suspend()
1739 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1741 hcd->self.busnum); in xhci_bus_suspend()
1742 return -EBUSY; in xhci_bus_suspend()
1749 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1751 while (port_index--) { in xhci_bus_suspend()
1755 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1763 if ((hcd->speed >= HCD_USB3) && retries-- && in xhci_bus_suspend()
1765 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1767 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1768 xhci_dbg(xhci, "port %d-%d polling in bus suspend, waiting\n", in xhci_bus_suspend()
1769 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1772 /* bail out if port detected a over-current condition */ in xhci_bus_suspend()
1774 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1775 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1776 xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); in xhci_bus_suspend()
1777 return -EBUSY; in xhci_bus_suspend()
1782 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1783 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1785 return -EBUSY; in xhci_bus_suspend()
1787 xhci_dbg(xhci, "port %d-%d not suspended\n", in xhci_bus_suspend()
1788 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1791 set_bit(port_index, &bus_state->bus_suspended); in xhci_bus_suspend()
1806 if ((xhci->quirks & XHCI_U2_DISABLE_WAKE) && in xhci_bus_suspend()
1807 (hcd->speed < HCD_USB3)) { in xhci_bus_suspend()
1808 if (usb_amd_pt_check_port(hcd->self.controller, in xhci_bus_suspend()
1822 while (port_index--) { in xhci_bus_suspend()
1825 if (test_bit(port_index, &bus_state->bus_suspended)) { in xhci_bus_suspend()
1826 int slot_id = ports[port_index]->slot_id; in xhci_bus_suspend()
1828 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1830 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1833 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1835 hcd->state = HC_STATE_SUSPENDED; in xhci_bus_suspend()
1836 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); in xhci_bus_suspend()
1837 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1839 if (bus_state->bus_suspended) in xhci_bus_suspend()
1846 * Workaround for missing Cold Attach Status (CAS) if device re-plugged in S3.
1848 * See Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
1854 portsc = readl(port->addr); in xhci_port_missing_cas_quirk()
1867 writel(portsc, port->addr); in xhci_port_missing_cas_quirk()
1869 readl(port->addr); in xhci_port_missing_cas_quirk()
1881 u32 temp, portsc; in xhci_bus_resume() local
1886 ports = rhub->ports; in xhci_bus_resume()
1887 max_ports = rhub->num_ports; in xhci_bus_resume()
1888 bus_state = &rhub->bus_state; in xhci_bus_resume()
1890 if (time_before(jiffies, bus_state->next_statechange)) in xhci_bus_resume()
1893 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1895 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1896 return -ESHUTDOWN; in xhci_bus_resume()
1900 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1901 temp &= ~CMD_EIE; in xhci_bus_resume()
1902 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1905 if (hcd->speed >= HCD_USB3) in xhci_bus_resume()
1911 while (port_index--) { in xhci_bus_resume()
1912 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1915 if ((xhci->quirks & XHCI_MISSING_CAS) && in xhci_bus_resume()
1916 (hcd->speed >= HCD_USB3) && in xhci_bus_resume()
1918 xhci_dbg(xhci, "reset stuck port %d-%d\n", in xhci_bus_resume()
1919 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1920 clear_bit(port_index, &bus_state->bus_suspended); in xhci_bus_resume()
1924 if (test_bit(port_index, &bus_state->bus_suspended)) in xhci_bus_resume()
1937 &bus_state->bus_suspended); in xhci_bus_resume()
1942 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1946 if (hcd->speed < HCD_USB3) { in xhci_bus_resume()
1947 if (bus_state->bus_suspended) { in xhci_bus_resume()
1948 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1950 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1952 for_each_set_bit(port_index, &bus_state->bus_suspended, in xhci_bus_resume()
1962 for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) { in xhci_bus_resume()
1963 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1966 xhci_warn(xhci, "port %d-%d resume PLC timeout\n", in xhci_bus_resume()
1967 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1971 if (ports[port_index]->slot_id) in xhci_bus_resume()
1972 xhci_ring_device(xhci, ports[port_index]->slot_id); in xhci_bus_resume()
1974 (void) readl(&xhci->op_regs->command); in xhci_bus_resume()
1976 bus_state->next_statechange = jiffies + msecs_to_jiffies(5); in xhci_bus_resume()
1977 /* re-enable irqs */ in xhci_bus_resume()
1978 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1979 temp |= CMD_EIE; in xhci_bus_resume()
1980 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1981 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1983 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1992 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()