Lines Matching +full:usb +full:- +full:misc +full:- +full:reg
1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains code to reset and initialize USB host controllers.
4 * Some of it includes work-arounds for PCI hardware and BIOS quirks.
5 * It may need to run early during booting -- before USB would normally
6 * initialize -- to ensure that Linux doesn't use any legacy modes.
22 #include "pci-quirks.h"
23 #include "xhci-ext-caps.h"
146 * amd_chipset_sb_type_init - initialize amd chipset southbridge type
156 pinfo->sb_type.gen = AMD_CHIPSET_UNKNOWN; in amd_chipset_sb_type_init()
158 pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, in amd_chipset_sb_type_init()
160 if (pinfo->smbus_dev) { in amd_chipset_sb_type_init()
161 rev = pinfo->smbus_dev->revision; in amd_chipset_sb_type_init()
163 pinfo->sb_type.gen = AMD_CHIPSET_SB600; in amd_chipset_sb_type_init()
165 pinfo->sb_type.gen = AMD_CHIPSET_SB700; in amd_chipset_sb_type_init()
167 pinfo->sb_type.gen = AMD_CHIPSET_SB800; in amd_chipset_sb_type_init()
169 pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, in amd_chipset_sb_type_init()
172 if (pinfo->smbus_dev) { in amd_chipset_sb_type_init()
173 rev = pinfo->smbus_dev->revision; in amd_chipset_sb_type_init()
175 pinfo->sb_type.gen = AMD_CHIPSET_HUDSON2; in amd_chipset_sb_type_init()
177 pinfo->sb_type.gen = AMD_CHIPSET_BOLTON; in amd_chipset_sb_type_init()
179 pinfo->sb_type.gen = AMD_CHIPSET_YANGTZE; in amd_chipset_sb_type_init()
181 pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, in amd_chipset_sb_type_init()
183 if (pinfo->smbus_dev) { in amd_chipset_sb_type_init()
184 rev = pinfo->smbus_dev->revision; in amd_chipset_sb_type_init()
185 pinfo->sb_type.gen = AMD_CHIPSET_TAISHAN; in amd_chipset_sb_type_init()
187 pinfo->sb_type.gen = NOT_AMD_CHIPSET; in amd_chipset_sb_type_init()
192 pinfo->sb_type.rev = rev; in amd_chipset_sb_type_init()
198 u16 misc; in sb800_prefetch() local
201 pci_read_config_word(pdev, 0x50, &misc); in sb800_prefetch()
203 pci_write_config_word(pdev, 0x50, misc & 0xfcff); in sb800_prefetch()
205 pci_write_config_word(pdev, 0x50, misc | 0x0300); in sb800_prefetch()
271 /* race - someone else was faster - drop devices */ in usb_amd_find_chipset_info()
282 /* no race - commit the result */ in usb_amd_find_chipset_info()
295 dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n"); in usb_hcd_amd_remote_wakeup_quirk()
318 /* SB800 needs pre-fetch fix */ in usb_amd_prefetch_quirk()
331 * The hardware normally enables the A-link power management feature, which
334 * This USB quirk prevents the link going into that lower power state
355 amd_chipset.isoc_reqs--; in usb_amd_quirk_pll()
476 amd_chipset.probe_count--; in usb_amd_dev_put()
510 u16 reg; in usb_amd_pt_check_port() local
538 switch (pdev->device) { in usb_amd_pt_check_port()
547 reg = PT4_P2_REG; in usb_amd_pt_check_port()
548 port_shift = port - 7; in usb_amd_pt_check_port()
550 reg = PT4_P1_REG; in usb_amd_pt_check_port()
561 reg = PT2_P2_REG; in usb_amd_pt_check_port()
562 port_shift = port - 3; in usb_amd_pt_check_port()
564 reg = PT2_P1_REG; in usb_amd_pt_check_port()
575 reg = PT1_P2_REG; in usb_amd_pt_check_port()
576 port_shift = port - 4; in usb_amd_pt_check_port()
578 reg = PT1_P1_REG; in usb_amd_pt_check_port()
585 pci_write_config_word(pdev, PT_ADDR_INDX, reg); in usb_amd_pt_check_port()
598 for (retry_count = 1000; retry_count > 0; --retry_count) { in usb_asmedia_wait_write()
603 dev_err(&pdev->dev, "%s: check_ready ERROR", __func__); in usb_asmedia_wait_write()
604 return -EIO; in usb_asmedia_wait_write()
613 dev_warn(&pdev->dev, "%s: check_write_ready timeout", __func__); in usb_asmedia_wait_write()
614 return -ETIMEDOUT; in usb_asmedia_wait_write()
654 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too. in uhci_reset_hc()
658 /* Reset the HC - this will force us to get a in uhci_reset_hc()
667 dev_warn(&pdev->dev, "HCRESET not completed yet!\n"); in uhci_reset_hc()
700 dev_dbg(&pdev->dev, "%s: legsup = 0x%04x\n", in uhci_check_and_reset_hc()
708 dev_dbg(&pdev->dev, "%s: cmd = 0x%04x\n", in uhci_check_and_reset_hc()
715 dev_dbg(&pdev->dev, "%s: intr = 0x%04x\n", in uhci_check_and_reset_hc()
722 dev_dbg(&pdev->dev, "Performing full reset\n"); in uhci_check_and_reset_hc()
778 if (pdev->vendor == PCI_VENDOR_ID_AL && pdev->device == 0x5237) in quirk_usb_handoff_ohci()
783 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */ in quirk_usb_handoff_ohci()
795 wait_time -= 10; in quirk_usb_handoff_ohci()
799 dev_warn(&pdev->dev, in quirk_usb_handoff_ohci()
819 for (cnt = 30; cnt > 0; --cnt) { /* ... allow extra time */ in quirk_usb_handoff_ohci()
837 DMI_MATCH(DMI_BIOS_VERSION, "Lucid-CE-133"),
844 DMI_MATCH(DMI_BIOS_VERSION, "Lucid-"),
851 DMI_MATCH(DMI_BIOS_VERSION, "Lucid-"),
877 if (pdev->vendor == 0x8086 && (pdev->device == 0x283a || in ehci_bios_handoff()
878 pdev->device == 0x27cc)) { in ehci_bios_handoff()
884 dev_dbg(&pdev->dev, "EHCI: BIOS handoff\n"); in ehci_bios_handoff()
892 /* BIOS workaround (?): be sure the pre-Linux code in ehci_bios_handoff()
913 msec -= 10; in ehci_bios_handoff()
923 dev_warn(&pdev->dev, in ehci_bios_handoff()
958 * booting from USB disk or using a usb keyboard in quirk_usb_disable_ehci()
967 if (pdev->vendor == PCI_VENDOR_ID_LOONGSON && pdev->device == 0x7a14) in quirk_usb_disable_ehci()
971 while (offset && --count) { in quirk_usb_disable_ehci()
982 dev_warn(&pdev->dev, in quirk_usb_disable_ehci()
989 dev_printk(KERN_DEBUG, &pdev->dev, "EHCI: capability loop?\n"); in quirk_usb_disable_ehci()
1004 wait_time -= 100; in quirk_usb_disable_ehci()
1018 * handshake - spin reading a register until handshake completes
1027 * Returns -ETIMEDOUT if this condition is not true after
1048 * port switchover, which could cause loss of data on USB storage devices, or
1049 * failed boot when the root file system is on a USB mass storage device and is
1052 * We write into the xHC's PCI configuration space in some Intel-specific
1053 * registers to switch the ports over. The USB 3.0 terminations and the USB
1055 * terminations before switching the USB 2.0 wires over, so that USB 3.0
1056 * devices connect at SuperSpeed, rather than at USB 2.0 speeds.
1064 /* Sony VAIO t-series with subsystem device ID 90a8 is not capable of in usb_enable_intel_xhci_ports()
1067 if (xhci_pdev->subsystem_vendor == PCI_VENDOR_ID_SONY && in usb_enable_intel_xhci_ports()
1068 xhci_pdev->subsystem_device == 0x90a8) in usb_enable_intel_xhci_ports()
1073 if (companion->class == PCI_CLASS_SERIAL_USB_EHCI && in usb_enable_intel_xhci_ports()
1074 companion->vendor == PCI_VENDOR_ID_INTEL) { in usb_enable_intel_xhci_ports()
1084 * driver. Otherwise they will see "dead" USB ports that don't power in usb_enable_intel_xhci_ports()
1088 dev_warn(&xhci_pdev->dev, in usb_enable_intel_xhci_ports()
1090 dev_warn(&xhci_pdev->dev, in usb_enable_intel_xhci_ports()
1091 "USB 3.0 devices will work at USB 2.0 speeds.\n"); in usb_enable_intel_xhci_ports()
1096 /* Read USB3PRM, the USB 3.0 Port Routing Mask Register in usb_enable_intel_xhci_ports()
1102 dev_dbg(&xhci_pdev->dev, "Configurable ports to enable SuperSpeed: 0x%x\n", in usb_enable_intel_xhci_ports()
1105 /* Write USB3_PSSEN, the USB 3.0 Port SuperSpeed Enable in usb_enable_intel_xhci_ports()
1114 dev_dbg(&xhci_pdev->dev, in usb_enable_intel_xhci_ports()
1115 "USB 3.0 ports that are now enabled under xHCI: 0x%x\n", in usb_enable_intel_xhci_ports()
1118 /* Read XUSB2PRM, xHCI USB 2.0 Port Routing Mask Register in usb_enable_intel_xhci_ports()
1119 * Indicate the USB 2.0 ports to be controlled by the xHCI host. in usb_enable_intel_xhci_ports()
1125 dev_dbg(&xhci_pdev->dev, "Configurable USB 2.0 ports to hand over to xCHI: 0x%x\n", in usb_enable_intel_xhci_ports()
1128 /* Write XUSB2PR, the xHC USB 2.0 Port Routing Register, to in usb_enable_intel_xhci_ports()
1129 * switch the USB 2.0 power and data lines over to the xHCI in usb_enable_intel_xhci_ports()
1137 dev_dbg(&xhci_pdev->dev, in usb_enable_intel_xhci_ports()
1138 "USB 2.0 ports that are now switched over to xHCI: 0x%x\n", in usb_enable_intel_xhci_ports()
1153 * Takes care of the handoff between the Pre-OS (i.e. BIOS) and the OS.
1175 * Find the Legacy Support Capability register - in quirk_usb_handoff_xhci()
1185 dev_warn(&pdev->dev, "xHCI controller failing to respond"); in quirk_usb_handoff_xhci()
1191 if ((pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241) || in quirk_usb_handoff_xhci()
1192 (pdev->vendor == PCI_VENDOR_ID_RENESAS in quirk_usb_handoff_xhci()
1193 && pdev->device == 0x0014)) { in quirk_usb_handoff_xhci()
1208 dev_warn(&pdev->dev, in quirk_usb_handoff_xhci()
1224 if (pdev->vendor == PCI_VENDOR_ID_INTEL) in quirk_usb_handoff_xhci()
1237 dev_warn(&pdev->dev, in quirk_usb_handoff_xhci()
1247 /* Wait for the HC to halt - poll every 125 usec (one microframe). */ in quirk_usb_handoff_xhci()
1252 dev_warn(&pdev->dev, in quirk_usb_handoff_xhci()
1266 /* Skip Netlogic mips SoC's internal PCI USB controller. in quirk_usb_early_handoff()
1269 if (pdev->vendor == 0x184e) /* vendor Netlogic */ in quirk_usb_early_handoff()
1274 * taken care of by the board's co-processor. in quirk_usb_early_handoff()
1276 if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { in quirk_usb_early_handoff()
1277 parent = of_get_parent(pdev->bus->dev.of_node); in quirk_usb_early_handoff()
1278 is_rpi = of_device_is_compatible(parent, "brcm,bcm2711-pcie"); in quirk_usb_early_handoff()
1284 if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI && in quirk_usb_early_handoff()
1285 pdev->class != PCI_CLASS_SERIAL_USB_OHCI && in quirk_usb_early_handoff()
1286 pdev->class != PCI_CLASS_SERIAL_USB_EHCI && in quirk_usb_early_handoff()
1287 pdev->class != PCI_CLASS_SERIAL_USB_XHCI) in quirk_usb_early_handoff()
1291 dev_warn(&pdev->dev, in quirk_usb_early_handoff()
1295 if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI) in quirk_usb_early_handoff()
1297 else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI) in quirk_usb_early_handoff()
1299 else if (pdev->class == PCI_CLASS_SERIAL_USB_EHCI) in quirk_usb_early_handoff()
1301 else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI) in quirk_usb_early_handoff()