Lines Matching +full:big +full:- +full:endian +full:- +full:regs
1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/usb/ehci-dbgp.h>
14 * To facilitate the strongest possible byte-order checking from "sparse"
33 /* fotg210_hcd->lock guards shared data against other CPUs:
59 * ehci-timer.c) in parallel with this list.
89 struct fotg210_regs __iomem *regs; member
152 /* which ports have the change-suspend feature turned on */
161 /* per-HC memory pools (could be per-bus, but ...) */
193 return (struct fotg210_hcd *)(hcd->hcd_priv); in hcd_to_fotg210()
200 /*-------------------------------------------------------------------------*/
208 * some hosts treat caplength and hciversion as parts of a 32-bit
210 * affects the memory map for big endian controllers.
217 u32 hcs_params; /* HCSPARAMS - offset 0x4 */
220 u32 hcc_params; /* HCCPARAMS - offset 0x8 */
223 u8 portroute[8]; /* nibbles for routing - offset 0xC */
306 /*-------------------------------------------------------------------------*/
313 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
344 /* the rest is HCD-private */
351 /* mask NakCnt+T in qh->hw_alt_next */
356 /*-------------------------------------------------------------------------*/
358 /* type tag from {qh,itd,fstn}->hw_next */
365 * can be used on one system with SoC EHCI controller using big-endian
366 * descriptors as well as a normal little-endian PCI EHCI controller.
398 /*-------------------------------------------------------------------------*/
403 * See Fig 3-7 "Queue Head Structure Layout".
425 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
437 /* the rest is HCD-private */
469 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
472 /*-------------------------------------------------------------------------*/
477 u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */
478 __hc32 transaction; /* itd->hw_transaction[i] |= */
486 * beginning at stream->next_uframe
495 * fotg210_iso_stream - groups all (s)itds for this endpoint.
514 * trusting urb->interval == f(epdesc->bInterval) and
533 /*-------------------------------------------------------------------------*/
537 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
548 #define FOTG210_ISOC_XACTERR (1<<28) /* XactErr - transaction error */
557 /* the rest is HCD-private */
568 unsigned index[8]; /* in urb->iso_frame_desc */
571 /*-------------------------------------------------------------------------*/
586 /* the rest is HCD-private */
591 /*-------------------------------------------------------------------------*/
601 /*-------------------------------------------------------------------------*/
605 * root hub. This is a non-standard feature. Each controller will need
613 return (readl(&fotg210->regs->otgcsr) in fotg210_get_speed()
632 /*-------------------------------------------------------------------------*/
638 * little-endian format, a minority (celleb companion chip) implement
639 * them in big endian format.
651 __u32 __iomem *regs) in fotg210_readl() argument
653 return readl(regs); in fotg210_readl()
657 const unsigned int val, __u32 __iomem *regs) in fotg210_writel() argument
659 writel(val, regs); in fotg210_writel()
680 /*-------------------------------------------------------------------------*/
684 return fotg210_readl(fotg210, &fotg210->regs->frame_index); in fotg210_read_frame_index()
687 /*-------------------------------------------------------------------------*/