Lines Matching +full:period +full:- +full:scale
1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - DesignWare USB3 DRD Controller Core file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
24 #include <linux/dma-mapping.h>
42 #include "../host/xhci-ext-caps.h"
47 * dwc3_get_dr_mode - Validates and sets dr_mode
53 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
56 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
57 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
59 mode = dwc->dr_mode; in dwc3_get_dr_mode()
60 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()
67 return -EINVAL; in dwc3_get_dr_mode()
75 return -EINVAL; in dwc3_get_dr_mode()
90 if (mode == USB_DR_MODE_OTG && !dwc->edev && in dwc3_get_dr_mode()
92 !device_property_read_bool(dwc->dev, "usb-role-switch")) && in dwc3_get_dr_mode()
97 if (mode != dwc->dr_mode) { in dwc3_get_dr_mode()
102 dwc->dr_mode = mode; in dwc3_get_dr_mode()
113 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_enable_susphy()
114 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i)); in dwc3_enable_susphy()
115 if (enable && !dwc->dis_u3_susphy_quirk) in dwc3_enable_susphy()
120 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg); in dwc3_enable_susphy()
123 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_enable_susphy()
124 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_enable_susphy()
125 if (enable && !dwc->dis_u2_susphy_quirk) in dwc3_enable_susphy()
130 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_enable_susphy()
139 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_set_prtcap()
146 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_set_prtcap()
154 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_set_prtcap()
156 dwc->current_dr_role = mode; in dwc3_set_prtcap()
168 mutex_lock(&dwc->mutex); in __dwc3_set_mode()
169 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
170 desired_dr_role = dwc->desired_dr_role; in __dwc3_set_mode()
171 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
173 pm_runtime_get_sync(dwc->dev); in __dwc3_set_mode()
175 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) in __dwc3_set_mode()
181 if (desired_dr_role == dwc->current_dr_role) in __dwc3_set_mode()
184 if (desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) in __dwc3_set_mode()
187 switch (dwc->current_dr_role) { in __dwc3_set_mode()
197 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
198 dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; in __dwc3_set_mode()
199 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
210 if (dwc->current_dr_role && ((DWC3_IP_IS(DWC3) || in __dwc3_set_mode()
213 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in __dwc3_set_mode()
215 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in __dwc3_set_mode()
225 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in __dwc3_set_mode()
227 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in __dwc3_set_mode()
230 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
234 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
240 dev_err(dwc->dev, "failed to initialize host\n"); in __dwc3_set_mode()
242 if (dwc->usb2_phy) in __dwc3_set_mode()
243 otg_set_vbus(dwc->usb2_phy->otg, true); in __dwc3_set_mode()
245 for (i = 0; i < dwc->num_usb2_ports; i++) in __dwc3_set_mode()
246 phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); in __dwc3_set_mode()
247 for (i = 0; i < dwc->num_usb3_ports; i++) in __dwc3_set_mode()
248 phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); in __dwc3_set_mode()
250 if (dwc->dis_split_quirk) { in __dwc3_set_mode()
251 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); in __dwc3_set_mode()
253 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); in __dwc3_set_mode()
262 if (dwc->usb2_phy) in __dwc3_set_mode()
263 otg_set_vbus(dwc->usb2_phy->otg, false); in __dwc3_set_mode()
264 phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); in __dwc3_set_mode()
265 phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); in __dwc3_set_mode()
269 dev_err(dwc->dev, "failed to initialize peripheral\n"); in __dwc3_set_mode()
280 pm_runtime_mark_last_busy(dwc->dev); in __dwc3_set_mode()
281 pm_runtime_put_autosuspend(dwc->dev); in __dwc3_set_mode()
282 mutex_unlock(&dwc->mutex); in __dwc3_set_mode()
289 if (dwc->dr_mode != USB_DR_MODE_OTG) in dwc3_set_mode()
292 spin_lock_irqsave(&dwc->lock, flags); in dwc3_set_mode()
293 dwc->desired_dr_role = mode; in dwc3_set_mode()
294 spin_unlock_irqrestore(&dwc->lock, flags); in dwc3_set_mode()
296 queue_work(system_freezable_wq, &dwc->drd_work); in dwc3_set_mode()
301 struct dwc3 *dwc = dep->dwc; in dwc3_core_fifo_space()
304 dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, in dwc3_core_fifo_space()
305 DWC3_GDBGFIFOSPACE_NUM(dep->number) | in dwc3_core_fifo_space()
308 reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); in dwc3_core_fifo_space()
314 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
325 * host-only mode, then we can return early. in dwc3_core_soft_reset()
327 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) in dwc3_core_soft_reset()
330 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_core_soft_reset()
345 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_core_soft_reset()
353 } while (--retries); in dwc3_core_soft_reset()
355 dev_warn(dwc->dev, "DWC3 controller soft reset failed.\n"); in dwc3_core_soft_reset()
356 return -ETIMEDOUT; in dwc3_core_soft_reset()
371 * dwc3_frame_length_adjustment - Adjusts frame length if required
382 if (dwc->fladj == 0) in dwc3_frame_length_adjustment()
385 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); in dwc3_frame_length_adjustment()
387 if (dft != dwc->fladj) { in dwc3_frame_length_adjustment()
389 reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; in dwc3_frame_length_adjustment()
390 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); in dwc3_frame_length_adjustment()
395 * dwc3_ref_clk_period - Reference clock period configuration
396 * Default reference clock period depends on hardware
398 * from the default, this will set clock period in DWC3_GUCTL
404 unsigned long period; in dwc3_ref_clk_period() local
410 if (dwc->ref_clk) { in dwc3_ref_clk_period()
411 rate = clk_get_rate(dwc->ref_clk); in dwc3_ref_clk_period()
414 period = NSEC_PER_SEC / rate; in dwc3_ref_clk_period()
415 } else if (dwc->ref_clk_per) { in dwc3_ref_clk_period()
416 period = dwc->ref_clk_per; in dwc3_ref_clk_period()
417 rate = NSEC_PER_SEC / period; in dwc3_ref_clk_period()
422 reg = dwc3_readl(dwc->regs, DWC3_GUCTL); in dwc3_ref_clk_period()
424 reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period); in dwc3_ref_clk_period()
425 dwc3_writel(dwc->regs, DWC3_GUCTL, reg); in dwc3_ref_clk_period()
433 * 125000 * (NSEC_PER_SEC / (rate * period) - 1) in dwc3_ref_clk_period()
435 * but rearranged for fixed-point arithmetic. The division must be in dwc3_ref_clk_period()
436 * 64-bit because 125000 * NSEC_PER_SEC doesn't fit in 32 bits (and in dwc3_ref_clk_period()
437 * neither does rate * period). in dwc3_ref_clk_period()
439 * Note that rate * period ~= NSEC_PER_SECOND, minus the number of in dwc3_ref_clk_period()
441 * the division when calculating rate or period (whichever one was in dwc3_ref_clk_period()
443 * scale it to units of 8 ppm. in dwc3_ref_clk_period()
445 fladj = div64_u64(125000ULL * NSEC_PER_SEC, (u64)rate * period); in dwc3_ref_clk_period()
446 fladj -= 125000; in dwc3_ref_clk_period()
453 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); in dwc3_ref_clk_period()
461 if (dwc->gfladj_refclk_lpm_sel) in dwc3_ref_clk_period()
464 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); in dwc3_ref_clk_period()
468 * dwc3_free_one_event_buffer - Frees one event buffer
475 dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); in dwc3_free_one_event_buffer()
479 * dwc3_alloc_one_event_buffer - Allocates one event buffer structure
491 evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); in dwc3_alloc_one_event_buffer()
493 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
495 evt->dwc = dwc; in dwc3_alloc_one_event_buffer()
496 evt->length = length; in dwc3_alloc_one_event_buffer()
497 evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); in dwc3_alloc_one_event_buffer()
498 if (!evt->cache) in dwc3_alloc_one_event_buffer()
499 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
501 evt->buf = dma_alloc_coherent(dwc->sysdev, length, in dwc3_alloc_one_event_buffer()
502 &evt->dma, GFP_KERNEL); in dwc3_alloc_one_event_buffer()
503 if (!evt->buf) in dwc3_alloc_one_event_buffer()
504 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
510 * dwc3_free_event_buffers - frees all allocated event buffers
517 evt = dwc->ev_buf; in dwc3_free_event_buffers()
523 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
535 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_alloc_event_buffers()
537 dwc->ev_buf = NULL; in dwc3_alloc_event_buffers()
543 dev_err(dwc->dev, "can't allocate event buffer\n"); in dwc3_alloc_event_buffers()
546 dwc->ev_buf = evt; in dwc3_alloc_event_buffers()
552 * dwc3_event_buffers_setup - setup our allocated event buffers
562 if (!dwc->ev_buf) in dwc3_event_buffers_setup()
565 evt = dwc->ev_buf; in dwc3_event_buffers_setup()
566 evt->lpos = 0; in dwc3_event_buffers_setup()
567 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), in dwc3_event_buffers_setup()
568 lower_32_bits(evt->dma)); in dwc3_event_buffers_setup()
569 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), in dwc3_event_buffers_setup()
570 upper_32_bits(evt->dma)); in dwc3_event_buffers_setup()
571 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), in dwc3_event_buffers_setup()
572 DWC3_GEVNTSIZ_SIZE(evt->length)); in dwc3_event_buffers_setup()
575 reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0)); in dwc3_event_buffers_setup()
576 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg); in dwc3_event_buffers_setup()
585 if (!dwc->ev_buf) in dwc3_event_buffers_cleanup()
591 reg = dwc3_readl(dwc->regs, DWC3_DSTS); in dwc3_event_buffers_cleanup()
595 evt = dwc->ev_buf; in dwc3_event_buffers_cleanup()
597 evt->lpos = 0; in dwc3_event_buffers_cleanup()
599 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); in dwc3_event_buffers_cleanup()
600 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); in dwc3_event_buffers_cleanup()
601 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK in dwc3_event_buffers_cleanup()
605 reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0)); in dwc3_event_buffers_cleanup()
606 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg); in dwc3_event_buffers_cleanup()
611 struct dwc3_hwparams *parms = &dwc->hwparams; in dwc3_core_num_eps()
613 dwc->num_eps = DWC3_NUM_EPS(parms); in dwc3_core_num_eps()
618 struct dwc3_hwparams *parms = &dwc->hwparams; in dwc3_cache_hwparams()
620 parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); in dwc3_cache_hwparams()
621 parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); in dwc3_cache_hwparams()
622 parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); in dwc3_cache_hwparams()
623 parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); in dwc3_cache_hwparams()
624 parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); in dwc3_cache_hwparams()
625 parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); in dwc3_cache_hwparams()
626 parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); in dwc3_cache_hwparams()
627 parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); in dwc3_cache_hwparams()
628 parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); in dwc3_cache_hwparams()
631 parms->hwparams9 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS9); in dwc3_cache_hwparams()
636 if (dwc->gsbuscfg0_reqinfo != DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED) { in dwc3_config_soc_bus()
639 reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); in dwc3_config_soc_bus()
641 reg |= DWC3_GSBUSCFG0_REQINFO(dwc->gsbuscfg0_reqinfo); in dwc3_config_soc_bus()
642 dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg); in dwc3_config_soc_bus()
651 intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); in dwc3_core_ulpi_init()
655 dwc->hsphy_interface && in dwc3_core_ulpi_init()
656 !strncmp(dwc->hsphy_interface, "ulpi", 4))) in dwc3_core_ulpi_init()
666 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index)); in dwc3_ss_phy_setup()
677 if (dwc->u2ss_inp3_quirk) in dwc3_ss_phy_setup()
680 if (dwc->dis_rxdet_inp3_quirk) in dwc3_ss_phy_setup()
683 if (dwc->req_p1p2p3_quirk) in dwc3_ss_phy_setup()
686 if (dwc->del_p1p2p3_quirk) in dwc3_ss_phy_setup()
689 if (dwc->del_phy_power_chg_quirk) in dwc3_ss_phy_setup()
692 if (dwc->lfps_filter_quirk) in dwc3_ss_phy_setup()
695 if (dwc->rx_detect_poll_quirk) in dwc3_ss_phy_setup()
698 if (dwc->tx_de_emphasis_quirk) in dwc3_ss_phy_setup()
699 reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); in dwc3_ss_phy_setup()
701 if (dwc->dis_del_phy_power_chg_quirk) in dwc3_ss_phy_setup()
704 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg); in dwc3_ss_phy_setup()
713 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index)); in dwc3_hs_phy_setup()
716 switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { in dwc3_hs_phy_setup()
718 if (dwc->hsphy_interface && in dwc3_hs_phy_setup()
719 !strncmp(dwc->hsphy_interface, "utmi", 4)) { in dwc3_hs_phy_setup()
722 } else if (dwc->hsphy_interface && in dwc3_hs_phy_setup()
723 !strncmp(dwc->hsphy_interface, "ulpi", 4)) { in dwc3_hs_phy_setup()
725 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); in dwc3_hs_phy_setup()
737 switch (dwc->hsphy_mode) { in dwc3_hs_phy_setup()
757 if (dwc->dis_enblslpm_quirk) in dwc3_hs_phy_setup()
762 if (dwc->dis_u2_freeclk_exists_quirk || dwc->gfladj_refclk_lpm_sel) in dwc3_hs_phy_setup()
772 if (dwc->ulpi_ext_vbus_drv) in dwc3_hs_phy_setup()
775 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); in dwc3_hs_phy_setup()
781 * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
793 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_phy_setup()
799 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_setup()
814 usb_phy_init(dwc->usb2_phy); in dwc3_phy_init()
815 usb_phy_init(dwc->usb3_phy); in dwc3_phy_init()
817 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_init()
818 ret = phy_init(dwc->usb2_generic_phy[i]); in dwc3_phy_init()
823 for (j = 0; j < dwc->num_usb3_ports; j++) { in dwc3_phy_init()
824 ret = phy_init(dwc->usb3_generic_phy[j]); in dwc3_phy_init()
851 while (--j >= 0) in dwc3_phy_init()
852 phy_exit(dwc->usb3_generic_phy[j]); in dwc3_phy_init()
855 while (--i >= 0) in dwc3_phy_init()
856 phy_exit(dwc->usb2_generic_phy[i]); in dwc3_phy_init()
858 usb_phy_shutdown(dwc->usb3_phy); in dwc3_phy_init()
859 usb_phy_shutdown(dwc->usb2_phy); in dwc3_phy_init()
868 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_phy_exit()
869 phy_exit(dwc->usb3_generic_phy[i]); in dwc3_phy_exit()
871 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_phy_exit()
872 phy_exit(dwc->usb2_generic_phy[i]); in dwc3_phy_exit()
874 usb_phy_shutdown(dwc->usb3_phy); in dwc3_phy_exit()
875 usb_phy_shutdown(dwc->usb2_phy); in dwc3_phy_exit()
884 usb_phy_set_suspend(dwc->usb2_phy, 0); in dwc3_phy_power_on()
885 usb_phy_set_suspend(dwc->usb3_phy, 0); in dwc3_phy_power_on()
887 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_power_on()
888 ret = phy_power_on(dwc->usb2_generic_phy[i]); in dwc3_phy_power_on()
893 for (j = 0; j < dwc->num_usb3_ports; j++) { in dwc3_phy_power_on()
894 ret = phy_power_on(dwc->usb3_generic_phy[j]); in dwc3_phy_power_on()
902 while (--j >= 0) in dwc3_phy_power_on()
903 phy_power_off(dwc->usb3_generic_phy[j]); in dwc3_phy_power_on()
906 while (--i >= 0) in dwc3_phy_power_on()
907 phy_power_off(dwc->usb2_generic_phy[i]); in dwc3_phy_power_on()
909 usb_phy_set_suspend(dwc->usb3_phy, 1); in dwc3_phy_power_on()
910 usb_phy_set_suspend(dwc->usb2_phy, 1); in dwc3_phy_power_on()
919 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_phy_power_off()
920 phy_power_off(dwc->usb3_generic_phy[i]); in dwc3_phy_power_off()
922 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_phy_power_off()
923 phy_power_off(dwc->usb2_generic_phy[i]); in dwc3_phy_power_off()
925 usb_phy_set_suspend(dwc->usb3_phy, 1); in dwc3_phy_power_off()
926 usb_phy_set_suspend(dwc->usb2_phy, 1); in dwc3_phy_power_off()
933 ret = clk_prepare_enable(dwc->bus_clk); in dwc3_clk_enable()
937 ret = clk_prepare_enable(dwc->ref_clk); in dwc3_clk_enable()
941 ret = clk_prepare_enable(dwc->susp_clk); in dwc3_clk_enable()
945 ret = clk_prepare_enable(dwc->utmi_clk); in dwc3_clk_enable()
949 ret = clk_prepare_enable(dwc->pipe_clk); in dwc3_clk_enable()
956 clk_disable_unprepare(dwc->utmi_clk); in dwc3_clk_enable()
958 clk_disable_unprepare(dwc->susp_clk); in dwc3_clk_enable()
960 clk_disable_unprepare(dwc->ref_clk); in dwc3_clk_enable()
962 clk_disable_unprepare(dwc->bus_clk); in dwc3_clk_enable()
968 clk_disable_unprepare(dwc->pipe_clk); in dwc3_clk_disable()
969 clk_disable_unprepare(dwc->utmi_clk); in dwc3_clk_disable()
970 clk_disable_unprepare(dwc->susp_clk); in dwc3_clk_disable()
971 clk_disable_unprepare(dwc->ref_clk); in dwc3_clk_disable()
972 clk_disable_unprepare(dwc->bus_clk); in dwc3_clk_disable()
981 reset_control_assert(dwc->reset); in dwc3_core_exit()
988 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); in dwc3_core_is_valid()
989 dwc->ip = DWC3_GSNPS_ID(reg); in dwc3_core_is_valid()
993 dwc->revision = reg; in dwc3_core_is_valid()
995 dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); in dwc3_core_is_valid()
996 dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); in dwc3_core_is_valid()
1010 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_core_setup_global_control()
1012 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_core_setup_global_control()
1013 power_opt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1); in dwc3_core_setup_global_control()
1026 * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based in dwc3_core_setup_global_control()
1029 if ((dwc->dr_mode == USB_DR_MODE_HOST || in dwc3_core_setup_global_control()
1030 dwc->dr_mode == USB_DR_MODE_OTG) && in dwc3_core_setup_global_control()
1038 * REVISIT Enabling this bit so that host-mode hibernation in dwc3_core_setup_global_control()
1039 * will work. Device-mode hibernation is not yet implemented. in dwc3_core_setup_global_control()
1063 if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { in dwc3_core_setup_global_control()
1064 dev_info(dwc->dev, "Running with FPGA optimizations\n"); in dwc3_core_setup_global_control()
1065 dwc->is_fpga = true; in dwc3_core_setup_global_control()
1068 WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, in dwc3_core_setup_global_control()
1069 "disable_scramble cannot be used on non-FPGA builds\n"); in dwc3_core_setup_global_control()
1071 if (dwc->disable_scramble_quirk && dwc->is_fpga) in dwc3_core_setup_global_control()
1076 if (dwc->u2exit_lfps_quirk) in dwc3_core_setup_global_control()
1082 * and falls back to high-speed mode which causes in dwc3_core_setup_global_control()
1088 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_core_setup_global_control()
1097 struct device *dev = dwc->dev; in dwc3_set_incr_burst_type()
1108 cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); in dwc3_set_incr_burst_type()
1111 * Handle property "snps,incr-burst-type-adjustment". in dwc3_set_incr_burst_type()
1117 ntype = device_property_count_u32(dev, "snps,incr-burst-type-adjustment"); in dwc3_set_incr_burst_type()
1127 "snps,incr-burst-type-adjustment", vals, ntype); in dwc3_set_incr_burst_type()
1183 dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); in dwc3_set_incr_burst_type()
1188 u32 scale; in dwc3_set_power_down_clk_scale() local
1191 if (!dwc->susp_clk) in dwc3_set_power_down_clk_scale()
1195 * The power down scale field specifies how many suspend_clk in dwc3_set_power_down_clk_scale()
1196 * periods fit into a 16KHz clock period. When performing in dwc3_set_power_down_clk_scale()
1199 * The power down scale value is calculated using the fastest in dwc3_set_power_down_clk_scale()
1202 * rate of the suspend_clk, so only update the power down scale in dwc3_set_power_down_clk_scale()
1207 scale = DIV_ROUND_UP(clk_get_rate(dwc->susp_clk), 16000); in dwc3_set_power_down_clk_scale()
1208 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_set_power_down_clk_scale()
1209 if ((reg & DWC3_GCTL_PWRDNSCALE_MASK) < DWC3_GCTL_PWRDNSCALE(scale) || in dwc3_set_power_down_clk_scale()
1210 (reg & DWC3_GCTL_PWRDNSCALE_MASK) > DWC3_GCTL_PWRDNSCALE(scale*3)) { in dwc3_set_power_down_clk_scale()
1212 reg |= DWC3_GCTL_PWRDNSCALE(scale); in dwc3_set_power_down_clk_scale()
1213 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_set_power_down_clk_scale()
1229 if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { in dwc3_config_threshold()
1230 rx_thr_num = dwc->rx_thr_num_pkt_prd; in dwc3_config_threshold()
1231 rx_maxburst = dwc->rx_max_burst_prd; in dwc3_config_threshold()
1232 tx_thr_num = dwc->tx_thr_num_pkt_prd; in dwc3_config_threshold()
1233 tx_maxburst = dwc->tx_max_burst_prd; in dwc3_config_threshold()
1236 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1245 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1249 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1258 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1262 rx_thr_num = dwc->rx_thr_num_pkt; in dwc3_config_threshold()
1263 rx_maxburst = dwc->rx_max_burst; in dwc3_config_threshold()
1264 tx_thr_num = dwc->tx_thr_num_pkt; in dwc3_config_threshold()
1265 tx_maxburst = dwc->tx_max_burst; in dwc3_config_threshold()
1269 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1278 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1282 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1291 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1295 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1304 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1308 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1317 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1323 * dwc3_core_init - Low-level initialization of DWC3 Core
1334 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_core_init()
1340 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); in dwc3_core_init()
1346 if (!dwc->ulpi_ready) { in dwc3_core_init()
1349 if (ret == -ETIMEDOUT) { in dwc3_core_init()
1351 ret = -EPROBE_DEFER; in dwc3_core_init()
1355 dwc->ulpi_ready = true; in dwc3_core_init()
1358 if (!dwc->phys_ready) { in dwc3_core_init()
1362 dwc->phys_ready = true; in dwc3_core_init()
1376 /* Set power down scale of suspend_clk */ in dwc3_core_init()
1382 /* Adjust Reference Clock Period */ in dwc3_core_init()
1395 dev_err(dwc->dev, "failed to setup event buffers\n"); in dwc3_core_init()
1405 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); in dwc3_core_init()
1407 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); in dwc3_core_init()
1420 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); in dwc3_core_init()
1422 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); in dwc3_core_init()
1429 * re-enumeration of usb device attached. All the termsel, xcvrsel, in dwc3_core_init()
1434 if (dwc->resume_hs_terminations) { in dwc3_core_init()
1435 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); in dwc3_core_init()
1437 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); in dwc3_core_init()
1441 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); in dwc3_core_init()
1459 if (dwc->dis_tx_ipgap_linecheck_quirk) in dwc3_core_init()
1462 if (dwc->parkmode_disable_ss_quirk) in dwc3_core_init()
1465 if (dwc->parkmode_disable_hs_quirk) in dwc3_core_init()
1469 if (dwc->maximum_speed == USB_SPEED_FULL || in dwc3_core_init()
1470 dwc->maximum_speed == USB_SPEED_HIGH) in dwc3_core_init()
1476 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); in dwc3_core_init()
1487 dwc->maximum_speed == USB_SPEED_SUPER) { in dwc3_core_init()
1490 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_core_init()
1491 reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i)); in dwc3_core_init()
1493 dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg); in dwc3_core_init()
1512 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); in dwc3_core_init()
1514 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); in dwc3_core_init()
1531 struct device *dev = dwc->dev; in dwc3_core_get_phy()
1532 struct device_node *node = dev->of_node; in dwc3_core_get_phy()
1538 dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); in dwc3_core_get_phy()
1539 dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); in dwc3_core_get_phy()
1541 dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); in dwc3_core_get_phy()
1542 dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); in dwc3_core_get_phy()
1545 if (IS_ERR(dwc->usb2_phy)) { in dwc3_core_get_phy()
1546 ret = PTR_ERR(dwc->usb2_phy); in dwc3_core_get_phy()
1547 if (ret == -ENXIO || ret == -ENODEV) in dwc3_core_get_phy()
1548 dwc->usb2_phy = NULL; in dwc3_core_get_phy()
1553 if (IS_ERR(dwc->usb3_phy)) { in dwc3_core_get_phy()
1554 ret = PTR_ERR(dwc->usb3_phy); in dwc3_core_get_phy()
1555 if (ret == -ENXIO || ret == -ENODEV) in dwc3_core_get_phy()
1556 dwc->usb3_phy = NULL; in dwc3_core_get_phy()
1561 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_core_get_phy()
1562 if (dwc->num_usb2_ports == 1) in dwc3_core_get_phy()
1563 snprintf(phy_name, sizeof(phy_name), "usb2-phy"); in dwc3_core_get_phy()
1565 snprintf(phy_name, sizeof(phy_name), "usb2-%u", i); in dwc3_core_get_phy()
1567 dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name); in dwc3_core_get_phy()
1568 if (IS_ERR(dwc->usb2_generic_phy[i])) { in dwc3_core_get_phy()
1569 ret = PTR_ERR(dwc->usb2_generic_phy[i]); in dwc3_core_get_phy()
1570 if (ret == -ENOSYS || ret == -ENODEV) in dwc3_core_get_phy()
1571 dwc->usb2_generic_phy[i] = NULL; in dwc3_core_get_phy()
1578 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_core_get_phy()
1579 if (dwc->num_usb3_ports == 1) in dwc3_core_get_phy()
1580 snprintf(phy_name, sizeof(phy_name), "usb3-phy"); in dwc3_core_get_phy()
1582 snprintf(phy_name, sizeof(phy_name), "usb3-%u", i); in dwc3_core_get_phy()
1584 dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name); in dwc3_core_get_phy()
1585 if (IS_ERR(dwc->usb3_generic_phy[i])) { in dwc3_core_get_phy()
1586 ret = PTR_ERR(dwc->usb3_generic_phy[i]); in dwc3_core_get_phy()
1587 if (ret == -ENOSYS || ret == -ENODEV) in dwc3_core_get_phy()
1588 dwc->usb3_generic_phy[i] = NULL; in dwc3_core_get_phy()
1600 struct device *dev = dwc->dev; in dwc3_core_init_mode()
1604 switch (dwc->dr_mode) { in dwc3_core_init_mode()
1608 if (dwc->usb2_phy) in dwc3_core_init_mode()
1609 otg_set_vbus(dwc->usb2_phy->otg, false); in dwc3_core_init_mode()
1610 phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); in dwc3_core_init_mode()
1611 phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); in dwc3_core_init_mode()
1620 if (dwc->usb2_phy) in dwc3_core_init_mode()
1621 otg_set_vbus(dwc->usb2_phy->otg, true); in dwc3_core_init_mode()
1622 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_core_init_mode()
1623 phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); in dwc3_core_init_mode()
1624 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_core_init_mode()
1625 phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); in dwc3_core_init_mode()
1632 INIT_WORK(&dwc->drd_work, __dwc3_set_mode); in dwc3_core_init_mode()
1635 return dev_err_probe(dev, ret, "failed to initialize dual-role\n"); in dwc3_core_init_mode()
1638 dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); in dwc3_core_init_mode()
1639 return -EINVAL; in dwc3_core_init_mode()
1647 switch (dwc->dr_mode) { in dwc3_core_exit_mode()
1662 /* de-assert DRVVBUS for HOST and OTG mode */ in dwc3_core_exit_mode()
1672 dwc->gsbuscfg0_reqinfo = DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED; in dwc3_get_software_properties()
1676 * and non-DT (non-ABI) properties. in dwc3_get_software_properties()
1678 for (tmpdev = dwc->dev; tmpdev; tmpdev = tmpdev->parent) { in dwc3_get_software_properties()
1680 "snps,gsbuscfg0-reqinfo", in dwc3_get_software_properties()
1683 dwc->gsbuscfg0_reqinfo = gsbuscfg0_reqinfo; in dwc3_get_software_properties()
1689 struct device *dev = dwc->dev; in dwc3_get_properties()
1706 /* default to -3.5dB de-emphasis */ in dwc3_get_properties()
1722 dwc->maximum_speed = usb_get_maximum_speed(dev); in dwc3_get_properties()
1723 dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev); in dwc3_get_properties()
1724 dwc->dr_mode = usb_get_dr_mode(dev); in dwc3_get_properties()
1725 dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); in dwc3_get_properties()
1727 dwc->sysdev_is_parent = device_property_read_bool(dev, in dwc3_get_properties()
1729 if (dwc->sysdev_is_parent) in dwc3_get_properties()
1730 dwc->sysdev = dwc->dev->parent; in dwc3_get_properties()
1732 dwc->sysdev = dwc->dev; in dwc3_get_properties()
1734 dwc->sys_wakeup = device_may_wakeup(dwc->sysdev); in dwc3_get_properties()
1736 dwc->has_lpm_erratum = device_property_read_bool(dev, in dwc3_get_properties()
1737 "snps,has-lpm-erratum"); in dwc3_get_properties()
1738 device_property_read_u8(dev, "snps,lpm-nyet-threshold", in dwc3_get_properties()
1740 dwc->is_utmi_l1_suspend = device_property_read_bool(dev, in dwc3_get_properties()
1741 "snps,is-utmi-l1-suspend"); in dwc3_get_properties()
1742 device_property_read_u8(dev, "snps,hird-threshold", in dwc3_get_properties()
1744 dwc->dis_start_transfer_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1745 "snps,dis-start-transfer-quirk"); in dwc3_get_properties()
1746 dwc->usb3_lpm_capable = device_property_read_bool(dev, in dwc3_get_properties()
1748 dwc->usb2_lpm_disable = device_property_read_bool(dev, in dwc3_get_properties()
1749 "snps,usb2-lpm-disable"); in dwc3_get_properties()
1750 dwc->usb2_gadget_lpm_disable = device_property_read_bool(dev, in dwc3_get_properties()
1751 "snps,usb2-gadget-lpm-disable"); in dwc3_get_properties()
1752 device_property_read_u8(dev, "snps,rx-thr-num-pkt", in dwc3_get_properties()
1754 device_property_read_u8(dev, "snps,rx-max-burst", in dwc3_get_properties()
1756 device_property_read_u8(dev, "snps,tx-thr-num-pkt", in dwc3_get_properties()
1758 device_property_read_u8(dev, "snps,tx-max-burst", in dwc3_get_properties()
1760 device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", in dwc3_get_properties()
1762 device_property_read_u8(dev, "snps,rx-max-burst-prd", in dwc3_get_properties()
1764 device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", in dwc3_get_properties()
1766 device_property_read_u8(dev, "snps,tx-max-burst-prd", in dwc3_get_properties()
1768 dwc->do_fifo_resize = device_property_read_bool(dev, in dwc3_get_properties()
1769 "tx-fifo-resize"); in dwc3_get_properties()
1770 if (dwc->do_fifo_resize) in dwc3_get_properties()
1771 device_property_read_u8(dev, "tx-fifo-max-num", in dwc3_get_properties()
1774 dwc->disable_scramble_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1776 dwc->u2exit_lfps_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1778 dwc->u2ss_inp3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1780 dwc->req_p1p2p3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1782 dwc->del_p1p2p3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1784 dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1786 dwc->lfps_filter_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1788 dwc->rx_detect_poll_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1790 dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1792 dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1794 dwc->dis_enblslpm_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1796 dwc->dis_u1_entry_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1797 "snps,dis-u1-entry-quirk"); in dwc3_get_properties()
1798 dwc->dis_u2_entry_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1799 "snps,dis-u2-entry-quirk"); in dwc3_get_properties()
1800 dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1802 dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1803 "snps,dis-u2-freeclk-exists-quirk"); in dwc3_get_properties()
1804 dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1805 "snps,dis-del-phy-power-chg-quirk"); in dwc3_get_properties()
1806 dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1807 "snps,dis-tx-ipgap-linecheck-quirk"); in dwc3_get_properties()
1808 dwc->resume_hs_terminations = device_property_read_bool(dev, in dwc3_get_properties()
1809 "snps,resume-hs-terminations"); in dwc3_get_properties()
1810 dwc->ulpi_ext_vbus_drv = device_property_read_bool(dev, in dwc3_get_properties()
1811 "snps,ulpi-ext-vbus-drv"); in dwc3_get_properties()
1812 dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1813 "snps,parkmode-disable-ss-quirk"); in dwc3_get_properties()
1814 dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1815 "snps,parkmode-disable-hs-quirk"); in dwc3_get_properties()
1816 dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev, in dwc3_get_properties()
1817 "snps,gfladj-refclk-lpm-sel-quirk"); in dwc3_get_properties()
1819 dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1824 &dwc->hsphy_interface); in dwc3_get_properties()
1825 device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", in dwc3_get_properties()
1826 &dwc->fladj); in dwc3_get_properties()
1827 device_property_read_u32(dev, "snps,ref-clock-period-ns", in dwc3_get_properties()
1828 &dwc->ref_clk_per); in dwc3_get_properties()
1830 dwc->dis_metastability_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1833 dwc->dis_split_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1834 "snps,dis-split-quirk"); in dwc3_get_properties()
1836 dwc->lpm_nyet_threshold = lpm_nyet_threshold; in dwc3_get_properties()
1837 dwc->tx_de_emphasis = tx_de_emphasis; in dwc3_get_properties()
1839 dwc->hird_threshold = hird_threshold; in dwc3_get_properties()
1841 dwc->rx_thr_num_pkt = rx_thr_num_pkt; in dwc3_get_properties()
1842 dwc->rx_max_burst = rx_max_burst; in dwc3_get_properties()
1844 dwc->tx_thr_num_pkt = tx_thr_num_pkt; in dwc3_get_properties()
1845 dwc->tx_max_burst = tx_max_burst; in dwc3_get_properties()
1847 dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; in dwc3_get_properties()
1848 dwc->rx_max_burst_prd = rx_max_burst_prd; in dwc3_get_properties()
1850 dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; in dwc3_get_properties()
1851 dwc->tx_max_burst_prd = tx_max_burst_prd; in dwc3_get_properties()
1853 dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num; in dwc3_get_properties()
1866 struct device *dev = dwc->dev; in dwc3_check_params()
1868 DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3); in dwc3_check_params()
1883 dwc->imod_interval = 1; in dwc3_check_params()
1886 switch (dwc->maximum_speed) { in dwc3_check_params()
1903 dwc->maximum_speed); in dwc3_check_params()
1908 dwc->maximum_speed = USB_SPEED_SUPER_PLUS; in dwc3_check_params()
1912 dwc->maximum_speed = USB_SPEED_SUPER_PLUS; in dwc3_check_params()
1914 dwc->maximum_speed = USB_SPEED_SUPER; in dwc3_check_params()
1917 dwc->maximum_speed = USB_SPEED_HIGH; in dwc3_check_params()
1920 dwc->maximum_speed = USB_SPEED_SUPER; in dwc3_check_params()
1930 * set the default to support dual-lane for DWC_usb32 and single-lane in dwc3_check_params()
1931 * for DWC_usb31 for super-speed-plus. in dwc3_check_params()
1933 if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { in dwc3_check_params()
1934 switch (dwc->max_ssp_rate) { in dwc3_check_params()
1949 dwc->max_ssp_rate = USB_SSP_GEN_2x2; in dwc3_check_params()
1951 dwc->max_ssp_rate = USB_SSP_GEN_2x1; in dwc3_check_params()
1955 dwc->max_ssp_rate = USB_SSP_GEN_1x2; in dwc3_check_params()
1965 struct device *dev = dwc->dev; in dwc3_get_extcon()
1979 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) in dwc3_get_extcon()
1983 * Check explicitly if "usb-role-switch" is used since in dwc3_get_extcon()
1989 device_property_read_bool(dev, "usb-role-switch")) in dwc3_get_extcon()
1996 * device (and "port" node) may be missing in case of "usb-role-switch" in dwc3_get_extcon()
1999 np_phy = of_parse_phandle(dev->of_node, "phys", 0); in dwc3_get_extcon()
2003 np_conn = of_graph_get_remote_node(np_phy, -1, -1); in dwc3_get_extcon()
2015 struct device *dev = dwc->dev; in dwc3_get_clocks()
2017 if (!dev->of_node) in dwc3_get_clocks()
2022 * as required by the DT-binding. in dwc3_get_clocks()
2026 dwc->bus_clk = devm_clk_get_optional(dev, "bus_early"); in dwc3_get_clocks()
2027 if (IS_ERR(dwc->bus_clk)) { in dwc3_get_clocks()
2028 return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), in dwc3_get_clocks()
2032 if (dwc->bus_clk == NULL) { in dwc3_get_clocks()
2033 dwc->bus_clk = devm_clk_get_optional(dev, "bus_clk"); in dwc3_get_clocks()
2034 if (IS_ERR(dwc->bus_clk)) { in dwc3_get_clocks()
2035 return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), in dwc3_get_clocks()
2040 dwc->ref_clk = devm_clk_get_optional(dev, "ref"); in dwc3_get_clocks()
2041 if (IS_ERR(dwc->ref_clk)) { in dwc3_get_clocks()
2042 return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), in dwc3_get_clocks()
2046 if (dwc->ref_clk == NULL) { in dwc3_get_clocks()
2047 dwc->ref_clk = devm_clk_get_optional(dev, "ref_clk"); in dwc3_get_clocks()
2048 if (IS_ERR(dwc->ref_clk)) { in dwc3_get_clocks()
2049 return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), in dwc3_get_clocks()
2054 dwc->susp_clk = devm_clk_get_optional(dev, "suspend"); in dwc3_get_clocks()
2055 if (IS_ERR(dwc->susp_clk)) { in dwc3_get_clocks()
2056 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), in dwc3_get_clocks()
2060 if (dwc->susp_clk == NULL) { in dwc3_get_clocks()
2061 dwc->susp_clk = devm_clk_get_optional(dev, "suspend_clk"); in dwc3_get_clocks()
2062 if (IS_ERR(dwc->susp_clk)) { in dwc3_get_clocks()
2063 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), in dwc3_get_clocks()
2069 dwc->utmi_clk = devm_clk_get_optional(dev, "utmi"); in dwc3_get_clocks()
2070 if (IS_ERR(dwc->utmi_clk)) { in dwc3_get_clocks()
2071 return dev_err_probe(dev, PTR_ERR(dwc->utmi_clk), in dwc3_get_clocks()
2076 dwc->pipe_clk = devm_clk_get_optional(dev, "pipe"); in dwc3_get_clocks()
2077 if (IS_ERR(dwc->pipe_clk)) { in dwc3_get_clocks()
2078 return dev_err_probe(dev, PTR_ERR(dwc->pipe_clk), in dwc3_get_clocks()
2096 base = ioremap(dwc->xhci_resources[0].start, in dwc3_get_num_ports()
2097 resource_size(&dwc->xhci_resources[0])); in dwc3_get_num_ports()
2099 return -ENOMEM; in dwc3_get_num_ports()
2113 dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); in dwc3_get_num_ports()
2115 dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); in dwc3_get_num_ports()
2117 dev_warn(dwc->dev, "unrecognized port major revision %d\n", in dwc3_get_num_ports()
2122 dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", in dwc3_get_num_ports()
2123 dwc->num_usb2_ports, dwc->num_usb3_ports); in dwc3_get_num_ports()
2127 if (dwc->num_usb2_ports > DWC3_USB2_MAX_PORTS || in dwc3_get_num_ports()
2128 dwc->num_usb3_ports > DWC3_USB3_MAX_PORTS) in dwc3_get_num_ports()
2129 return -EINVAL; in dwc3_get_num_ports()
2140 ret = device_property_read_string(dwc->dev, "usb-psy-name", &usb_psy_name); in dwc3_get_usb_power_supply()
2146 return ERR_PTR(-EPROBE_DEFER); in dwc3_get_usb_power_supply()
2153 struct device *dev = &pdev->dev; in dwc3_probe()
2162 return -ENOMEM; in dwc3_probe()
2164 dwc->dev = dev; in dwc3_probe()
2169 return -ENODEV; in dwc3_probe()
2172 dwc->xhci_resources[0].start = res->start; in dwc3_probe()
2173 dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + in dwc3_probe()
2175 dwc->xhci_resources[0].flags = res->flags; in dwc3_probe()
2176 dwc->xhci_resources[0].name = res->name; in dwc3_probe()
2180 * since it will be requested by the xhci-plat driver. in dwc3_probe()
2185 if (dev->of_node) { in dwc3_probe()
2186 struct device_node *parent = of_get_parent(dev->of_node); in dwc3_probe()
2188 if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) { in dwc3_probe()
2189 dwc_res.start -= DWC3_GLOBALS_REGS_START; in dwc3_probe()
2200 dwc->regs = regs; in dwc3_probe()
2201 dwc->regs_size = resource_size(&dwc_res); in dwc3_probe()
2207 dwc->usb_psy = dwc3_get_usb_power_supply(dwc); in dwc3_probe()
2208 if (IS_ERR(dwc->usb_psy)) in dwc3_probe()
2209 return dev_err_probe(dev, PTR_ERR(dwc->usb_psy), "couldn't get usb power supply\n"); in dwc3_probe()
2211 dwc->reset = devm_reset_control_array_get_optional_shared(dev); in dwc3_probe()
2212 if (IS_ERR(dwc->reset)) { in dwc3_probe()
2213 ret = PTR_ERR(dwc->reset); in dwc3_probe()
2221 ret = reset_control_deassert(dwc->reset); in dwc3_probe()
2230 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); in dwc3_probe()
2231 ret = -ENODEV; in dwc3_probe()
2238 if (!dwc->sysdev_is_parent && in dwc3_probe()
2239 DWC3_GHWPARAMS0_AWIDTH(dwc->hwparams.hwparams0) == 64) { in dwc3_probe()
2240 ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64)); in dwc3_probe()
2246 * Currently only DWC3 controllers that are host-only capable in dwc3_probe()
2249 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_probe()
2255 dwc->num_usb2_ports = 1; in dwc3_probe()
2256 dwc->num_usb3_ports = 1; in dwc3_probe()
2259 spin_lock_init(&dwc->lock); in dwc3_probe()
2260 mutex_init(&dwc->mutex); in dwc3_probe()
2272 dev_err(dwc->dev, "failed to allocate event buffers\n"); in dwc3_probe()
2273 ret = -ENOMEM; in dwc3_probe()
2277 dwc->edev = dwc3_get_extcon(dwc); in dwc3_probe()
2278 if (IS_ERR(dwc->edev)) { in dwc3_probe()
2279 ret = dev_err_probe(dwc->dev, PTR_ERR(dwc->edev), "failed to get extcon\n"); in dwc3_probe()
2323 reset_control_assert(dwc->reset); in dwc3_probe()
2325 if (dwc->usb_psy) in dwc3_probe()
2326 power_supply_put(dwc->usb_psy); in dwc3_probe()
2335 pm_runtime_get_sync(&pdev->dev); in dwc3_remove()
2343 pm_runtime_allow(&pdev->dev); in dwc3_remove()
2344 pm_runtime_disable(&pdev->dev); in dwc3_remove()
2345 pm_runtime_dont_use_autosuspend(&pdev->dev); in dwc3_remove()
2346 pm_runtime_put_noidle(&pdev->dev); in dwc3_remove()
2352 pm_runtime_set_suspended(&pdev->dev); in dwc3_remove()
2356 if (dwc->usb_psy) in dwc3_remove()
2357 power_supply_put(dwc->usb_psy); in dwc3_remove()
2365 ret = reset_control_deassert(dwc->reset); in dwc3_core_init_for_resume()
2382 reset_control_assert(dwc->reset); in dwc3_core_init_for_resume()
2392 if (!pm_runtime_suspended(dwc->dev) && !PMSG_IS_AUTO(msg)) { in dwc3_suspend_common()
2393 dwc->susphy_state = (dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)) & in dwc3_suspend_common()
2395 (dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)) & in dwc3_suspend_common()
2401 if (!dwc->susphy_state) in dwc3_suspend_common()
2405 switch (dwc->current_dr_role) { in dwc3_suspend_common()
2407 if (pm_runtime_suspended(dwc->dev)) in dwc3_suspend_common()
2410 synchronize_irq(dwc->irq_gadget); in dwc3_suspend_common()
2414 if (!PMSG_IS_AUTO(msg) && !device_may_wakeup(dwc->dev)) { in dwc3_suspend_common()
2420 if (dwc->dis_u2_susphy_quirk || in dwc3_suspend_common()
2421 dwc->dis_enblslpm_quirk) { in dwc3_suspend_common()
2422 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_suspend_common()
2423 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_suspend_common()
2426 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_suspend_common()
2433 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_suspend_common()
2434 phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]); in dwc3_suspend_common()
2435 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_suspend_common()
2436 phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]); in dwc3_suspend_common()
2443 if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { in dwc3_suspend_common()
2445 synchronize_irq(dwc->irq_gadget); in dwc3_suspend_common()
2465 switch (dwc->current_dr_role) { in dwc3_resume_common()
2475 if (!PMSG_IS_AUTO(msg) && !device_may_wakeup(dwc->dev)) { in dwc3_resume_common()
2483 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_resume_common()
2484 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_resume_common()
2485 if (dwc->dis_u2_susphy_quirk) in dwc3_resume_common()
2488 if (dwc->dis_enblslpm_quirk) in dwc3_resume_common()
2491 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_resume_common()
2494 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_resume_common()
2495 phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]); in dwc3_resume_common()
2496 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_resume_common()
2497 phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]); in dwc3_resume_common()
2508 dwc3_set_prtcap(dwc, dwc->current_dr_role, true); in dwc3_resume_common()
2511 if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { in dwc3_resume_common()
2513 } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { in dwc3_resume_common()
2525 dwc3_enable_susphy(dwc, dwc->susphy_state); in dwc3_resume_common()
2533 switch (dwc->current_dr_role) { in dwc3_runtime_checks()
2535 if (dwc->connected) in dwc3_runtime_checks()
2536 return -EBUSY; in dwc3_runtime_checks()
2553 return -EBUSY; in dwc3_runtime_suspend()
2571 switch (dwc->current_dr_role) { in dwc3_runtime_resume()
2573 if (dwc->pending_events) { in dwc3_runtime_resume()
2574 pm_runtime_put(dwc->dev); in dwc3_runtime_resume()
2575 dwc->pending_events = false; in dwc3_runtime_resume()
2576 enable_irq(dwc->irq_gadget); in dwc3_runtime_resume()
2594 switch (dwc->current_dr_role) { in dwc3_runtime_idle()
2597 return -EBUSY; in dwc3_runtime_idle()
2654 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && in dwc3_complete()
2655 dwc->dis_split_quirk) { in dwc3_complete()
2656 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); in dwc3_complete()
2658 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); in dwc3_complete()