Lines Matching +full:burst +full:- +full:length
1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - DesignWare USB3 DRD Controller Core file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
24 #include <linux/dma-mapping.h>
42 #include "../host/xhci-ext-caps.h"
47 * dwc3_get_dr_mode - Validates and sets dr_mode
53 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
56 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
57 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
59 mode = dwc->dr_mode; in dwc3_get_dr_mode()
60 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()
67 return -EINVAL; in dwc3_get_dr_mode()
75 return -EINVAL; in dwc3_get_dr_mode()
90 if (mode == USB_DR_MODE_OTG && !dwc->edev && in dwc3_get_dr_mode()
92 !device_property_read_bool(dwc->dev, "usb-role-switch")) && in dwc3_get_dr_mode()
97 if (mode != dwc->dr_mode) { in dwc3_get_dr_mode()
102 dwc->dr_mode = mode; in dwc3_get_dr_mode()
113 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_enable_susphy()
114 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i)); in dwc3_enable_susphy()
115 if (enable && !dwc->dis_u3_susphy_quirk) in dwc3_enable_susphy()
120 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg); in dwc3_enable_susphy()
123 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_enable_susphy()
124 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_enable_susphy()
125 if (enable && !dwc->dis_u2_susphy_quirk) in dwc3_enable_susphy()
130 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_enable_susphy()
138 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_set_prtcap()
141 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_set_prtcap()
143 dwc->current_dr_role = mode; in dwc3_set_prtcap()
155 mutex_lock(&dwc->mutex); in __dwc3_set_mode()
156 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
157 desired_dr_role = dwc->desired_dr_role; in __dwc3_set_mode()
158 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
160 pm_runtime_get_sync(dwc->dev); in __dwc3_set_mode()
162 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) in __dwc3_set_mode()
168 if (desired_dr_role == dwc->current_dr_role) in __dwc3_set_mode()
171 if (desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) in __dwc3_set_mode()
174 switch (dwc->current_dr_role) { in __dwc3_set_mode()
184 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
185 dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; in __dwc3_set_mode()
186 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
197 if (dwc->current_dr_role && ((DWC3_IP_IS(DWC3) || in __dwc3_set_mode()
200 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in __dwc3_set_mode()
202 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in __dwc3_set_mode()
212 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in __dwc3_set_mode()
214 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in __dwc3_set_mode()
217 spin_lock_irqsave(&dwc->lock, flags); in __dwc3_set_mode()
221 spin_unlock_irqrestore(&dwc->lock, flags); in __dwc3_set_mode()
227 dev_err(dwc->dev, "failed to initialize host\n"); in __dwc3_set_mode()
229 if (dwc->usb2_phy) in __dwc3_set_mode()
230 otg_set_vbus(dwc->usb2_phy->otg, true); in __dwc3_set_mode()
232 for (i = 0; i < dwc->num_usb2_ports; i++) in __dwc3_set_mode()
233 phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); in __dwc3_set_mode()
234 for (i = 0; i < dwc->num_usb3_ports; i++) in __dwc3_set_mode()
235 phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); in __dwc3_set_mode()
237 if (dwc->dis_split_quirk) { in __dwc3_set_mode()
238 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); in __dwc3_set_mode()
240 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); in __dwc3_set_mode()
249 if (dwc->usb2_phy) in __dwc3_set_mode()
250 otg_set_vbus(dwc->usb2_phy->otg, false); in __dwc3_set_mode()
251 phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); in __dwc3_set_mode()
252 phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); in __dwc3_set_mode()
256 dev_err(dwc->dev, "failed to initialize peripheral\n"); in __dwc3_set_mode()
267 pm_runtime_mark_last_busy(dwc->dev); in __dwc3_set_mode()
268 pm_runtime_put_autosuspend(dwc->dev); in __dwc3_set_mode()
269 mutex_unlock(&dwc->mutex); in __dwc3_set_mode()
276 if (dwc->dr_mode != USB_DR_MODE_OTG) in dwc3_set_mode()
279 spin_lock_irqsave(&dwc->lock, flags); in dwc3_set_mode()
280 dwc->desired_dr_role = mode; in dwc3_set_mode()
281 spin_unlock_irqrestore(&dwc->lock, flags); in dwc3_set_mode()
283 queue_work(system_freezable_wq, &dwc->drd_work); in dwc3_set_mode()
288 struct dwc3 *dwc = dep->dwc; in dwc3_core_fifo_space()
291 dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, in dwc3_core_fifo_space()
292 DWC3_GDBGFIFOSPACE_NUM(dep->number) | in dwc3_core_fifo_space()
295 reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); in dwc3_core_fifo_space()
301 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
312 * host-only mode, then we can return early. in dwc3_core_soft_reset()
314 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) in dwc3_core_soft_reset()
317 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_core_soft_reset()
332 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_core_soft_reset()
340 } while (--retries); in dwc3_core_soft_reset()
342 dev_warn(dwc->dev, "DWC3 controller soft reset failed.\n"); in dwc3_core_soft_reset()
343 return -ETIMEDOUT; in dwc3_core_soft_reset()
358 * dwc3_frame_length_adjustment - Adjusts frame length if required
369 if (dwc->fladj == 0) in dwc3_frame_length_adjustment()
372 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); in dwc3_frame_length_adjustment()
374 if (dft != dwc->fladj) { in dwc3_frame_length_adjustment()
376 reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; in dwc3_frame_length_adjustment()
377 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); in dwc3_frame_length_adjustment()
382 * dwc3_ref_clk_period - Reference clock period configuration
397 if (dwc->ref_clk) { in dwc3_ref_clk_period()
398 rate = clk_get_rate(dwc->ref_clk); in dwc3_ref_clk_period()
402 } else if (dwc->ref_clk_per) { in dwc3_ref_clk_period()
403 period = dwc->ref_clk_per; in dwc3_ref_clk_period()
409 reg = dwc3_readl(dwc->regs, DWC3_GUCTL); in dwc3_ref_clk_period()
412 dwc3_writel(dwc->regs, DWC3_GUCTL, reg); in dwc3_ref_clk_period()
420 * 125000 * (NSEC_PER_SEC / (rate * period) - 1) in dwc3_ref_clk_period()
422 * but rearranged for fixed-point arithmetic. The division must be in dwc3_ref_clk_period()
423 * 64-bit because 125000 * NSEC_PER_SEC doesn't fit in 32 bits (and in dwc3_ref_clk_period()
433 fladj -= 125000; in dwc3_ref_clk_period()
440 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); in dwc3_ref_clk_period()
448 if (dwc->gfladj_refclk_lpm_sel) in dwc3_ref_clk_period()
451 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); in dwc3_ref_clk_period()
455 * dwc3_free_one_event_buffer - Frees one event buffer
462 dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); in dwc3_free_one_event_buffer()
466 * dwc3_alloc_one_event_buffer - Allocates one event buffer structure
468 * @length: size of the event buffer
474 unsigned int length) in dwc3_alloc_one_event_buffer() argument
478 evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); in dwc3_alloc_one_event_buffer()
480 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
482 evt->dwc = dwc; in dwc3_alloc_one_event_buffer()
483 evt->length = length; in dwc3_alloc_one_event_buffer()
484 evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); in dwc3_alloc_one_event_buffer()
485 if (!evt->cache) in dwc3_alloc_one_event_buffer()
486 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
488 evt->buf = dma_alloc_coherent(dwc->sysdev, length, in dwc3_alloc_one_event_buffer()
489 &evt->dma, GFP_KERNEL); in dwc3_alloc_one_event_buffer()
490 if (!evt->buf) in dwc3_alloc_one_event_buffer()
491 return ERR_PTR(-ENOMEM); in dwc3_alloc_one_event_buffer()
497 * dwc3_free_event_buffers - frees all allocated event buffers
504 evt = dwc->ev_buf; in dwc3_free_event_buffers()
510 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
512 * @length: size of event buffer
517 static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length) in dwc3_alloc_event_buffers() argument
522 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_alloc_event_buffers()
524 dwc->ev_buf = NULL; in dwc3_alloc_event_buffers()
528 evt = dwc3_alloc_one_event_buffer(dwc, length); in dwc3_alloc_event_buffers()
530 dev_err(dwc->dev, "can't allocate event buffer\n"); in dwc3_alloc_event_buffers()
533 dwc->ev_buf = evt; in dwc3_alloc_event_buffers()
539 * dwc3_event_buffers_setup - setup our allocated event buffers
549 if (!dwc->ev_buf) in dwc3_event_buffers_setup()
552 evt = dwc->ev_buf; in dwc3_event_buffers_setup()
553 evt->lpos = 0; in dwc3_event_buffers_setup()
554 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), in dwc3_event_buffers_setup()
555 lower_32_bits(evt->dma)); in dwc3_event_buffers_setup()
556 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), in dwc3_event_buffers_setup()
557 upper_32_bits(evt->dma)); in dwc3_event_buffers_setup()
558 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), in dwc3_event_buffers_setup()
559 DWC3_GEVNTSIZ_SIZE(evt->length)); in dwc3_event_buffers_setup()
562 reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0)); in dwc3_event_buffers_setup()
563 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg); in dwc3_event_buffers_setup()
572 if (!dwc->ev_buf) in dwc3_event_buffers_cleanup()
578 reg = dwc3_readl(dwc->regs, DWC3_DSTS); in dwc3_event_buffers_cleanup()
582 evt = dwc->ev_buf; in dwc3_event_buffers_cleanup()
584 evt->lpos = 0; in dwc3_event_buffers_cleanup()
586 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); in dwc3_event_buffers_cleanup()
587 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); in dwc3_event_buffers_cleanup()
588 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK in dwc3_event_buffers_cleanup()
592 reg = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0)); in dwc3_event_buffers_cleanup()
593 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), reg); in dwc3_event_buffers_cleanup()
598 struct dwc3_hwparams *parms = &dwc->hwparams; in dwc3_core_num_eps()
600 dwc->num_eps = DWC3_NUM_EPS(parms); in dwc3_core_num_eps()
605 struct dwc3_hwparams *parms = &dwc->hwparams; in dwc3_cache_hwparams()
607 parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); in dwc3_cache_hwparams()
608 parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); in dwc3_cache_hwparams()
609 parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); in dwc3_cache_hwparams()
610 parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); in dwc3_cache_hwparams()
611 parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); in dwc3_cache_hwparams()
612 parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); in dwc3_cache_hwparams()
613 parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); in dwc3_cache_hwparams()
614 parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); in dwc3_cache_hwparams()
615 parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); in dwc3_cache_hwparams()
618 parms->hwparams9 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS9); in dwc3_cache_hwparams()
623 if (dwc->gsbuscfg0_reqinfo != DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED) { in dwc3_config_soc_bus()
626 reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); in dwc3_config_soc_bus()
628 reg |= DWC3_GSBUSCFG0_REQINFO(dwc->gsbuscfg0_reqinfo); in dwc3_config_soc_bus()
629 dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg); in dwc3_config_soc_bus()
638 intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); in dwc3_core_ulpi_init()
642 dwc->hsphy_interface && in dwc3_core_ulpi_init()
643 !strncmp(dwc->hsphy_interface, "ulpi", 4))) in dwc3_core_ulpi_init()
653 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index)); in dwc3_ss_phy_setup()
668 * cleared after power-on reset, and it can be set after core in dwc3_ss_phy_setup()
673 if (dwc->u2ss_inp3_quirk) in dwc3_ss_phy_setup()
676 if (dwc->dis_rxdet_inp3_quirk) in dwc3_ss_phy_setup()
679 if (dwc->req_p1p2p3_quirk) in dwc3_ss_phy_setup()
682 if (dwc->del_p1p2p3_quirk) in dwc3_ss_phy_setup()
685 if (dwc->del_phy_power_chg_quirk) in dwc3_ss_phy_setup()
688 if (dwc->lfps_filter_quirk) in dwc3_ss_phy_setup()
691 if (dwc->rx_detect_poll_quirk) in dwc3_ss_phy_setup()
694 if (dwc->tx_de_emphasis_quirk) in dwc3_ss_phy_setup()
695 reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); in dwc3_ss_phy_setup()
697 if (dwc->dis_del_phy_power_chg_quirk) in dwc3_ss_phy_setup()
700 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg); in dwc3_ss_phy_setup()
709 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index)); in dwc3_hs_phy_setup()
712 switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { in dwc3_hs_phy_setup()
714 if (dwc->hsphy_interface && in dwc3_hs_phy_setup()
715 !strncmp(dwc->hsphy_interface, "utmi", 4)) { in dwc3_hs_phy_setup()
718 } else if (dwc->hsphy_interface && in dwc3_hs_phy_setup()
719 !strncmp(dwc->hsphy_interface, "ulpi", 4)) { in dwc3_hs_phy_setup()
721 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); in dwc3_hs_phy_setup()
733 switch (dwc->hsphy_mode) { in dwc3_hs_phy_setup()
757 * after power-on reset, and it can be set after core initialization. in dwc3_hs_phy_setup()
761 if (dwc->dis_enblslpm_quirk) in dwc3_hs_phy_setup()
766 if (dwc->dis_u2_freeclk_exists_quirk || dwc->gfladj_refclk_lpm_sel) in dwc3_hs_phy_setup()
776 if (dwc->ulpi_ext_vbus_drv) in dwc3_hs_phy_setup()
779 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); in dwc3_hs_phy_setup()
785 * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
797 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_phy_setup()
803 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_setup()
818 usb_phy_init(dwc->usb2_phy); in dwc3_phy_init()
819 usb_phy_init(dwc->usb3_phy); in dwc3_phy_init()
821 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_init()
822 ret = phy_init(dwc->usb2_generic_phy[i]); in dwc3_phy_init()
827 for (j = 0; j < dwc->num_usb3_ports; j++) { in dwc3_phy_init()
828 ret = phy_init(dwc->usb3_generic_phy[j]); in dwc3_phy_init()
836 while (--j >= 0) in dwc3_phy_init()
837 phy_exit(dwc->usb3_generic_phy[j]); in dwc3_phy_init()
840 while (--i >= 0) in dwc3_phy_init()
841 phy_exit(dwc->usb2_generic_phy[i]); in dwc3_phy_init()
843 usb_phy_shutdown(dwc->usb3_phy); in dwc3_phy_init()
844 usb_phy_shutdown(dwc->usb2_phy); in dwc3_phy_init()
853 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_phy_exit()
854 phy_exit(dwc->usb3_generic_phy[i]); in dwc3_phy_exit()
856 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_phy_exit()
857 phy_exit(dwc->usb2_generic_phy[i]); in dwc3_phy_exit()
859 usb_phy_shutdown(dwc->usb3_phy); in dwc3_phy_exit()
860 usb_phy_shutdown(dwc->usb2_phy); in dwc3_phy_exit()
869 usb_phy_set_suspend(dwc->usb2_phy, 0); in dwc3_phy_power_on()
870 usb_phy_set_suspend(dwc->usb3_phy, 0); in dwc3_phy_power_on()
872 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_phy_power_on()
873 ret = phy_power_on(dwc->usb2_generic_phy[i]); in dwc3_phy_power_on()
878 for (j = 0; j < dwc->num_usb3_ports; j++) { in dwc3_phy_power_on()
879 ret = phy_power_on(dwc->usb3_generic_phy[j]); in dwc3_phy_power_on()
887 while (--j >= 0) in dwc3_phy_power_on()
888 phy_power_off(dwc->usb3_generic_phy[j]); in dwc3_phy_power_on()
891 while (--i >= 0) in dwc3_phy_power_on()
892 phy_power_off(dwc->usb2_generic_phy[i]); in dwc3_phy_power_on()
894 usb_phy_set_suspend(dwc->usb3_phy, 1); in dwc3_phy_power_on()
895 usb_phy_set_suspend(dwc->usb2_phy, 1); in dwc3_phy_power_on()
904 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_phy_power_off()
905 phy_power_off(dwc->usb3_generic_phy[i]); in dwc3_phy_power_off()
907 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_phy_power_off()
908 phy_power_off(dwc->usb2_generic_phy[i]); in dwc3_phy_power_off()
910 usb_phy_set_suspend(dwc->usb3_phy, 1); in dwc3_phy_power_off()
911 usb_phy_set_suspend(dwc->usb2_phy, 1); in dwc3_phy_power_off()
918 ret = clk_prepare_enable(dwc->bus_clk); in dwc3_clk_enable()
922 ret = clk_prepare_enable(dwc->ref_clk); in dwc3_clk_enable()
926 ret = clk_prepare_enable(dwc->susp_clk); in dwc3_clk_enable()
930 ret = clk_prepare_enable(dwc->utmi_clk); in dwc3_clk_enable()
934 ret = clk_prepare_enable(dwc->pipe_clk); in dwc3_clk_enable()
941 clk_disable_unprepare(dwc->utmi_clk); in dwc3_clk_enable()
943 clk_disable_unprepare(dwc->susp_clk); in dwc3_clk_enable()
945 clk_disable_unprepare(dwc->ref_clk); in dwc3_clk_enable()
947 clk_disable_unprepare(dwc->bus_clk); in dwc3_clk_enable()
953 clk_disable_unprepare(dwc->pipe_clk); in dwc3_clk_disable()
954 clk_disable_unprepare(dwc->utmi_clk); in dwc3_clk_disable()
955 clk_disable_unprepare(dwc->susp_clk); in dwc3_clk_disable()
956 clk_disable_unprepare(dwc->ref_clk); in dwc3_clk_disable()
957 clk_disable_unprepare(dwc->bus_clk); in dwc3_clk_disable()
966 reset_control_assert(dwc->reset); in dwc3_core_exit()
973 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); in dwc3_core_is_valid()
974 dwc->ip = DWC3_GSNPS_ID(reg); in dwc3_core_is_valid()
978 dwc->revision = reg; in dwc3_core_is_valid()
980 dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); in dwc3_core_is_valid()
981 dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); in dwc3_core_is_valid()
995 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_core_setup_global_control()
997 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_core_setup_global_control()
998 power_opt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1); in dwc3_core_setup_global_control()
1011 * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based in dwc3_core_setup_global_control()
1014 if ((dwc->dr_mode == USB_DR_MODE_HOST || in dwc3_core_setup_global_control()
1015 dwc->dr_mode == USB_DR_MODE_OTG) && in dwc3_core_setup_global_control()
1023 * REVISIT Enabling this bit so that host-mode hibernation in dwc3_core_setup_global_control()
1024 * will work. Device-mode hibernation is not yet implemented. in dwc3_core_setup_global_control()
1048 if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { in dwc3_core_setup_global_control()
1049 dev_info(dwc->dev, "Running with FPGA optimizations\n"); in dwc3_core_setup_global_control()
1050 dwc->is_fpga = true; in dwc3_core_setup_global_control()
1053 WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, in dwc3_core_setup_global_control()
1054 "disable_scramble cannot be used on non-FPGA builds\n"); in dwc3_core_setup_global_control()
1056 if (dwc->disable_scramble_quirk && dwc->is_fpga) in dwc3_core_setup_global_control()
1061 if (dwc->u2exit_lfps_quirk) in dwc3_core_setup_global_control()
1067 * and falls back to high-speed mode which causes in dwc3_core_setup_global_control()
1073 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_core_setup_global_control()
1079 /* set global incr burst type configuration registers */
1082 struct device *dev = dwc->dev; in dwc3_set_incr_burst_type()
1083 /* incrx_mode : for INCR burst type. */ in dwc3_set_incr_burst_type()
1085 /* incrx_size : for size of INCRX burst. */ in dwc3_set_incr_burst_type()
1093 cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); in dwc3_set_incr_burst_type()
1096 * Handle property "snps,incr-burst-type-adjustment". in dwc3_set_incr_burst_type()
1099 * result = 1, means INCRx burst mode supported. in dwc3_set_incr_burst_type()
1100 * result > 1, means undefined length burst mode supported. in dwc3_set_incr_burst_type()
1102 ntype = device_property_count_u32(dev, "snps,incr-burst-type-adjustment"); in dwc3_set_incr_burst_type()
1110 /* Get INCR burst type, and parse it */ in dwc3_set_incr_burst_type()
1112 "snps,incr-burst-type-adjustment", vals, ntype); in dwc3_set_incr_burst_type()
1122 /* INCRX (undefined length) burst mode */ in dwc3_set_incr_burst_type()
1129 /* INCRX burst mode */ in dwc3_set_incr_burst_type()
1135 /* Enable Undefined Length INCR Burst and Enable INCRx Burst */ in dwc3_set_incr_burst_type()
1168 dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); in dwc3_set_incr_burst_type()
1176 if (!dwc->susp_clk) in dwc3_set_power_down_clk_scale()
1192 scale = DIV_ROUND_UP(clk_get_rate(dwc->susp_clk), 16000); in dwc3_set_power_down_clk_scale()
1193 reg = dwc3_readl(dwc->regs, DWC3_GCTL); in dwc3_set_power_down_clk_scale()
1198 dwc3_writel(dwc->regs, DWC3_GCTL, reg); in dwc3_set_power_down_clk_scale()
1211 * Must config both number of packets and max burst settings to enable in dwc3_config_threshold()
1214 if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { in dwc3_config_threshold()
1215 rx_thr_num = dwc->rx_thr_num_pkt_prd; in dwc3_config_threshold()
1216 rx_maxburst = dwc->rx_max_burst_prd; in dwc3_config_threshold()
1217 tx_thr_num = dwc->tx_thr_num_pkt_prd; in dwc3_config_threshold()
1218 tx_maxburst = dwc->tx_max_burst_prd; in dwc3_config_threshold()
1221 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1230 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1234 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1243 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1247 rx_thr_num = dwc->rx_thr_num_pkt; in dwc3_config_threshold()
1248 rx_maxburst = dwc->rx_max_burst; in dwc3_config_threshold()
1249 tx_thr_num = dwc->tx_thr_num_pkt; in dwc3_config_threshold()
1250 tx_maxburst = dwc->tx_max_burst; in dwc3_config_threshold()
1254 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1263 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1267 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1276 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1280 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); in dwc3_config_threshold()
1289 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); in dwc3_config_threshold()
1293 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); in dwc3_config_threshold()
1302 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); in dwc3_config_threshold()
1308 * dwc3_core_init - Low-level initialization of DWC3 Core
1319 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_core_init()
1325 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); in dwc3_core_init()
1331 if (!dwc->ulpi_ready) { in dwc3_core_init()
1334 if (ret == -ETIMEDOUT) { in dwc3_core_init()
1336 ret = -EPROBE_DEFER; in dwc3_core_init()
1340 dwc->ulpi_ready = true; in dwc3_core_init()
1343 if (!dwc->phys_ready) { in dwc3_core_init()
1347 dwc->phys_ready = true; in dwc3_core_init()
1364 /* Adjust Frame Length */ in dwc3_core_init()
1380 dev_err(dwc->dev, "failed to setup event buffers\n"); in dwc3_core_init()
1390 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); in dwc3_core_init()
1392 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); in dwc3_core_init()
1405 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); in dwc3_core_init()
1407 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); in dwc3_core_init()
1414 * re-enumeration of usb device attached. All the termsel, xcvrsel, in dwc3_core_init()
1419 if (dwc->resume_hs_terminations) { in dwc3_core_init()
1420 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); in dwc3_core_init()
1422 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); in dwc3_core_init()
1426 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); in dwc3_core_init()
1444 if (dwc->dis_tx_ipgap_linecheck_quirk) in dwc3_core_init()
1447 if (dwc->parkmode_disable_ss_quirk) in dwc3_core_init()
1450 if (dwc->parkmode_disable_hs_quirk) in dwc3_core_init()
1454 if (dwc->maximum_speed == USB_SPEED_FULL || in dwc3_core_init()
1455 dwc->maximum_speed == USB_SPEED_HIGH) in dwc3_core_init()
1461 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); in dwc3_core_init()
1472 dwc->maximum_speed == USB_SPEED_SUPER) { in dwc3_core_init()
1475 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_core_init()
1476 reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i)); in dwc3_core_init()
1478 dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg); in dwc3_core_init()
1496 struct device *dev = dwc->dev; in dwc3_core_get_phy()
1497 struct device_node *node = dev->of_node; in dwc3_core_get_phy()
1503 dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); in dwc3_core_get_phy()
1504 dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); in dwc3_core_get_phy()
1506 dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); in dwc3_core_get_phy()
1507 dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); in dwc3_core_get_phy()
1510 if (IS_ERR(dwc->usb2_phy)) { in dwc3_core_get_phy()
1511 ret = PTR_ERR(dwc->usb2_phy); in dwc3_core_get_phy()
1512 if (ret == -ENXIO || ret == -ENODEV) in dwc3_core_get_phy()
1513 dwc->usb2_phy = NULL; in dwc3_core_get_phy()
1518 if (IS_ERR(dwc->usb3_phy)) { in dwc3_core_get_phy()
1519 ret = PTR_ERR(dwc->usb3_phy); in dwc3_core_get_phy()
1520 if (ret == -ENXIO || ret == -ENODEV) in dwc3_core_get_phy()
1521 dwc->usb3_phy = NULL; in dwc3_core_get_phy()
1526 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_core_get_phy()
1527 if (dwc->num_usb2_ports == 1) in dwc3_core_get_phy()
1528 snprintf(phy_name, sizeof(phy_name), "usb2-phy"); in dwc3_core_get_phy()
1530 snprintf(phy_name, sizeof(phy_name), "usb2-%u", i); in dwc3_core_get_phy()
1532 dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name); in dwc3_core_get_phy()
1533 if (IS_ERR(dwc->usb2_generic_phy[i])) { in dwc3_core_get_phy()
1534 ret = PTR_ERR(dwc->usb2_generic_phy[i]); in dwc3_core_get_phy()
1535 if (ret == -ENOSYS || ret == -ENODEV) in dwc3_core_get_phy()
1536 dwc->usb2_generic_phy[i] = NULL; in dwc3_core_get_phy()
1543 for (i = 0; i < dwc->num_usb3_ports; i++) { in dwc3_core_get_phy()
1544 if (dwc->num_usb3_ports == 1) in dwc3_core_get_phy()
1545 snprintf(phy_name, sizeof(phy_name), "usb3-phy"); in dwc3_core_get_phy()
1547 snprintf(phy_name, sizeof(phy_name), "usb3-%u", i); in dwc3_core_get_phy()
1549 dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name); in dwc3_core_get_phy()
1550 if (IS_ERR(dwc->usb3_generic_phy[i])) { in dwc3_core_get_phy()
1551 ret = PTR_ERR(dwc->usb3_generic_phy[i]); in dwc3_core_get_phy()
1552 if (ret == -ENOSYS || ret == -ENODEV) in dwc3_core_get_phy()
1553 dwc->usb3_generic_phy[i] = NULL; in dwc3_core_get_phy()
1565 struct device *dev = dwc->dev; in dwc3_core_init_mode()
1569 switch (dwc->dr_mode) { in dwc3_core_init_mode()
1573 if (dwc->usb2_phy) in dwc3_core_init_mode()
1574 otg_set_vbus(dwc->usb2_phy->otg, false); in dwc3_core_init_mode()
1575 phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); in dwc3_core_init_mode()
1576 phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); in dwc3_core_init_mode()
1585 if (dwc->usb2_phy) in dwc3_core_init_mode()
1586 otg_set_vbus(dwc->usb2_phy->otg, true); in dwc3_core_init_mode()
1587 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_core_init_mode()
1588 phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); in dwc3_core_init_mode()
1589 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_core_init_mode()
1590 phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); in dwc3_core_init_mode()
1597 INIT_WORK(&dwc->drd_work, __dwc3_set_mode); in dwc3_core_init_mode()
1600 return dev_err_probe(dev, ret, "failed to initialize dual-role\n"); in dwc3_core_init_mode()
1603 dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); in dwc3_core_init_mode()
1604 return -EINVAL; in dwc3_core_init_mode()
1612 switch (dwc->dr_mode) { in dwc3_core_exit_mode()
1627 /* de-assert DRVVBUS for HOST and OTG mode */ in dwc3_core_exit_mode()
1637 dwc->gsbuscfg0_reqinfo = DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED; in dwc3_get_software_properties()
1641 * and non-DT (non-ABI) properties. in dwc3_get_software_properties()
1643 for (tmpdev = dwc->dev; tmpdev; tmpdev = tmpdev->parent) { in dwc3_get_software_properties()
1645 "snps,gsbuscfg0-reqinfo", in dwc3_get_software_properties()
1648 dwc->gsbuscfg0_reqinfo = gsbuscfg0_reqinfo; in dwc3_get_software_properties()
1654 struct device *dev = dwc->dev; in dwc3_get_properties()
1673 /* default to -3.5dB de-emphasis */ in dwc3_get_properties()
1689 dwc->maximum_speed = usb_get_maximum_speed(dev); in dwc3_get_properties()
1690 dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev); in dwc3_get_properties()
1691 dwc->dr_mode = usb_get_dr_mode(dev); in dwc3_get_properties()
1692 dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); in dwc3_get_properties()
1694 dwc->sysdev_is_parent = device_property_read_bool(dev, in dwc3_get_properties()
1696 if (dwc->sysdev_is_parent) in dwc3_get_properties()
1697 dwc->sysdev = dwc->dev->parent; in dwc3_get_properties()
1699 dwc->sysdev = dwc->dev; in dwc3_get_properties()
1701 dwc->sys_wakeup = device_may_wakeup(dwc->sysdev); in dwc3_get_properties()
1703 ret = device_property_read_string(dev, "usb-psy-name", &usb_psy_name); in dwc3_get_properties()
1705 dwc->usb_psy = power_supply_get_by_name(usb_psy_name); in dwc3_get_properties()
1706 if (!dwc->usb_psy) in dwc3_get_properties()
1710 dwc->has_lpm_erratum = device_property_read_bool(dev, in dwc3_get_properties()
1711 "snps,has-lpm-erratum"); in dwc3_get_properties()
1712 device_property_read_u8(dev, "snps,lpm-nyet-threshold", in dwc3_get_properties()
1714 dwc->is_utmi_l1_suspend = device_property_read_bool(dev, in dwc3_get_properties()
1715 "snps,is-utmi-l1-suspend"); in dwc3_get_properties()
1716 device_property_read_u8(dev, "snps,hird-threshold", in dwc3_get_properties()
1718 dwc->dis_start_transfer_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1719 "snps,dis-start-transfer-quirk"); in dwc3_get_properties()
1720 dwc->usb3_lpm_capable = device_property_read_bool(dev, in dwc3_get_properties()
1722 dwc->usb2_lpm_disable = device_property_read_bool(dev, in dwc3_get_properties()
1723 "snps,usb2-lpm-disable"); in dwc3_get_properties()
1724 dwc->usb2_gadget_lpm_disable = device_property_read_bool(dev, in dwc3_get_properties()
1725 "snps,usb2-gadget-lpm-disable"); in dwc3_get_properties()
1726 device_property_read_u8(dev, "snps,rx-thr-num-pkt", in dwc3_get_properties()
1728 device_property_read_u8(dev, "snps,rx-max-burst", in dwc3_get_properties()
1730 device_property_read_u8(dev, "snps,tx-thr-num-pkt", in dwc3_get_properties()
1732 device_property_read_u8(dev, "snps,tx-max-burst", in dwc3_get_properties()
1734 device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", in dwc3_get_properties()
1736 device_property_read_u8(dev, "snps,rx-max-burst-prd", in dwc3_get_properties()
1738 device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", in dwc3_get_properties()
1740 device_property_read_u8(dev, "snps,tx-max-burst-prd", in dwc3_get_properties()
1742 dwc->do_fifo_resize = device_property_read_bool(dev, in dwc3_get_properties()
1743 "tx-fifo-resize"); in dwc3_get_properties()
1744 if (dwc->do_fifo_resize) in dwc3_get_properties()
1745 device_property_read_u8(dev, "tx-fifo-max-num", in dwc3_get_properties()
1748 dwc->disable_scramble_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1750 dwc->u2exit_lfps_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1752 dwc->u2ss_inp3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1754 dwc->req_p1p2p3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1756 dwc->del_p1p2p3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1758 dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1760 dwc->lfps_filter_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1762 dwc->rx_detect_poll_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1764 dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1766 dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1768 dwc->dis_enblslpm_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1770 dwc->dis_u1_entry_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1771 "snps,dis-u1-entry-quirk"); in dwc3_get_properties()
1772 dwc->dis_u2_entry_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1773 "snps,dis-u2-entry-quirk"); in dwc3_get_properties()
1774 dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1776 dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1777 "snps,dis-u2-freeclk-exists-quirk"); in dwc3_get_properties()
1778 dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1779 "snps,dis-del-phy-power-chg-quirk"); in dwc3_get_properties()
1780 dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1781 "snps,dis-tx-ipgap-linecheck-quirk"); in dwc3_get_properties()
1782 dwc->resume_hs_terminations = device_property_read_bool(dev, in dwc3_get_properties()
1783 "snps,resume-hs-terminations"); in dwc3_get_properties()
1784 dwc->ulpi_ext_vbus_drv = device_property_read_bool(dev, in dwc3_get_properties()
1785 "snps,ulpi-ext-vbus-drv"); in dwc3_get_properties()
1786 dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1787 "snps,parkmode-disable-ss-quirk"); in dwc3_get_properties()
1788 dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1789 "snps,parkmode-disable-hs-quirk"); in dwc3_get_properties()
1790 dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev, in dwc3_get_properties()
1791 "snps,gfladj-refclk-lpm-sel-quirk"); in dwc3_get_properties()
1793 dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1798 &dwc->hsphy_interface); in dwc3_get_properties()
1799 device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", in dwc3_get_properties()
1800 &dwc->fladj); in dwc3_get_properties()
1801 device_property_read_u32(dev, "snps,ref-clock-period-ns", in dwc3_get_properties()
1802 &dwc->ref_clk_per); in dwc3_get_properties()
1804 dwc->dis_metastability_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1807 dwc->dis_split_quirk = device_property_read_bool(dev, in dwc3_get_properties()
1808 "snps,dis-split-quirk"); in dwc3_get_properties()
1810 dwc->lpm_nyet_threshold = lpm_nyet_threshold; in dwc3_get_properties()
1811 dwc->tx_de_emphasis = tx_de_emphasis; in dwc3_get_properties()
1813 dwc->hird_threshold = hird_threshold; in dwc3_get_properties()
1815 dwc->rx_thr_num_pkt = rx_thr_num_pkt; in dwc3_get_properties()
1816 dwc->rx_max_burst = rx_max_burst; in dwc3_get_properties()
1818 dwc->tx_thr_num_pkt = tx_thr_num_pkt; in dwc3_get_properties()
1819 dwc->tx_max_burst = tx_max_burst; in dwc3_get_properties()
1821 dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; in dwc3_get_properties()
1822 dwc->rx_max_burst_prd = rx_max_burst_prd; in dwc3_get_properties()
1824 dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; in dwc3_get_properties()
1825 dwc->tx_max_burst_prd = tx_max_burst_prd; in dwc3_get_properties()
1827 dwc->imod_interval = 0; in dwc3_get_properties()
1829 dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num; in dwc3_get_properties()
1842 struct device *dev = dwc->dev; in dwc3_check_params()
1844 DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3); in dwc3_check_params()
1847 if (dwc->imod_interval && !dwc3_has_imod(dwc)) { in dwc3_check_params()
1848 dev_warn(dwc->dev, "Interrupt moderation not supported\n"); in dwc3_check_params()
1849 dwc->imod_interval = 0; in dwc3_check_params()
1859 if (!dwc->imod_interval && in dwc3_check_params()
1861 dwc->imod_interval = 1; in dwc3_check_params()
1864 switch (dwc->maximum_speed) { in dwc3_check_params()
1881 dwc->maximum_speed); in dwc3_check_params()
1886 dwc->maximum_speed = USB_SPEED_SUPER_PLUS; in dwc3_check_params()
1890 dwc->maximum_speed = USB_SPEED_SUPER_PLUS; in dwc3_check_params()
1892 dwc->maximum_speed = USB_SPEED_SUPER; in dwc3_check_params()
1895 dwc->maximum_speed = USB_SPEED_HIGH; in dwc3_check_params()
1898 dwc->maximum_speed = USB_SPEED_SUPER; in dwc3_check_params()
1908 * set the default to support dual-lane for DWC_usb32 and single-lane in dwc3_check_params()
1909 * for DWC_usb31 for super-speed-plus. in dwc3_check_params()
1911 if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { in dwc3_check_params()
1912 switch (dwc->max_ssp_rate) { in dwc3_check_params()
1927 dwc->max_ssp_rate = USB_SSP_GEN_2x2; in dwc3_check_params()
1929 dwc->max_ssp_rate = USB_SSP_GEN_2x1; in dwc3_check_params()
1933 dwc->max_ssp_rate = USB_SSP_GEN_1x2; in dwc3_check_params()
1943 struct device *dev = dwc->dev; in dwc3_get_extcon()
1957 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) in dwc3_get_extcon()
1961 * Check explicitly if "usb-role-switch" is used since in dwc3_get_extcon()
1967 device_property_read_bool(dev, "usb-role-switch")) in dwc3_get_extcon()
1974 * device (and "port" node) may be missing in case of "usb-role-switch" in dwc3_get_extcon()
1977 np_phy = of_parse_phandle(dev->of_node, "phys", 0); in dwc3_get_extcon()
1981 np_conn = of_graph_get_remote_node(np_phy, -1, -1); in dwc3_get_extcon()
1993 struct device *dev = dwc->dev; in dwc3_get_clocks()
1995 if (!dev->of_node) in dwc3_get_clocks()
2000 * as required by the DT-binding. in dwc3_get_clocks()
2004 dwc->bus_clk = devm_clk_get_optional(dev, "bus_early"); in dwc3_get_clocks()
2005 if (IS_ERR(dwc->bus_clk)) { in dwc3_get_clocks()
2006 return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), in dwc3_get_clocks()
2010 if (dwc->bus_clk == NULL) { in dwc3_get_clocks()
2011 dwc->bus_clk = devm_clk_get_optional(dev, "bus_clk"); in dwc3_get_clocks()
2012 if (IS_ERR(dwc->bus_clk)) { in dwc3_get_clocks()
2013 return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), in dwc3_get_clocks()
2018 dwc->ref_clk = devm_clk_get_optional(dev, "ref"); in dwc3_get_clocks()
2019 if (IS_ERR(dwc->ref_clk)) { in dwc3_get_clocks()
2020 return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), in dwc3_get_clocks()
2024 if (dwc->ref_clk == NULL) { in dwc3_get_clocks()
2025 dwc->ref_clk = devm_clk_get_optional(dev, "ref_clk"); in dwc3_get_clocks()
2026 if (IS_ERR(dwc->ref_clk)) { in dwc3_get_clocks()
2027 return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), in dwc3_get_clocks()
2032 dwc->susp_clk = devm_clk_get_optional(dev, "suspend"); in dwc3_get_clocks()
2033 if (IS_ERR(dwc->susp_clk)) { in dwc3_get_clocks()
2034 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), in dwc3_get_clocks()
2038 if (dwc->susp_clk == NULL) { in dwc3_get_clocks()
2039 dwc->susp_clk = devm_clk_get_optional(dev, "suspend_clk"); in dwc3_get_clocks()
2040 if (IS_ERR(dwc->susp_clk)) { in dwc3_get_clocks()
2041 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), in dwc3_get_clocks()
2047 dwc->utmi_clk = devm_clk_get_optional(dev, "utmi"); in dwc3_get_clocks()
2048 if (IS_ERR(dwc->utmi_clk)) { in dwc3_get_clocks()
2049 return dev_err_probe(dev, PTR_ERR(dwc->utmi_clk), in dwc3_get_clocks()
2054 dwc->pipe_clk = devm_clk_get_optional(dev, "pipe"); in dwc3_get_clocks()
2055 if (IS_ERR(dwc->pipe_clk)) { in dwc3_get_clocks()
2056 return dev_err_probe(dev, PTR_ERR(dwc->pipe_clk), in dwc3_get_clocks()
2074 base = ioremap(dwc->xhci_resources[0].start, in dwc3_get_num_ports()
2075 resource_size(&dwc->xhci_resources[0])); in dwc3_get_num_ports()
2077 return -ENOMEM; in dwc3_get_num_ports()
2091 dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); in dwc3_get_num_ports()
2093 dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); in dwc3_get_num_ports()
2095 dev_warn(dwc->dev, "unrecognized port major revision %d\n", in dwc3_get_num_ports()
2100 dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", in dwc3_get_num_ports()
2101 dwc->num_usb2_ports, dwc->num_usb3_ports); in dwc3_get_num_ports()
2105 if (dwc->num_usb2_ports > DWC3_USB2_MAX_PORTS || in dwc3_get_num_ports()
2106 dwc->num_usb3_ports > DWC3_USB3_MAX_PORTS) in dwc3_get_num_ports()
2107 return -EINVAL; in dwc3_get_num_ports()
2114 struct device *dev = &pdev->dev; in dwc3_probe()
2123 return -ENOMEM; in dwc3_probe()
2125 dwc->dev = dev; in dwc3_probe()
2130 return -ENODEV; in dwc3_probe()
2133 dwc->xhci_resources[0].start = res->start; in dwc3_probe()
2134 dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + in dwc3_probe()
2136 dwc->xhci_resources[0].flags = res->flags; in dwc3_probe()
2137 dwc->xhci_resources[0].name = res->name; in dwc3_probe()
2141 * since it will be requested by the xhci-plat driver. in dwc3_probe()
2146 if (dev->of_node) { in dwc3_probe()
2147 struct device_node *parent = of_get_parent(dev->of_node); in dwc3_probe()
2149 if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) { in dwc3_probe()
2150 dwc_res.start -= DWC3_GLOBALS_REGS_START; in dwc3_probe()
2161 dwc->regs = regs; in dwc3_probe()
2162 dwc->regs_size = resource_size(&dwc_res); in dwc3_probe()
2168 dwc->reset = devm_reset_control_array_get_optional_shared(dev); in dwc3_probe()
2169 if (IS_ERR(dwc->reset)) { in dwc3_probe()
2170 ret = PTR_ERR(dwc->reset); in dwc3_probe()
2178 ret = reset_control_deassert(dwc->reset); in dwc3_probe()
2187 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); in dwc3_probe()
2188 ret = -ENODEV; in dwc3_probe()
2195 if (!dwc->sysdev_is_parent && in dwc3_probe()
2196 DWC3_GHWPARAMS0_AWIDTH(dwc->hwparams.hwparams0) == 64) { in dwc3_probe()
2197 ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64)); in dwc3_probe()
2203 * Currently only DWC3 controllers that are host-only capable in dwc3_probe()
2206 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_probe()
2212 dwc->num_usb2_ports = 1; in dwc3_probe()
2213 dwc->num_usb3_ports = 1; in dwc3_probe()
2216 spin_lock_init(&dwc->lock); in dwc3_probe()
2217 mutex_init(&dwc->mutex); in dwc3_probe()
2229 dev_err(dwc->dev, "failed to allocate event buffers\n"); in dwc3_probe()
2230 ret = -ENOMEM; in dwc3_probe()
2234 dwc->edev = dwc3_get_extcon(dwc); in dwc3_probe()
2235 if (IS_ERR(dwc->edev)) { in dwc3_probe()
2236 ret = dev_err_probe(dwc->dev, PTR_ERR(dwc->edev), "failed to get extcon\n"); in dwc3_probe()
2280 reset_control_assert(dwc->reset); in dwc3_probe()
2282 if (dwc->usb_psy) in dwc3_probe()
2283 power_supply_put(dwc->usb_psy); in dwc3_probe()
2292 pm_runtime_get_sync(&pdev->dev); in dwc3_remove()
2300 pm_runtime_allow(&pdev->dev); in dwc3_remove()
2301 pm_runtime_disable(&pdev->dev); in dwc3_remove()
2302 pm_runtime_dont_use_autosuspend(&pdev->dev); in dwc3_remove()
2303 pm_runtime_put_noidle(&pdev->dev); in dwc3_remove()
2309 pm_runtime_set_suspended(&pdev->dev); in dwc3_remove()
2313 if (dwc->usb_psy) in dwc3_remove()
2314 power_supply_put(dwc->usb_psy); in dwc3_remove()
2322 ret = reset_control_deassert(dwc->reset); in dwc3_core_init_for_resume()
2339 reset_control_assert(dwc->reset); in dwc3_core_init_for_resume()
2349 if (!pm_runtime_suspended(dwc->dev) && !PMSG_IS_AUTO(msg)) { in dwc3_suspend_common()
2350 dwc->susphy_state = (dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)) & in dwc3_suspend_common()
2352 (dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)) & in dwc3_suspend_common()
2358 if (!dwc->susphy_state) in dwc3_suspend_common()
2362 switch (dwc->current_dr_role) { in dwc3_suspend_common()
2364 if (pm_runtime_suspended(dwc->dev)) in dwc3_suspend_common()
2367 synchronize_irq(dwc->irq_gadget); in dwc3_suspend_common()
2371 if (!PMSG_IS_AUTO(msg) && !device_may_wakeup(dwc->dev)) { in dwc3_suspend_common()
2377 if (dwc->dis_u2_susphy_quirk || in dwc3_suspend_common()
2378 dwc->dis_enblslpm_quirk) { in dwc3_suspend_common()
2379 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_suspend_common()
2380 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_suspend_common()
2383 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_suspend_common()
2390 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_suspend_common()
2391 phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]); in dwc3_suspend_common()
2392 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_suspend_common()
2393 phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]); in dwc3_suspend_common()
2400 if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { in dwc3_suspend_common()
2402 synchronize_irq(dwc->irq_gadget); in dwc3_suspend_common()
2422 switch (dwc->current_dr_role) { in dwc3_resume_common()
2432 if (!PMSG_IS_AUTO(msg) && !device_may_wakeup(dwc->dev)) { in dwc3_resume_common()
2440 for (i = 0; i < dwc->num_usb2_ports; i++) { in dwc3_resume_common()
2441 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); in dwc3_resume_common()
2442 if (dwc->dis_u2_susphy_quirk) in dwc3_resume_common()
2445 if (dwc->dis_enblslpm_quirk) in dwc3_resume_common()
2448 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); in dwc3_resume_common()
2451 for (i = 0; i < dwc->num_usb2_ports; i++) in dwc3_resume_common()
2452 phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]); in dwc3_resume_common()
2453 for (i = 0; i < dwc->num_usb3_ports; i++) in dwc3_resume_common()
2454 phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]); in dwc3_resume_common()
2465 dwc3_set_prtcap(dwc, dwc->current_dr_role); in dwc3_resume_common()
2468 if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { in dwc3_resume_common()
2470 } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { in dwc3_resume_common()
2482 dwc3_enable_susphy(dwc, dwc->susphy_state); in dwc3_resume_common()
2490 switch (dwc->current_dr_role) { in dwc3_runtime_checks()
2492 if (dwc->connected) in dwc3_runtime_checks()
2493 return -EBUSY; in dwc3_runtime_checks()
2510 return -EBUSY; in dwc3_runtime_suspend()
2528 switch (dwc->current_dr_role) { in dwc3_runtime_resume()
2530 if (dwc->pending_events) { in dwc3_runtime_resume()
2531 pm_runtime_put(dwc->dev); in dwc3_runtime_resume()
2532 dwc->pending_events = false; in dwc3_runtime_resume()
2533 enable_irq(dwc->irq_gadget); in dwc3_runtime_resume()
2551 switch (dwc->current_dr_role) { in dwc3_runtime_idle()
2554 return -EBUSY; in dwc3_runtime_idle()
2608 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && in dwc3_complete()
2609 dwc->dis_split_quirk) { in dwc3_complete()
2610 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); in dwc3_complete()
2612 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); in dwc3_complete()