399  * holds the reason for the halt.
766  * interrupt for the appropriate queue is enabled so that the halt request can
793 		dev_vdbg(hsotg->dev, "Halt on queue\n");  in dwc2_halt_channel()
810 			 * halt to be queued when the periodic schedule is  in dwc2_halt_channel()
853 	 * Always halt and release the host channel to make it available for  in dwc2_complete_non_periodic_xfer()
865 		 * halt the channel. (In DMA mode, this call simply releases  in dwc2_complete_non_periodic_xfer()
1258 		 * Halt the channel so the transfer can be re-started from  in dwc2_hc_nak_intr()
1338 			 * Halt the channel so the transfer can be re-started  in dwc2_hc_ack_intr()
1473 	 * Halt the channel and re-start the transfer so the PING protocol  in dwc2_hc_nyet_intr()
1611 	 * Force a channel halt. Don't call dwc2_halt_channel because that won't  in dwc2_hc_ahberr_intr()
1612 	 * write to the HCCHARn register in DMA mode to force the halt.  in dwc2_hc_ahberr_intr()
1652 		 * Halt the channel so the transfer can be re-started from  in dwc2_hc_xacterr_intr()
1734  * For debug only. It checks that a valid halt status is set and that
1738  * Return: true if halt status is ok, false otherwise
1753 		 * never happen. Ignore the halt if it does occur.  in dwc2_halt_status_ok()
1772 			 "%s: no halt status, channel %d, ignoring interrupt\n",  in dwc2_halt_status_ok()
1779 	 * when the halt interrupt occurs. Halt the channel again if it does  in dwc2_halt_status_ok()
1785 			 "%s: hcchar.chdis set unexpectedly, hcchar 0x%08x, trying to halt again\n",  in dwc2_halt_status_ok()
1834 			 * channel was forced to halt because there's no way to  in dwc2_hc_chhltd_intr_dma()
1847 		 * says that on SPLIT-ISOC OUT transfers in DMA mode that a HALT  in dwc2_hc_chhltd_intr_dma()
1903 			 * halt on a NAK to allow rewinding the buffer pointer.  in dwc2_hc_chhltd_intr_dma()
1913 			 * halt on ACK.  in dwc2_hc_chhltd_intr_dma()
1926 					"%s: Halt channel %d (assume incomplete periodic transfer)\n",  in dwc2_hc_chhltd_intr_dma()
1971  * requests a halt. This occurs during handling other host channel interrupts