1153 		/* Adjust length: EP0 - MPS, other OUT EPs - multiple of MPS */  in dwc2_hsotg_start_req()
1209 	dev_dbg(hsotg->dev, "ep0 state:%d\n", hsotg->ep0_state);  in dwc2_hsotg_start_req()
1372  * Called to update EP0 structure's pointers depend on stage of
1469 	/* If using descriptor DMA configure EP0 descriptor chain pointers */  in dwc2_hsotg_ep_queue()
1673 	struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];  in dwc2_hsotg_process_req_status()  local
1681 	if (!ep0->dir_in) {  in dwc2_hsotg_process_req_status()
1715 	ret = dwc2_hsotg_send_reply(hsotg, ep0, &reply, 2);  in dwc2_hsotg_process_req_status()
1777 	struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];  in dwc2_hsotg_process_req_feature()  local
1816 		ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0);  in dwc2_hsotg_process_req_feature()
1839 			ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0);  in dwc2_hsotg_process_req_feature()
1888  * dwc2_hsotg_stall_ep0 - stall ep0
1891  * Set stall for ep0 as response for setup request.
1895 	struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];  in dwc2_hsotg_stall_ep0()  local
1899 	dev_dbg(hsotg->dev, "ep0 stall (dir=%d)\n", ep0->dir_in);  in dwc2_hsotg_stall_ep0()
1900 	reg = (ep0->dir_in) ? DIEPCTL0 : DOEPCTL0;  in dwc2_hsotg_stall_ep0()
1935 	struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];  in dwc2_hsotg_process_control()  local
1945 		ep0->dir_in = 1;  in dwc2_hsotg_process_control()
1948 		ep0->dir_in = 1;  in dwc2_hsotg_process_control()
1951 		ep0->dir_in = 0;  in dwc2_hsotg_process_control()
1967 			ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0);  in dwc2_hsotg_process_control()
2010  * EP0 setup packets
2032  * dwc2_hsotg_enqueue_setup - start a request for EP0 packets
2035  * Enqueue a request on EP0 if necessary to received any SETUP packets
2085 		/* Not specific buffer needed for ep0 ZLP */  in dwc2_hsotg_program_zlp()
2595 		/* EP0 is a special case */  in dwc2_hsotg_set_ep_maxpacket()
2660 		 * for endpoints, excepting ep0  in dwc2_hsotg_trytx()
2697 	/* Finish ZLP handling for IN EP0 transactions */  in dwc2_hsotg_complete_in()
2758 	/* Zlp for all endpoints in non DDMA, for ep0 only in DATA IN stage */  in dwc2_hsotg_complete_in()
3067 	 * Don't process XferCompl interrupt in DDMA if EP0 is still in SETUP  in dwc2_hsotg_epint()
3139 		/* Safety check EP0 state when STSPHSERCVD asserted */  in dwc2_hsotg_epint()
3214 	 * note, since we're limited by the size of transfer on EP0, and  in dwc2_hsotg_irq_enumdone()
3216 	 * not advertise a 64byte MPS on EP0.  in dwc2_hsotg_irq_enumdone()
3255 		/* Initialize ep0 for both in and out directions */  in dwc2_hsotg_irq_enumdone()
3268 	/* ensure after enumeration our EP0 is active */  in dwc2_hsotg_irq_enumdone()
3272 	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",  in dwc2_hsotg_irq_enumdone()
3393 	/* Kill any ep0 requests as controller will be reinitialized */  in dwc2_hsotg_core_init_disconnected()
3410 	 * we must now enable ep0 ready for host detection and then  in dwc2_hsotg_core_init_disconnected()
3524 	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",  in dwc2_hsotg_core_init_disconnected()
3539 	/* Enable interrupts for EP0 in and out */  in dwc2_hsotg_core_init_disconnected()
3589 	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",  in dwc2_hsotg_core_init_disconnected()
4040 	/* not to be called for EP0 */  in dwc2_hsotg_ep_enable()
4259 		dev_err(hsotg->dev, "%s: called for ep0\n", __func__);  in dwc2_hsotg_ep_disable()
4403 				 "%s: can't clear halt on ep0\n", __func__);  in dwc2_hsotg_ep_sethalt()
4882 	/* Add ep0 */  in dwc2_hsotg_hw_cfg()
4890 	/* Same dwc2_hsotg_ep is used in both directions for ep0 */  in dwc2_hsotg_hw_cfg()
5043 	/* hsotg->num_of_eps holds number of EPs other than ep0 */  in dwc2_gadget_init()
5053 	hsotg->gadget.ep0 = &hsotg->eps_out[0]->ep;  in dwc2_gadget_init()
5055 	/* allocate EP0 request */  in dwc2_gadget_init()