Lines Matching +full:usb +full:- +full:ehci

1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
19 #include "../host/ehci.h"
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
42 struct device *dev = hcd->self.controller;
45 int port = HCS_N_PORTS(ehci->hcs_params);
47 if (priv->reg_vbus && enable != priv->enabled) {
50 "Not support multi-port regulator control\n");
54 ret = regulator_enable(priv->reg_vbus);
56 ret = regulator_disable(priv->reg_vbus);
63 priv->enabled = enable;
66 if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) {
68 usb_phy_vbus_on(ci->usb_phy);
70 usb_phy_vbus_off(ci->usb_phy);
73 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
86 struct device *dev = hcd->self.controller;
88 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
95 ehci->need_io_watchdog = 0;
97 if (ci->platdata->notify_event) {
98 ret = ci->platdata->notify_event(ci,
117 return usb_hcd_irq(ci->irq, ci->hcd);
123 struct ehci_hcd *ehci;
128 return -ENODEV;
130 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
131 ci->dev, dev_name(ci->dev), NULL);
133 return -ENOMEM;
135 dev_set_drvdata(ci->dev, ci);
136 hcd->rsrc_start = ci->hw_bank.phys;
137 hcd->rsrc_len = ci->hw_bank.size;
138 hcd->regs = ci->hw_bank.abs;
139 hcd->has_tt = 1;
141 hcd->power_budget = ci->platdata->power_budget;
142 hcd->tpl_support = ci->platdata->tpl_support;
143 if (ci->phy || ci->usb_phy) {
144 hcd->skip_phy_initialization = 1;
145 if (ci->usb_phy)
146 hcd->usb_phy = ci->usb_phy;
149 ehci = hcd_to_ehci(hcd);
150 ehci->caps = ci->hw_bank.cap;
151 ehci->has_hostpc = ci->hw_bank.lpm;
152 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
153 ehci->imx28_write_fix = ci->imx28_write_fix;
154 ehci->has_ci_pec_bug = ci->has_portsc_pec_bug;
156 priv = (struct ehci_ci_priv *)ehci->priv;
157 priv->reg_vbus = NULL;
159 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
160 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
161 ret = regulator_enable(ci->platdata->reg_vbus);
163 dev_err(ci->dev,
169 priv->reg_vbus = ci->platdata->reg_vbus;
173 if (ci->platdata->pins_host)
174 pinctrl_select_state(ci->platdata->pctl,
175 ci->platdata->pins_host);
177 ci->hcd = hcd;
181 ci->hcd = NULL;
184 struct usb_otg *otg = &ci->otg;
187 otg->host = &hcd->self;
188 hcd->self.otg_port = 1;
191 if (ci->platdata->notify_event &&
192 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
193 ci->platdata->notify_event
200 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
201 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
202 regulator_disable(ci->platdata->reg_vbus);
211 struct usb_hcd *hcd = ci->hcd;
214 if (ci->platdata->notify_event)
215 ci->platdata->notify_event(ci,
218 ci->role = CI_ROLE_END;
219 synchronize_irq(ci->irq);
221 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
222 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
223 regulator_disable(ci->platdata->reg_vbus);
225 ci->hcd = NULL;
226 ci->otg.host = NULL;
228 if (ci->platdata->pins_host && ci->platdata->pins_default)
229 pinctrl_select_state(ci->platdata->pctl,
230 ci->platdata->pins_default);
236 if (ci->role == CI_ROLE_HOST && ci->hcd)
240 /* The below code is based on tegra ehci driver */
250 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
251 unsigned int ports = HCS_N_PORTS(ehci->hcs_params);
257 struct device *dev = hcd->self.controller;
261 * Avoid out-of-bounds values while calculating the port index
265 port_index = (wIndex - 1) & 0xff;
268 status_reg = &ehci->regs->port_status[port_index];
270 spin_lock_irqsave(&ehci->lock, flags);
272 if (ci->platdata->hub_control) {
273 retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
281 retval = -EPIPE;
285 temp = ehci_readl(ehci, status_reg);
287 retval = -EPIPE;
293 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
299 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
301 ehci_err(ehci, "timeout waiting for SUSPEND\n");
303 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
304 if (ci->platdata->notify_event)
305 ci->platdata->notify_event(ci,
308 temp = ehci_readl(ehci, status_reg);
310 ehci_writel(ehci, temp, status_reg);
313 set_bit(port_index, &ehci->suspended_ports);
324 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
325 ehci_err(ehci, "timeout waiting for resume\n");
328 spin_unlock_irqrestore(&ehci->lock, flags);
333 spin_unlock_irqrestore(&ehci->lock, flags);
338 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
339 struct device *dev = hcd->self.controller;
349 port = HCS_N_PORTS(ehci->hcs_params);
350 while (port--) {
351 u32 __iomem *reg = &ehci->regs->port_status[port];
352 u32 portsc = ehci_readl(ehci, reg);
365 tmp = ehci_readl(ehci, &ehci->regs->command);
367 ehci_writel(ehci, tmp, &ehci->regs->command);
376 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
377 tmp = ehci_readl(ehci, reg);
379 ehci_writel(ehci, tmp, reg);
393 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
395 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
397 temp = container_of(urb->transfer_buffer,
399 urb->transfer_buffer = temp->original_buffer;
404 if (usb_pipeisoc(urb->pipe))
405 length = urb->transfer_buffer_length;
407 length = urb->actual_length;
409 memcpy(temp->original_buffer, temp->data, length);
419 if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0)
421 if (IS_ALIGNED((uintptr_t)urb->transfer_buffer, 4)
422 && IS_ALIGNED(urb->transfer_buffer_length, 4))
425 temp = kmalloc(sizeof(*temp) + ALIGN(urb->transfer_buffer_length, 4), mem_flags);
427 return -ENOMEM;
430 memcpy(temp->data, urb->transfer_buffer,
431 urb->transfer_buffer_length);
433 temp->original_buffer = urb->transfer_buffer;
434 urb->transfer_buffer = temp->data;
435 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
465 ehci_suspend(ci->hcd, device_may_wakeup(ci->dev));
470 ehci_resume(ci->hcd, power_lost);
479 return -ENXIO;
481 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
483 return -ENOMEM;
485 rdrv->start = host_start;
486 rdrv->stop = host_stop;
488 rdrv->suspend = ci_hdrc_host_suspend;
489 rdrv->resume = ci_hdrc_host_resume;
491 rdrv->irq = host_irq;
492 rdrv->name = "host";
493 ci->roles[CI_ROLE_HOST] = rdrv;
495 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {