Lines Matching +full:max +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011-2013 Samsung India Software Operations
19 #include "ufshcd-pltfrm.h"
29 struct device *dev = hba->dev;
30 struct device_node *np = dev->of_node;
39 cnt = of_property_count_strings(np, "clock-names");
40 if (!cnt || (cnt == -EINVAL)) {
52 sz = of_property_count_u32_elems(np, "freq-table-hz");
54 dev_info(dev, "freq-table-hz property not specified\n");
59 dev_err(dev, "%s len mismatch\n", "freq-table-hz");
60 ret = -EINVAL;
67 ret = -ENOMEM;
71 ret = of_property_read_u32_array(np, "freq-table-hz",
73 if (ret && (ret != -EINVAL)) {
75 "freq-table-hz", ret);
80 ret = of_property_read_string_index(np, "clock-names", i/2,
87 ret = -ENOMEM;
91 clki->min_freq = clkfreq[i];
92 clki->max_freq = clkfreq[i+1];
93 clki->name = devm_kstrdup(dev, name, GFP_KERNEL);
94 if (!clki->name) {
95 ret = -ENOMEM;
100 clki->keep_link_active = true;
101 dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz",
102 clki->min_freq, clki->max_freq, clki->name);
103 list_add_tail(&clki->list, &hba->clk_list_head);
126 struct device_node *np = dev->of_node;
133 snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name);
142 return -ENOMEM;
144 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL);
145 if (!vreg->name)
146 return -ENOMEM;
149 vreg->max_uA = 0;
153 snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name);
154 if (of_property_read_u32(np, prop_name, &vreg->max_uA)) {
156 vreg->max_uA = 0;
165 * ufshcd_parse_regulator_info - get regulator info from device tree
169 * If any of the supplies are not defined it is assumed that they are always-on
178 struct device *dev = hba->dev;
179 struct ufs_vreg_info *info = &hba->vreg_info;
181 err = ufshcd_populate_vreg(dev, "vdd-hba", &info->vdd_hba, true);
185 err = ufshcd_populate_vreg(dev, "vcc", &info->vcc, false);
189 err = ufshcd_populate_vreg(dev, "vccq", &info->vccq, false);
193 err = ufshcd_populate_vreg(dev, "vccq2", &info->vccq2, false);
200 struct device *dev = hba->dev;
203 ret = of_property_read_u32(dev->of_node, "lanes-per-direction",
204 &hba->lanes_per_direction);
206 dev_dbg(hba->dev,
207 "%s: failed to read lanes-per-direction, ret=%d\n",
209 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;
214 * ufshcd_parse_clock_min_max_freq - Parse MIN and MAX clocks freq
217 * This function parses MIN and MAX frequencies of all clocks required
220 * Returns 0 for success and non-zero for failure
224 struct list_head *head = &hba->clk_list_head;
227 unsigned long freq;
231 if (!clki->name)
234 clki->clk = devm_clk_get(hba->dev, clki->name);
235 if (IS_ERR(clki->clk))
238 /* Find Max Freq */
239 freq = ULONG_MAX;
240 opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx);
242 dev_err(hba->dev, "Failed to find OPP for MAX frequency\n");
245 clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx);
248 /* Find Min Freq */
249 freq = 0;
250 opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx);
252 dev_err(hba->dev, "Failed to find OPP for MIN frequency\n");
255 clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx++);
264 struct device *dev = hba->dev;
265 struct device_node *np = dev->of_node;
271 if (!of_property_present(np, "operating-points-v2"))
274 if (of_property_present(np, "freq-table-hz")) {
275 dev_err(dev, "%s: operating-points and freq-table-hz are incompatible\n",
277 return -EINVAL;
280 cnt = of_property_count_strings(np, "clock-names");
282 dev_err(dev, "%s: Missing clock-names\n", __func__);
283 return -ENODEV;
289 return -ENOMEM;
296 ret = of_property_read_string_index(np, "clock-names", i,
303 return -ENOMEM;
305 clki->name = devm_kstrdup(dev, clk_names[i], GFP_KERNEL);
306 if (!clki->name)
307 return -ENOMEM;
310 clki->keep_link_active = true;
312 list_add_tail(&clki->list, &hba->clk_list_head);
332 hba->use_pm_opp = true;
338 * ufshcd_negotiate_pwr_params - find power mode settings that are supported by
344 * Return: 0 on success, non-zero value on failure.
355 if (dev_max->pwr_rx == FAST_MODE)
358 if (host_params->desired_working_mode == UFS_HS_MODE) {
360 min_host_gear = min_t(u32, host_params->hs_rx_gear,
361 host_params->hs_tx_gear);
363 min_host_gear = min_t(u32, host_params->pwm_rx_gear,
364 host_params->pwm_tx_gear);
368 * device doesn't support HS but host_params->desired_working_mode is HS,
374 return -ENOTSUPP;
378 * since host_params->desired_working_mode is also HS
382 agreed_pwr->pwr_rx = host_params->rx_pwr_hs;
383 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx;
386 * here host_params->desired_working_mode is PWM.
388 * in both cases host_params->desired_working_mode will
391 agreed_pwr->pwr_rx = host_params->rx_pwr_pwm;
392 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx;
400 agreed_pwr->lane_tx = min_t(u32, dev_max->lane_tx,
401 host_params->tx_lanes);
402 agreed_pwr->lane_rx = min_t(u32, dev_max->lane_rx,
403 host_params->rx_lanes);
406 min_dev_gear = min_t(u32, dev_max->gear_rx, dev_max->gear_tx);
409 * if both device capabilities and vendor pre-defined preferences are
418 agreed_pwr->gear_rx =
421 agreed_pwr->gear_rx = min_dev_gear;
423 agreed_pwr->gear_rx = min_host_gear;
425 agreed_pwr->gear_tx = agreed_pwr->gear_rx;
427 agreed_pwr->hs_rate = host_params->hs_rate;
453 * ufshcd_pltfrm_init - probe routine of the driver
457 * Return: 0 on success, non-zero value on failure.
465 struct device *dev = &pdev->dev;
485 hba->vops = vops;