1 // SPDX-License-Identifier: GPL-2.0-or-later
4  * Copyright (C) 2011-2013 Samsung India Software Operations
19 #include "ufshcd-pltfrm.h"
29 	struct device *dev = hba->dev;  in ufshcd_parse_clock_info()
30 	struct device_node *np = dev->of_node;  in ufshcd_parse_clock_info()
39 	cnt = of_property_count_strings(np, "clock-names");  in ufshcd_parse_clock_info()
40 	if (!cnt || (cnt == -EINVAL)) {  in ufshcd_parse_clock_info()
52 	sz = of_property_count_u32_elems(np, "freq-table-hz");  in ufshcd_parse_clock_info()
54 		dev_info(dev, "freq-table-hz property not specified\n");  in ufshcd_parse_clock_info()
59 		dev_err(dev, "%s len mismatch\n", "freq-table-hz");  in ufshcd_parse_clock_info()
60 		ret = -EINVAL;  in ufshcd_parse_clock_info()
67 		ret = -ENOMEM;  in ufshcd_parse_clock_info()
71 	ret = of_property_read_u32_array(np, "freq-table-hz",  in ufshcd_parse_clock_info()
73 	if (ret && (ret != -EINVAL)) {  in ufshcd_parse_clock_info()
75 				"freq-table-hz", ret);  in ufshcd_parse_clock_info()
80 		ret = of_property_read_string_index(np,	"clock-names", i/2,  in ufshcd_parse_clock_info()
87 			ret = -ENOMEM;  in ufshcd_parse_clock_info()
91 		clki->min_freq = clkfreq[i];  in ufshcd_parse_clock_info()
92 		clki->max_freq = clkfreq[i+1];  in ufshcd_parse_clock_info()
93 		clki->name = devm_kstrdup(dev, name, GFP_KERNEL);  in ufshcd_parse_clock_info()
94 		if (!clki->name) {  in ufshcd_parse_clock_info()
95 			ret = -ENOMEM;  in ufshcd_parse_clock_info()
100 			clki->keep_link_active = true;  in ufshcd_parse_clock_info()
101 		dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz",  in ufshcd_parse_clock_info()
102 				clki->min_freq, clki->max_freq, clki->name);  in ufshcd_parse_clock_info()
103 		list_add_tail(&clki->list, &hba->clk_list_head);  in ufshcd_parse_clock_info()
126 	struct device_node *np = dev->of_node;  in ufshcd_populate_vreg()
133 	snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name);  in ufshcd_populate_vreg()
142 		return -ENOMEM;  in ufshcd_populate_vreg()
144 	vreg->name = devm_kstrdup(dev, name, GFP_KERNEL);  in ufshcd_populate_vreg()
145 	if (!vreg->name)  in ufshcd_populate_vreg()
146 		return -ENOMEM;  in ufshcd_populate_vreg()
149 		vreg->max_uA = 0;  in ufshcd_populate_vreg()
153 	snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name);  in ufshcd_populate_vreg()
154 	if (of_property_read_u32(np, prop_name, &vreg->max_uA)) {  in ufshcd_populate_vreg()
156 		vreg->max_uA = 0;  in ufshcd_populate_vreg()
165  * ufshcd_parse_regulator_info - get regulator info from device tree
168  * Get regulator info from device tree for vcc, vccq, vccq2 power supplies.
169  * If any of the supplies are not defined it is assumed that they are always-on
178 	struct device *dev = hba->dev;  in ufshcd_parse_regulator_info()
179 	struct ufs_vreg_info *info = &hba->vreg_info;  in ufshcd_parse_regulator_info()
181 	err = ufshcd_populate_vreg(dev, "vdd-hba", &info->vdd_hba, true);  in ufshcd_parse_regulator_info()
185 	err = ufshcd_populate_vreg(dev, "vcc", &info->vcc, false);  in ufshcd_parse_regulator_info()
189 	err = ufshcd_populate_vreg(dev, "vccq", &info->vccq, false);  in ufshcd_parse_regulator_info()
193 	err = ufshcd_populate_vreg(dev, "vccq2", &info->vccq2, false);  in ufshcd_parse_regulator_info()
200 	struct device *dev = hba->dev;  in ufshcd_init_lanes_per_dir()
203 	ret = of_property_read_u32(dev->of_node, "lanes-per-direction",  in ufshcd_init_lanes_per_dir()
204 		&hba->lanes_per_direction);  in ufshcd_init_lanes_per_dir()
206 		dev_dbg(hba->dev,  in ufshcd_init_lanes_per_dir()
207 			"%s: failed to read lanes-per-direction, ret=%d\n",  in ufshcd_init_lanes_per_dir()
209 		hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;  in ufshcd_init_lanes_per_dir()
214  * ufshcd_parse_clock_min_max_freq  - Parse MIN and MAX clocks freq
220  * Returns 0 for success and non-zero for failure
224 	struct list_head *head = &hba->clk_list_head;  in ufshcd_parse_clock_min_max_freq()
231 		if (!clki->name)  in ufshcd_parse_clock_min_max_freq()
234 		clki->clk = devm_clk_get(hba->dev, clki->name);  in ufshcd_parse_clock_min_max_freq()
235 		if (IS_ERR(clki->clk))  in ufshcd_parse_clock_min_max_freq()
240 		opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx);  in ufshcd_parse_clock_min_max_freq()
242 			dev_err(hba->dev, "Failed to find OPP for MAX frequency\n");  in ufshcd_parse_clock_min_max_freq()
245 		clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx);  in ufshcd_parse_clock_min_max_freq()
250 		opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx);  in ufshcd_parse_clock_min_max_freq()
252 			dev_err(hba->dev, "Failed to find OPP for MIN frequency\n");  in ufshcd_parse_clock_min_max_freq()
255 		clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx++);  in ufshcd_parse_clock_min_max_freq()
264 	struct device *dev = hba->dev;  in ufshcd_parse_operating_points()
265 	struct device_node *np = dev->of_node;  in ufshcd_parse_operating_points()
271 	if (!of_property_present(np, "operating-points-v2"))  in ufshcd_parse_operating_points()
274 	if (of_property_present(np, "freq-table-hz")) {  in ufshcd_parse_operating_points()
275 		dev_err(dev, "%s: operating-points and freq-table-hz are incompatible\n",  in ufshcd_parse_operating_points()
277 		return -EINVAL;  in ufshcd_parse_operating_points()
280 	cnt = of_property_count_strings(np, "clock-names");  in ufshcd_parse_operating_points()
282 		dev_err(dev, "%s: Missing clock-names\n",  __func__);  in ufshcd_parse_operating_points()
283 		return -ENODEV;  in ufshcd_parse_operating_points()
289 		return -ENOMEM;  in ufshcd_parse_operating_points()
292 	 * We still need to get reference to all clocks as the UFS core uses  in ufshcd_parse_operating_points()
296 		ret = of_property_read_string_index(np, "clock-names", i,  in ufshcd_parse_operating_points()
303 			return -ENOMEM;  in ufshcd_parse_operating_points()
305 		clki->name = devm_kstrdup(dev, clk_names[i], GFP_KERNEL);  in ufshcd_parse_operating_points()
306 		if (!clki->name)  in ufshcd_parse_operating_points()
307 			return -ENOMEM;  in ufshcd_parse_operating_points()
310 			clki->keep_link_active = true;  in ufshcd_parse_operating_points()
312 		list_add_tail(&clki->list, &hba->clk_list_head);  in ufshcd_parse_operating_points()
332 	hba->use_pm_opp = true;  in ufshcd_parse_operating_points()
338  * ufshcd_negotiate_pwr_params - find power mode settings that are supported by
344  * Return: 0 on success, non-zero value on failure.
355 	if (dev_max->pwr_rx == FAST_MODE)  in ufshcd_negotiate_pwr_params()
358 	if (host_params->desired_working_mode == UFS_HS_MODE) {  in ufshcd_negotiate_pwr_params()
360 		min_host_gear = min_t(u32, host_params->hs_rx_gear,  in ufshcd_negotiate_pwr_params()
361 					host_params->hs_tx_gear);  in ufshcd_negotiate_pwr_params()
363 		min_host_gear = min_t(u32, host_params->pwm_rx_gear,  in ufshcd_negotiate_pwr_params()
364 					host_params->pwm_tx_gear);  in ufshcd_negotiate_pwr_params()
368 	 * device doesn't support HS but host_params->desired_working_mode is HS,  in ufshcd_negotiate_pwr_params()
374 		return -ENOTSUPP;  in ufshcd_negotiate_pwr_params()
378 		 * since host_params->desired_working_mode is also HS  in ufshcd_negotiate_pwr_params()
382 		agreed_pwr->pwr_rx = host_params->rx_pwr_hs;  in ufshcd_negotiate_pwr_params()
383 		agreed_pwr->pwr_tx = agreed_pwr->pwr_rx;  in ufshcd_negotiate_pwr_params()
386 		 * here host_params->desired_working_mode is PWM.  in ufshcd_negotiate_pwr_params()
388 		 * in both cases host_params->desired_working_mode will  in ufshcd_negotiate_pwr_params()
391 		agreed_pwr->pwr_rx = host_params->rx_pwr_pwm;  in ufshcd_negotiate_pwr_params()
392 		agreed_pwr->pwr_tx = agreed_pwr->pwr_rx;  in ufshcd_negotiate_pwr_params()
400 	agreed_pwr->lane_tx = min_t(u32, dev_max->lane_tx,  in ufshcd_negotiate_pwr_params()
401 				    host_params->tx_lanes);  in ufshcd_negotiate_pwr_params()
402 	agreed_pwr->lane_rx = min_t(u32, dev_max->lane_rx,  in ufshcd_negotiate_pwr_params()
403 				    host_params->rx_lanes);  in ufshcd_negotiate_pwr_params()
406 	min_dev_gear = min_t(u32, dev_max->gear_rx, dev_max->gear_tx);  in ufshcd_negotiate_pwr_params()
409 	 * if both device capabilities and vendor pre-defined preferences are  in ufshcd_negotiate_pwr_params()
418 		agreed_pwr->gear_rx =  in ufshcd_negotiate_pwr_params()
421 		agreed_pwr->gear_rx = min_dev_gear;  in ufshcd_negotiate_pwr_params()
423 		agreed_pwr->gear_rx = min_host_gear;  in ufshcd_negotiate_pwr_params()
425 	agreed_pwr->gear_tx = agreed_pwr->gear_rx;  in ufshcd_negotiate_pwr_params()
427 	agreed_pwr->hs_rate = host_params->hs_rate;  in ufshcd_negotiate_pwr_params()
453  * ufshcd_pltfrm_init - probe routine of the driver
457  * Return: 0 on success, non-zero value on failure.
465 	struct device *dev = &pdev->dev;  in ufshcd_pltfrm_init()
485 	hba->vops = vops;  in ufshcd_pltfrm_init()