1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright (C) 2011-2013 Samsung India Software Operations
45 	return fn < 32 && fn >= 0 && (host->dsm_fns & (1u << fn));  in __intel_dsm_supported()
61 		return -EOPNOTSUPP;  in __intel_dsm()
63 	if (obj->buffer.length < 1) {  in __intel_dsm()
64 		err = -EINVAL;  in __intel_dsm()
68 	len = min_t(size_t, obj->buffer.length, 4);  in __intel_dsm()
71 	memcpy(result, obj->buffer.pointer, len);  in __intel_dsm()
82 		return -EOPNOTSUPP;  in intel_dsm()
91 	err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);  in intel_dsm_init()
92 	dev_dbg(dev, "DSM fns %#x, error %d\n", intel_host->dsm_fns, err);  in intel_dsm_init()
99 	if (status == POST_CHANGE && hba->caps & UFSHCD_CAP_CRYPTO) {  in ufs_intel_hce_enable_notify()
141 	struct ufs_pa_layer_attr pwr_info = hba->pwr_info;  in ufs_intel_set_lanes()
148 		dev_err(hba->dev, "%s: Setting %u lanes, err = %d\n",  in ufs_intel_set_lanes()
163 		    (hba->pwr_info.lane_rx != 2 || hba->pwr_info.lane_tx != 2))  in ufs_intel_lkf_pwr_change_notify()
227 	host->active_ltr = readl(hba->mmio_base + INTEL_ACTIVELTR);  in intel_cache_ltr()
228 	host->idle_ltr = readl(hba->mmio_base + INTEL_IDLELTR);  in intel_cache_ltr()
244 	ltr = readl(hba->mmio_base + INTEL_ACTIVELTR);  in intel_ltr_set()
263 	if (ltr == host->active_ltr)  in intel_ltr_set()
266 	writel(ltr, hba->mmio_base + INTEL_ACTIVELTR);  in intel_ltr_set()
267 	writel(ltr, hba->mmio_base + INTEL_IDLELTR);  in intel_ltr_set()
277 	dev->power.set_latency_tolerance = intel_ltr_set;  in intel_ltr_expose()
284 	dev->power.set_latency_tolerance = NULL;  in intel_ltr_hide()
289 	struct dentry *dir = debugfs_create_dir(dev_name(hba->dev), NULL);  in intel_add_debugfs()
294 	host->debugfs_root = dir;  in intel_add_debugfs()
295 	debugfs_create_x32("active_ltr", 0444, dir, &host->active_ltr);  in intel_add_debugfs()
296 	debugfs_create_x32("idle_ltr", 0444, dir, &host->idle_ltr);  in intel_add_debugfs()
303 	debugfs_remove_recursive(host->debugfs_root);  in intel_remove_debugfs()
310 	if (INTEL_DSM_SUPPORTED(host, RESET)) {  in ufs_intel_device_reset()
314 		err = intel_dsm(host, hba->dev, INTEL_DSM_RESET, &result);  in ufs_intel_device_reset()
316 			err = -EIO;  in ufs_intel_device_reset()
318 			dev_err(hba->dev, "%s: DSM error %d result %u\n",  in ufs_intel_device_reset()
323 	if (!host->reset_gpio)  in ufs_intel_device_reset()
324 		return -EOPNOTSUPP;  in ufs_intel_device_reset()
326 	gpiod_set_value_cansleep(host->reset_gpio, 1);  in ufs_intel_device_reset()
329 	gpiod_set_value_cansleep(host->reset_gpio, 0);  in ufs_intel_device_reset()
338 	return devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);  in ufs_intel_get_reset_gpio()
345 	hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;  in ufs_intel_common_init()
347 	host = devm_kzalloc(hba->dev, sizeof(*host), GFP_KERNEL);  in ufs_intel_common_init()
349 		return -ENOMEM;  in ufs_intel_common_init()
351 	intel_dsm_init(host, hba->dev);  in ufs_intel_common_init()
352 	if (INTEL_DSM_SUPPORTED(host, RESET)) {  in ufs_intel_common_init()
353 		if (hba->vops->device_reset)  in ufs_intel_common_init()
354 			hba->caps |= UFSHCD_CAP_DEEPSLEEP;  in ufs_intel_common_init()
356 		if (hba->vops->device_reset)  in ufs_intel_common_init()
357 			host->reset_gpio = ufs_intel_get_reset_gpio(hba->dev);  in ufs_intel_common_init()
358 		if (IS_ERR(host->reset_gpio)) {  in ufs_intel_common_init()
359 			dev_err(hba->dev, "%s: failed to get reset GPIO, error %ld\n",  in ufs_intel_common_init()
360 				__func__, PTR_ERR(host->reset_gpio));  in ufs_intel_common_init()
361 			host->reset_gpio = NULL;  in ufs_intel_common_init()
363 		if (host->reset_gpio) {  in ufs_intel_common_init()
364 			gpiod_set_value_cansleep(host->reset_gpio, 0);  in ufs_intel_common_init()
365 			hba->caps |= UFSHCD_CAP_DEEPSLEEP;  in ufs_intel_common_init()
368 	intel_ltr_expose(hba->dev);  in ufs_intel_common_init()
376 	intel_ltr_hide(hba->dev);  in ufs_intel_common_exit()
387 			dev_err(hba->dev, "%s: hibern8 exit failed %d\n",  in ufs_intel_resume()
390 			 * Force reset and restore. Any other actions can lead  in ufs_intel_resume()
402 	hba->quirks |= UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8;  in ufs_intel_ehl_init()
410 	hba->nop_out_timeout = 200;  in ufs_intel_lkf_init()
411 	hba->quirks |= UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8;  in ufs_intel_lkf_init()
412 	hba->caps |= UFSHCD_CAP_CRYPTO;  in ufs_intel_lkf_init()
414 	/* LKF always needs a full reset, so set PM accordingly */  in ufs_intel_lkf_init()
415 	if (hba->caps & UFSHCD_CAP_DEEPSLEEP) {  in ufs_intel_lkf_init()
416 		hba->spm_lvl = UFS_PM_LVL_6;  in ufs_intel_lkf_init()
417 		hba->rpm_lvl = UFS_PM_LVL_6;  in ufs_intel_lkf_init()
419 		hba->spm_lvl = UFS_PM_LVL_5;  in ufs_intel_lkf_init()
420 		hba->rpm_lvl = UFS_PM_LVL_5;  in ufs_intel_lkf_init()
427 	hba->nop_out_timeout = 200;  in ufs_intel_adl_init()
428 	hba->quirks |= UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8;  in ufs_intel_adl_init()
429 	hba->caps |= UFSHCD_CAP_WB_EN;  in ufs_intel_adl_init()
435 	hba->rpm_lvl = UFS_PM_LVL_2;  in ufs_intel_mtl_init()
436 	hba->spm_lvl = UFS_PM_LVL_2;  in ufs_intel_mtl_init()
437 	hba->caps |= UFSHCD_CAP_CRYPTO | UFSHCD_CAP_WB_EN;  in ufs_intel_mtl_init()
448 	hba->mcq_base = hba->mmio_base + ufshcd_mcq_queue_cfg_addr(hba);  in ufs_qemu_mcq_config_resource()
463 	hba->mcq_opr[OPR_SQD].offset = sqdao;  in ufs_qemu_op_runtime_config()
464 	hba->mcq_opr[OPR_SQIS].offset = sqisao;  in ufs_qemu_op_runtime_config()
465 	hba->mcq_opr[OPR_CQD].offset = cqdao;  in ufs_qemu_op_runtime_config()
466 	hba->mcq_opr[OPR_CQIS].offset = cqisao;  in ufs_qemu_op_runtime_config()
469 		opr = &hba->mcq_opr[i];  in ufs_qemu_op_runtime_config()
470 		opr->stride = 48;  in ufs_qemu_op_runtime_config()
471 		opr->base = hba->mmio_base + opr->offset;  in ufs_qemu_op_runtime_config()
478 	.name                   = "qemu-pci",
485 	.name                   = "intel-pci",
489 	.resume			= ufs_intel_resume,
493 	.name                   = "intel-pci",
497 	.resume			= ufs_intel_resume,
501 	.name                   = "intel-pci",
508 	.resume			= ufs_intel_resume,
513 	.name			= "intel-pci",
517 	.resume			= ufs_intel_resume,
522 	.name                   = "intel-pci",
527 	.resume			= ufs_intel_resume,
536 	/* Force a full reset and restore */  in ufshcd_pci_restore()
544  * ufshcd_pci_remove - de-allocate PCI/SCSI host and host memory space
552 	pm_runtime_forbid(&pdev->dev);  in ufshcd_pci_remove()
553 	pm_runtime_get_noresume(&pdev->dev);  in ufshcd_pci_remove()
558  * ufshcd_pci_probe - probe routine of the driver
562  * Return: 0 on success, non-zero value on failure.
573 		dev_err(&pdev->dev, "pcim_enable_device failed\n");  in ufshcd_pci_probe()
581 		dev_err(&pdev->dev, "request and iomap failed\n");  in ufshcd_pci_probe()
585 	err = ufshcd_alloc_host(&pdev->dev, &hba);  in ufshcd_pci_probe()
587 		dev_err(&pdev->dev, "Allocation failed\n");  in ufshcd_pci_probe()
591 	hba->vops = (struct ufs_hba_variant_ops *)id->driver_data;  in ufshcd_pci_probe()
593 	err = ufshcd_init(hba, mmio_base, pdev->irq);  in ufshcd_pci_probe()
595 		dev_err(&pdev->dev, "Initialization failed\n");  in ufshcd_pci_probe()
599 	pm_runtime_put_noidle(&pdev->dev);  in ufshcd_pci_probe()
600 	pm_runtime_allow(&pdev->dev);  in ufshcd_pci_probe()
609 	.resume		= ufshcd_system_resume,