Lines Matching +full:0 +full:x2100
15 #define MTK_MCQ_INVALID_IRQ 0xFFFF
18 #define EHS_EN BIT(0)
29 #define REG_UFS_XOUFS_CTRL 0x140
30 #define REG_UFS_REFCLK_CTRL 0x144
31 #define REG_UFS_MMIO_OPT_CTRL_0 0x160
32 #define REG_UFS_EXTREG 0x2100
33 #define REG_UFS_MPHYCTRL 0x2200
34 #define REG_UFS_MTK_IP_VER 0x2240
35 #define REG_UFS_REJECT_MON 0x22AC
36 #define REG_UFS_DEBUG_SEL 0x22C0
37 #define REG_UFS_PROBE 0x22C8
38 #define REG_UFS_DEBUG_SEL_B0 0x22D0
39 #define REG_UFS_DEBUG_SEL_B1 0x22D4
40 #define REG_UFS_DEBUG_SEL_B2 0x22D8
41 #define REG_UFS_DEBUG_SEL_B3 0x22DC
43 #define REG_UFS_MTK_SQD 0x2800
44 #define REG_UFS_MTK_SQIS 0x2814
45 #define REG_UFS_MTK_CQD 0x281C
46 #define REG_UFS_MTK_CQIS 0x2824
48 #define REG_UFS_MCQ_STRIDE 0x30
55 #define REFCLK_RELEASE 0x0
56 #define REFCLK_REQUEST BIT(0)
65 #define VS_DEBUGCLOCKENABLE 0xD0A1
66 #define VS_SAVEPOWERCONTROL 0xD0A6
67 #define VS_UNIPROPOWERDOWNCONTROL 0xD0A8
73 VS_LINK_DISABLED = 0,
85 VS_HCE_RESET = 0,
112 RX_SYMBOL_CLK_GATE_EN = 0,
121 UFS_MTK_CAP_BOOST_CRYPT_ENGINE = 1 << 0,
207 IP_VER_MT6983 = 0x10360000,
208 IP_VER_MT6878 = 0x10420200,
211 IP_VER_MT6897 = 0x10440000,
212 IP_VER_MT6989 = 0x10450000,
213 IP_VER_MT6899 = 0x10450100,
214 IP_VER_MT6991_A0 = 0x10460000,
215 IP_VER_MT6991_B0 = 0x10470000,
216 IP_VER_MT6993 = 0x10480000,
218 IP_VER_NONE = 0xFFFFFFFF
222 IP_LEGACY_VER_MT6781 = 0x10380000,
223 IP_LEGACY_VER_MT6879 = 0x10360000,
224 IP_LEGACY_VER_MT6893 = 0x20160706