1 // SPDX-License-Identifier: GPL-2.0-only
3  * HiSilicon Hixxxx UFS Driver
5  * Copyright (c) 2016-2017 Linaro Ltd.
6  * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
14 #include <linux/dma-mapping.h>
18 #include <ufs/ufshcd.h>
19 #include "ufshcd-pltfrm.h"
20 #include <ufs/unipro.h>
21 #include "ufs-hisi.h"
22 #include <ufs/ufshci.h>
23 #include <ufs/ufs_quirks.h>
57 		dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n",  in ufs_hisi_check_hibern8()
61 		err = -1;  in ufs_hisi_check_hibern8()
62 		dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n",  in ufs_hisi_check_hibern8()
88 	if (!IS_ERR(host->rst))  in ufs_hisi_soc_init()
89 		reset_control_assert(host->rst);  in ufs_hisi_soc_init()
105 	/* bypass ufs clk gate */  in ufs_hisi_soc_init()
114 	/* disable phy iso */  in ufs_hisi_soc_init()
136 	if (!IS_ERR(host->rst))  in ufs_hisi_soc_init()
137 		reset_control_deassert(host->rst);  in ufs_hisi_soc_init()
158 	if (host->caps & UFS_HISI_CAP_PHY10nm) {  in ufs_hisi_link_startup_pre_change()
185 	if (host->caps & UFS_HISI_CAP_PHY10nm) {  in ufs_hisi_link_startup_pre_change()
222 		dev_info(hba->dev,  in ufs_hisi_link_startup_pre_change()
229 		dev_err(hba->dev, "ufs_hisi_check_hibern8 error\n");  in ufs_hisi_link_startup_pre_change()
231 	if (!(host->caps & UFS_HISI_CAP_PHY10nm))  in ufs_hisi_link_startup_pre_change()
246 		dev_info(hba->dev, "WARN: close VS_Mk2ExtnSupport failed\n");  in ufs_hisi_link_startup_pre_change()
263 	/* not bypass ufs clk gate */  in ufs_hisi_link_startup_post_change()
305 	if (host->caps & UFS_HISI_CAP_PHY10nm) {  in ufs_hisi_pwr_change_pre_change()
325 	if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME) {  in ufs_hisi_pwr_change_pre_change()
326 		pr_info("ufs flash device must set VS_DebugSaveConfigTime 0x10\n");  in ufs_hisi_pwr_change_pre_change()
338 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b0), SZ_8K - 1);  in ufs_hisi_pwr_change_pre_change()
340 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b1), SZ_64K - 1);  in ufs_hisi_pwr_change_pre_change()
342 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b2), SZ_32K - 1);  in ufs_hisi_pwr_change_pre_change()
344 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd041), SZ_8K - 1);  in ufs_hisi_pwr_change_pre_change()
346 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd042), SZ_64K - 1);  in ufs_hisi_pwr_change_pre_change()
348 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd043), SZ_32K - 1);  in ufs_hisi_pwr_change_pre_change()
350 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b3), SZ_8K - 1);  in ufs_hisi_pwr_change_pre_change()
352 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b4), SZ_64K - 1);  in ufs_hisi_pwr_change_pre_change()
354 	ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b5), SZ_32K - 1);  in ufs_hisi_pwr_change_pre_change()
356 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd044), SZ_8K - 1);  in ufs_hisi_pwr_change_pre_change()
358 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd045), SZ_64K - 1);  in ufs_hisi_pwr_change_pre_change()
360 	ufshcd_dme_set(hba, UIC_ARG_MIB(0xd046), SZ_32K - 1);  in ufs_hisi_pwr_change_pre_change()
372 		dev_err(hba->dev,  in ufs_hisi_pwr_change_notify()
374 		ret = -EINVAL;  in ufs_hisi_pwr_change_notify()
383 			dev_err(hba->dev,  in ufs_hisi_pwr_change_notify()
393 		ret = -EINVAL;  in ufs_hisi_pwr_change_notify()
417 	if (host->in_suspend) {  in ufs_hisi_suspend()
424 	/* set ref_dig_clk override of PHY PCS to 0 */  in ufs_hisi_suspend()
427 	host->in_suspend = true;  in ufs_hisi_suspend()
436 	if (!host->in_suspend)  in ufs_hisi_resume()
439 	/* set ref_dig_clk override of PHY PCS to 1 */  in ufs_hisi_resume()
444 	host->in_suspend = false;  in ufs_hisi_resume()
450 	struct device *dev = host->hba->dev;  in ufs_hisi_get_resource()
453 	/* get resource of ufs sys ctrl */  in ufs_hisi_get_resource()
454 	host->ufs_sys_ctrl = devm_platform_ioremap_resource(pdev, 1);  in ufs_hisi_get_resource()
455 	return PTR_ERR_OR_ZERO(host->ufs_sys_ctrl);  in ufs_hisi_get_resource()
460 	hba->rpm_lvl = UFS_PM_LVL_1;  in ufs_hisi_set_pm_lvl()
461 	hba->spm_lvl = UFS_PM_LVL_3;  in ufs_hisi_set_pm_lvl()
471 	struct device *dev = hba->dev;  in ufs_hisi_init_common()
476 		return -ENOMEM;  in ufs_hisi_init_common()
478 	host->hba = hba;  in ufs_hisi_init_common()
481 	host->rst = devm_reset_control_get(dev, "rst");  in ufs_hisi_init_common()
482 	if (IS_ERR(host->rst)) {  in ufs_hisi_init_common()
484 		err = PTR_ERR(host->rst);  in ufs_hisi_init_common()
504 	struct device *dev = hba->dev;  in ufs_hi3660_init()
508 		dev_err(dev, "%s: ufs common init fail\n", __func__);  in ufs_hi3660_init()
522 	struct device *dev = hba->dev;  in ufs_hi3670_init()
527 		dev_err(dev, "%s: ufs common init fail\n", __func__);  in ufs_hi3670_init()
535 	/* Add cap for 10nm PHY variant on HI3670 SoC */  in ufs_hi3670_init()
537 	host->caps |= UFS_HISI_CAP_PHY10nm;  in ufs_hi3670_init()
561 	{ .compatible = "hisilicon,hi3660-ufs", .data = &ufs_hba_hi3660_vops },
562 	{ .compatible = "hisilicon,hi3670-ufs", .data = &ufs_hba_hi3670_vops },
572 	of_id = of_match_node(ufs_hisi_of_match, pdev->dev.of_node);  in ufs_hisi_probe()
574 	return ufshcd_pltfrm_init(pdev, of_id->data);  in ufs_hisi_probe()
595 		.name	= "ufshcd-hisi",
603 MODULE_ALIAS("platform:ufshcd-hisi");
604 MODULE_DESCRIPTION("HiSilicon Hixxxx UFS Driver");