Lines Matching defs:port
111 static void stm32_usart_stop_tx(struct uart_port *port);
112 static void stm32_usart_transmit_chars(struct uart_port *port);
113 static void __maybe_unused stm32_usart_console_putchar(struct uart_port *port, unsigned char ch);
115 static inline struct stm32_port *to_stm32_port(struct uart_port *port)
117 return container_of(port, struct stm32_port, port);
120 static void stm32_usart_set_bits(struct uart_port *port, u32 reg, u32 bits)
124 val = readl_relaxed(port->membase + reg);
126 writel_relaxed(val, port->membase + reg);
129 static void stm32_usart_clr_bits(struct uart_port *port, u32 reg, u32 bits)
133 val = readl_relaxed(port->membase + reg);
135 writel_relaxed(val, port->membase + reg);
138 static unsigned int stm32_usart_tx_empty(struct uart_port *port)
140 struct stm32_port *stm32_port = to_stm32_port(port);
143 if (readl_relaxed(port->membase + ofs->isr) & USART_SR_TC)
149 static void stm32_usart_rs485_rts_enable(struct uart_port *port)
151 struct stm32_port *stm32_port = to_stm32_port(port);
152 struct serial_rs485 *rs485conf = &port->rs485;
160 stm32_port->port.mctrl | TIOCM_RTS);
163 stm32_port->port.mctrl & ~TIOCM_RTS);
167 static void stm32_usart_rs485_rts_disable(struct uart_port *port)
169 struct stm32_port *stm32_port = to_stm32_port(port);
170 struct serial_rs485 *rs485conf = &port->rs485;
178 stm32_port->port.mctrl & ~TIOCM_RTS);
181 stm32_port->port.mctrl | TIOCM_RTS);
222 static int stm32_usart_config_rs485(struct uart_port *port, struct ktermios *termios,
225 struct stm32_port *stm32_port = to_stm32_port(port);
231 stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
234 cr1 = readl_relaxed(port->membase + ofs->cr1);
235 cr3 = readl_relaxed(port->membase + ofs->cr3);
236 usartdiv = readl_relaxed(port->membase + ofs->brr);
244 baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
255 writel_relaxed(cr3, port->membase + ofs->cr3);
256 writel_relaxed(cr1, port->membase + ofs->cr1);
258 if (!port->rs485_rx_during_tx_gpio)
262 stm32_usart_clr_bits(port, ofs->cr3,
264 stm32_usart_clr_bits(port, ofs->cr1,
268 stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
271 if (stm32_usart_tx_empty(port))
272 stm32_usart_rs485_rts_disable(port);
274 stm32_usart_rs485_rts_enable(port);
279 static int stm32_usart_init_rs485(struct uart_port *port,
282 struct serial_rs485 *rs485conf = &port->rs485;
291 return uart_get_rs485_mode(port);
312 struct uart_port *port = &stm32_port->port;
325 dev_err(port->dev, "DMA failed with error code: %d\n", ret);
348 static bool stm32_usart_pending_rx_pio(struct uart_port *port, u32 *sr)
350 struct stm32_port *stm32_port = to_stm32_port(port);
353 *sr = readl_relaxed(port->membase + ofs->isr);
368 static u8 stm32_usart_get_char_pio(struct uart_port *port)
370 struct stm32_port *stm32_port = to_stm32_port(port);
374 c = readl_relaxed(port->membase + ofs->rdr);
381 static unsigned int stm32_usart_receive_chars_pio(struct uart_port *port)
383 struct stm32_port *stm32_port = to_stm32_port(port);
389 while (stm32_usart_pending_rx_pio(port, &sr)) {
406 port->membase + ofs->icr);
408 c = stm32_usart_get_char_pio(port);
409 port->icount.rx++;
413 port->icount.overrun++;
415 port->icount.parity++;
419 port->icount.brk++;
420 if (uart_handle_break(port))
423 port->icount.frame++;
427 sr &= port->read_status_mask;
439 if (uart_prepare_sysrq_char(port, c))
441 uart_insert_char(port, sr, USART_SR_ORE, c, flag);
447 static void stm32_usart_push_buffer_dma(struct uart_port *port, unsigned int dma_size)
449 struct stm32_port *stm32_port = to_stm32_port(port);
450 struct tty_port *ttyport = &stm32_port->port.state->port;
466 port->icount.rx += dma_count;
468 port->icount.buf_overrun++;
474 static unsigned int stm32_usart_receive_chars_dma(struct uart_port *port)
476 struct stm32_port *stm32_port = to_stm32_port(port);
483 stm32_usart_push_buffer_dma(port, dma_size);
488 stm32_usart_push_buffer_dma(port, dma_size);
494 static unsigned int stm32_usart_receive_chars(struct uart_port *port, bool force_dma_flush)
496 struct stm32_port *stm32_port = to_stm32_port(port);
509 size = stm32_usart_receive_chars_dma(port);
510 sr = readl_relaxed(port->membase + ofs->isr);
513 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
516 size += stm32_usart_receive_chars_pio(port);
519 stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAR);
525 dev_dbg(port->dev, "DMA error, fallback to irq mode\n");
526 size = stm32_usart_receive_chars_pio(port);
529 size = stm32_usart_receive_chars_pio(port);
537 struct uart_port *port = arg;
538 struct tty_port *tport = &port->state->port;
542 uart_port_lock_irqsave(port, &flags);
543 size = stm32_usart_receive_chars(port, false);
544 uart_unlock_and_check_sysrq_irqrestore(port, flags);
549 static int stm32_usart_rx_dma_start_or_resume(struct uart_port *port)
551 struct stm32_port *stm32_port = to_stm32_port(port);
569 dev_err(port->dev, "DMA failed : status error.\n");
583 dev_err(port->dev, "rx dma prep cyclic failed\n");
589 desc->callback_param = port;
641 struct uart_port *port = arg;
642 struct stm32_port *stm32port = to_stm32_port(port);
648 uart_port_lock_irqsave(port, &flags);
649 stm32_usart_transmit_chars(port);
650 uart_port_unlock_irqrestore(port, flags);
653 static void stm32_usart_tx_interrupt_enable(struct uart_port *port)
655 struct stm32_port *stm32_port = to_stm32_port(port);
663 stm32_usart_set_bits(port, ofs->cr3, USART_CR3_TXFTIE);
665 stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TXEIE);
668 static void stm32_usart_tc_interrupt_enable(struct uart_port *port)
670 struct stm32_port *stm32_port = to_stm32_port(port);
673 stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TCIE);
676 static void stm32_usart_tx_interrupt_disable(struct uart_port *port)
678 struct stm32_port *stm32_port = to_stm32_port(port);
682 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE);
684 stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_TXEIE);
687 static void stm32_usart_tc_interrupt_disable(struct uart_port *port)
689 struct stm32_port *stm32_port = to_stm32_port(port);
692 stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_TCIE);
695 static void stm32_usart_transmit_chars_pio(struct uart_port *port)
697 struct stm32_port *stm32_port = to_stm32_port(port);
699 struct tty_port *tport = &port->state->port;
705 if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE))
708 if (!uart_fifo_get(port, &ch))
711 writel_relaxed(ch, port->membase + ofs->tdr);
716 stm32_usart_tx_interrupt_disable(port);
718 stm32_usart_tx_interrupt_enable(port);
721 static void stm32_usart_transmit_chars_dma(struct uart_port *port)
723 struct stm32_port *stm32port = to_stm32_port(port);
724 struct tty_port *tport = &port->state->port;
757 desc->callback_param = port;
763 dev_err(port->dev, "DMA failed with error code: %d\n", ret);
771 uart_xmit_advance(port, count);
776 stm32_usart_transmit_chars_pio(port);
779 static void stm32_usart_transmit_chars(struct uart_port *port)
781 struct stm32_port *stm32_port = to_stm32_port(port);
783 struct tty_port *tport = &port->state->port;
788 port->rs485.flags & SER_RS485_ENABLED &&
789 (port->x_char ||
790 !(kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)))) {
791 stm32_usart_tc_interrupt_disable(port);
792 stm32_usart_rs485_rts_enable(port);
795 if (port->x_char) {
801 readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
806 dev_warn(port->dev, "1 character may be erased\n");
808 writel_relaxed(port->x_char, port->membase + ofs->tdr);
809 port->x_char = 0;
810 port->icount.tx++;
817 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) {
818 stm32_usart_tx_interrupt_disable(port);
823 stm32_usart_clr_bits(port, ofs->isr, USART_SR_TC);
825 writel_relaxed(USART_ICR_TCCF, port->membase + ofs->icr);
828 stm32_usart_transmit_chars_dma(port);
830 stm32_usart_transmit_chars_pio(port);
833 uart_write_wakeup(port);
836 stm32_usart_tx_interrupt_disable(port);
838 port->rs485.flags & SER_RS485_ENABLED) {
839 stm32_usart_tc_interrupt_enable(port);
846 struct uart_port *port = ptr;
847 struct tty_port *tport = &port->state->port;
848 struct stm32_port *stm32_port = to_stm32_port(port);
854 sr = readl_relaxed(port->membase + ofs->isr);
857 port->rs485.flags & SER_RS485_ENABLED &&
859 stm32_usart_tc_interrupt_disable(port);
860 stm32_usart_rs485_rts_disable(port);
866 port->membase + ofs->icr);
873 port->membase + ofs->icr);
874 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE);
875 if (irqd_is_wakeup_set(irq_get_irq_data(port->irq)))
887 uart_port_lock(port);
888 size = stm32_usart_receive_chars(port, false);
889 uart_unlock_and_check_sysrq(port);
897 uart_port_lock(port);
898 stm32_usart_transmit_chars(port);
899 uart_port_unlock(port);
905 uart_port_lock(port);
906 size = stm32_usart_receive_chars(port, false);
907 uart_unlock_and_check_sysrq(port);
916 static void stm32_usart_set_mctrl(struct uart_port *port, unsigned int mctrl)
918 struct stm32_port *stm32_port = to_stm32_port(port);
921 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS))
922 stm32_usart_set_bits(port, ofs->cr3, USART_CR3_RTSE);
924 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_RTSE);
929 static unsigned int stm32_usart_get_mctrl(struct uart_port *port)
931 struct stm32_port *stm32_port = to_stm32_port(port);
940 static void stm32_usart_enable_ms(struct uart_port *port)
942 mctrl_gpio_enable_ms(to_stm32_port(port)->gpios);
945 static void stm32_usart_disable_ms(struct uart_port *port)
947 mctrl_gpio_disable_ms_sync(to_stm32_port(port)->gpios);
951 static void stm32_usart_stop_tx(struct uart_port *port)
953 struct stm32_port *stm32_port = to_stm32_port(port);
955 stm32_usart_tx_interrupt_disable(port);
960 stm32_usart_rs485_rts_disable(port);
964 static void stm32_usart_start_tx(struct uart_port *port)
966 struct tty_port *tport = &port->state->port;
968 if (kfifo_is_empty(&tport->xmit_fifo) && !port->x_char)
971 stm32_usart_rs485_rts_enable(port);
973 stm32_usart_transmit_chars(port);
977 static void stm32_usart_flush_buffer(struct uart_port *port)
979 struct stm32_port *stm32_port = to_stm32_port(port);
986 static void stm32_usart_throttle(struct uart_port *port)
988 struct stm32_port *stm32_port = to_stm32_port(port);
992 uart_port_lock_irqsave(port, &flags);
1000 stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq);
1002 stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq);
1005 uart_port_unlock_irqrestore(port, flags);
1009 static void stm32_usart_unthrottle(struct uart_port *port)
1011 struct stm32_port *stm32_port = to_stm32_port(port);
1015 uart_port_lock_irqsave(port, &flags);
1016 stm32_usart_set_bits(port, ofs->cr1, stm32_port->cr1_irq);
1018 stm32_usart_set_bits(port, ofs->cr3, stm32_port->cr3_irq);
1027 stm32_usart_rx_dma_start_or_resume(port);
1029 uart_port_unlock_irqrestore(port, flags);
1033 static void stm32_usart_stop_rx(struct uart_port *port)
1035 struct stm32_port *stm32_port = to_stm32_port(port);
1041 stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq);
1043 stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq);
1046 static void stm32_usart_break_ctl(struct uart_port *port, int break_state)
1048 struct stm32_port *stm32_port = to_stm32_port(port);
1052 uart_port_lock_irqsave(port, &flags);
1055 stm32_usart_set_bits(port, ofs->rqr, USART_RQR_SBKRQ);
1057 stm32_usart_clr_bits(port, ofs->rqr, USART_RQR_SBKRQ);
1059 uart_port_unlock_irqrestore(port, flags);
1062 static int stm32_usart_startup(struct uart_port *port)
1064 struct stm32_port *stm32_port = to_stm32_port(port);
1067 const char *name = to_platform_device(port->dev)->name;
1071 ret = request_irq(port->irq, stm32_usart_interrupt,
1072 IRQF_NO_SUSPEND, name, port);
1077 val = readl_relaxed(port->membase + ofs->cr2);
1079 writel_relaxed(val, port->membase + ofs->cr2);
1085 writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr);
1088 ret = stm32_usart_rx_dma_start_or_resume(port);
1090 free_irq(port->irq, port);
1097 stm32_usart_set_bits(port, ofs->cr1, val);
1102 static void stm32_usart_shutdown(struct uart_port *port)
1104 struct stm32_port *stm32_port = to_stm32_port(port);
1114 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
1117 stm32_usart_disable_ms(port);
1125 ret = readl_relaxed_poll_timeout(port->membase + ofs->isr,
1131 dev_err(port->dev, "Transmission is not complete\n");
1142 port->membase + ofs->rqr);
1144 stm32_usart_clr_bits(port, ofs->cr1, val);
1146 free_irq(port->irq, port);
1151 static void stm32_usart_set_termios(struct uart_port *port,
1155 struct stm32_port *stm32_port = to_stm32_port(port);
1158 struct serial_rs485 *rs485conf = &port->rs485;
1171 baud = uart_get_baud_rate(port, termios, old, 0, uart_clk / 8);
1173 uart_port_lock_irqsave(port, &flags);
1175 ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
1182 dev_err(port->dev, "Transmission is not complete\n");
1184 /* Stop serial port and reset value */
1185 writel_relaxed(0, port->membase + ofs->cr1);
1190 port->membase + ofs->rqr);
1198 cr3 = readl_relaxed(port->membase + ofs->cr3);
1230 dev_dbg(port->dev, "Unsupported data bits config: %u bits\n"
1252 writel_relaxed(bits, port->membase + ofs->rtor);
1267 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
1269 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
1286 stm32_usart_set_bits(port, ofs->cr1, USART_CR1_OVER8);
1290 stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_OVER8);
1299 port->uartclk = uart_clk_pres;
1300 writel_relaxed(presc, port->membase + ofs->presc);
1303 dev_err(port->dev,
1309 dev_err(port->dev, "unable to set baudrate, input clock is too high");
1314 writel_relaxed(brr, port->membase + ofs->brr);
1316 uart_update_timeout(port, cflag, baud);
1318 port->read_status_mask = USART_SR_ORE;
1320 port->read_status_mask |= USART_SR_PE | USART_SR_FE;
1322 port->read_status_mask |= USART_SR_FE;
1325 port->ignore_status_mask = 0;
1327 port->ignore_status_mask = USART_SR_PE | USART_SR_FE;
1329 port->ignore_status_mask |= USART_SR_FE;
1335 port->ignore_status_mask |= USART_SR_ORE;
1340 port->ignore_status_mask |= USART_SR_DUMMY_RX;
1380 writel_relaxed(cr3, port->membase + ofs->cr3);
1381 writel_relaxed(cr2, port->membase + ofs->cr2);
1382 writel_relaxed(cr1, port->membase + ofs->cr1);
1384 stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
1385 uart_port_unlock_irqrestore(port, flags);
1388 if (UART_ENABLE_MS(port, termios->c_cflag))
1389 stm32_usart_enable_ms(port);
1391 stm32_usart_disable_ms(port);
1394 static const char *stm32_usart_type(struct uart_port *port)
1396 return (port->type == PORT_STM32) ? DRIVER_NAME : NULL;
1399 static void stm32_usart_release_port(struct uart_port *port)
1403 static int stm32_usart_request_port(struct uart_port *port)
1408 static void stm32_usart_config_port(struct uart_port *port, int flags)
1411 port->type = PORT_STM32;
1415 stm32_usart_verify_port(struct uart_port *port, struct serial_struct *ser)
1421 static void stm32_usart_pm(struct uart_port *port, unsigned int state,
1424 struct stm32_port *stm32port = container_of(port,
1425 struct stm32_port, port);
1432 pm_runtime_get_sync(port->dev);
1435 uart_port_lock_irqsave(port, &flags);
1436 stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
1437 uart_port_unlock_irqrestore(port, flags);
1438 pm_runtime_put_sync(port->dev);
1446 static int stm32_usart_poll_init(struct uart_port *port)
1448 struct stm32_port *stm32_port = to_stm32_port(port);
1453 static int stm32_usart_poll_get_char(struct uart_port *port)
1455 struct stm32_port *stm32_port = to_stm32_port(port);
1458 if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_RXNE))
1461 return readl_relaxed(port->membase + ofs->rdr) & stm32_port->rdr_mask;
1464 static void stm32_usart_poll_put_char(struct uart_port *port, unsigned char ch)
1466 stm32_usart_console_putchar(port, ch);
1523 readl_relaxed(stm32port->port.membase + ofs->hwcfgr1));
1566 struct uart_port *port = &stm32port->port;
1574 port->iotype = UPIO_MEM;
1575 port->flags = UPF_BOOT_AUTOCONF;
1576 port->ops = &stm32_uart_ops;
1577 port->dev = &pdev->dev;
1578 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_STM32_CONSOLE);
1579 port->irq = irq;
1580 port->rs485_config = stm32_usart_config_rs485;
1581 port->rs485_supported = stm32_rs485_supported;
1583 ret = stm32_usart_init_rs485(port, pdev);
1593 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1594 if (IS_ERR(port->membase))
1595 return PTR_ERR(port->membase);
1596 port->mapbase = res->start;
1598 spin_lock_init(&port->lock);
1609 stm32port->port.uartclk = clk_get_rate(stm32port->clk);
1610 if (!stm32port->port.uartclk) {
1618 port->fifosize = stm32_usart_get_ftcfg(pdev, stm32port, "tx-threshold",
1621 port->fifosize = 1;
1624 stm32port->gpios = mctrl_gpio_init(&stm32port->port, 0);
1671 stm32_ports[id].port.line = id;
1701 struct uart_port *port = &stm32port->port;
1714 config.src_addr = port->mapbase + ofs->rdr;
1739 struct uart_port *port = &stm32port->port;
1752 config.dst_addr = port->mapbase + ofs->tdr;
1801 ret = dev_pm_set_wake_irq(&pdev->dev, stm32port->port.irq);
1823 platform_set_drvdata(pdev, &stm32port->port);
1829 ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port);
1869 struct uart_port *port = platform_get_drvdata(pdev);
1870 struct stm32_port *stm32_port = to_stm32_port(port);
1875 uart_remove_one_port(&stm32_usart_driver, port);
1881 stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_PEIE);
1893 cr3 = readl_relaxed(port->membase + ofs->cr3);
1898 writel_relaxed(cr3, port->membase + ofs->cr3);
1908 static void __maybe_unused stm32_usart_console_putchar(struct uart_port *port, unsigned char ch)
1910 struct stm32_port *stm32_port = to_stm32_port(port);
1915 ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr, isr,
1919 dev_err(port->dev, "Error while sending data in UART TX : %d\n", ret);
1922 writel_relaxed(ch, port->membase + ofs->tdr);
1929 struct uart_port *port = &stm32_ports[co->index].port;
1930 struct stm32_port *stm32_port = to_stm32_port(port);
1938 locked = uart_port_trylock_irqsave(port, &flags);
1940 uart_port_lock_irqsave(port, &flags);
1943 old_cr1 = readl_relaxed(port->membase + ofs->cr1);
1946 writel_relaxed(new_cr1, port->membase + ofs->cr1);
1948 uart_console_write(port, s, cnt, stm32_usart_console_putchar);
1951 writel_relaxed(old_cr1, port->membase + ofs->cr1);
1954 uart_port_unlock_irqrestore(port, flags);
1973 * this to be called during the uart port registration when the
1974 * driver gets probed and the port should be mapped at that point.
1976 if (stm32port->port.mapbase == 0 || !stm32port->port.membase)
1982 return uart_set_options(&stm32port->port, co, baud, parity, bits, flow);
2002 static void early_stm32_usart_console_putchar(struct uart_port *port, unsigned char ch)
2004 struct stm32_usart_info *info = port->private_data;
2006 while (!(readl_relaxed(port->membase + info->ofs.isr) & USART_SR_TXE))
2009 writel_relaxed(ch, port->membase + info->ofs.tdr);
2015 struct uart_port *port = &device->port;
2017 uart_console_write(port, s, count, early_stm32_usart_console_putchar);
2022 if (!(device->port.membase || device->port.iobase))
2024 device->port.private_data = &stm32h7_info;
2031 if (!(device->port.membase || device->port.iobase))
2033 device->port.private_data = &stm32f7_info;
2040 if (!(device->port.membase || device->port.iobase))
2042 device->port.private_data = &stm32f4_info;
2061 static int __maybe_unused stm32_usart_serial_en_wakeup(struct uart_port *port,
2064 struct stm32_port *stm32_port = to_stm32_port(port);
2066 struct tty_port *tport = &port->state->port;
2079 stm32_usart_set_bits(port, ofs->cr1, USART_CR1_UESM);
2080 stm32_usart_set_bits(port, ofs->cr3, USART_CR3_WUFIE);
2089 uart_port_lock_irqsave(port, &flags);
2092 size += stm32_usart_receive_chars(port, true);
2094 uart_unlock_and_check_sysrq_irqrestore(port, flags);
2100 stm32_usart_receive_chars(port, false);
2103 ret = stm32_usart_rx_dma_start_or_resume(port);
2108 stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_UESM);
2109 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE);
2117 struct uart_port *port = dev_get_drvdata(dev);
2120 uart_suspend_port(&stm32_usart_driver, port);
2123 ret = stm32_usart_serial_en_wakeup(port, true);
2134 if (console_suspend_enabled || !uart_console(port)) {
2146 struct uart_port *port = dev_get_drvdata(dev);
2152 ret = stm32_usart_serial_en_wakeup(port, false);
2157 return uart_resume_port(&stm32_usart_driver, port);
2162 struct uart_port *port = dev_get_drvdata(dev);
2163 struct stm32_port *stm32port = container_of(port,
2164 struct stm32_port, port);
2173 struct uart_port *port = dev_get_drvdata(dev);
2174 struct stm32_port *stm32port = container_of(port,
2175 struct stm32_port, port);
2225 MODULE_DESCRIPTION("STMicroelectronics STM32 serial port driver");