Lines Matching +full:auto +full:- +full:baud
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - common code
53 * - only on 75x/76x
56 * - only on 75x/76x
59 * - only on 75x/76x
62 * - only on 75x/76x
90 /* IER register bits - write only if (EFR[4] == 1) */
103 /* FCR register bits - write only if (EFR[4] == 1) */
113 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
115 * - only on 75x/76x
118 * - only on 75x/76x
130 * 00 -> 5 bit words
131 * 01 -> 6 bit words
132 * 10 -> 7 bit words
133 * 11 -> 8 bit words
138 * 0 -> 1 stop bit
139 * 1 -> 1-1.5 stop bits if
145 #define SC16IS7XX_LCR_FORCEPARITY_BIT BIT(5) /* 9-bit multidrop parity */
159 * - only on 75x/76x
165 * - write enabled
169 * - write enabled
173 * - write enabled
197 * - only on 75x/76x
201 * - only on 75x/76x
205 * - only on 75x/76x
209 * - only on 75x/76x
212 * - only on 75x/76x
215 * - only on 75x/76x
223 * no built-in hardware check to make sure this condition is met. Also, the TCR
224 * must be programmed with this condition before auto RTS or software flow
238 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
255 #define SC16IS7XX_EFCR_9BIT_MODE_BIT BIT(0) /* Enable 9-bit or Multidrop
259 #define SC16IS7XX_EFCR_AUTO_RS485_BIT BIT(4) /* Auto RS485 RTS direction */
263 * - Only 75x/76x
265 * - Only 76x
269 #define SC16IS7XX_EFR_AUTORTS_BIT BIT(6) /* Auto RTS flow ctrl enable */
270 #define SC16IS7XX_EFR_AUTOCTS_BIT BIT(7) /* Auto CTS flow ctrl enable */
280 * 00 -> no transmitter flow
282 * 01 -> transmitter generates
284 * 10 -> transmitter generates
286 * 11 -> transmitter generates
294 * 00 -> no received flow
296 * 01 -> receiver compares
298 * 10 -> receiver compares
300 * 11 -> receiver compares
370 regmap_read(one->regmap, reg, &val); in sc16is7xx_port_read()
379 regmap_write(one->regmap, reg, val); in sc16is7xx_port_write()
386 regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, rxbuf, rxlen); in sc16is7xx_fifo_read()
394 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
400 regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, txbuf, to_send); in sc16is7xx_fifo_write()
408 regmap_update_bits(one->regmap, reg, mask, val); in sc16is7xx_port_update()
436 mutex_lock(&one->efr_lock); in sc16is7xx_efr_lock()
439 one->old_lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_efr_lock()
445 regcache_cache_bypass(one->regmap, true); in sc16is7xx_efr_lock()
452 /* Re-enable cache updates when writing to normal registers */ in sc16is7xx_efr_unlock()
453 regcache_cache_bypass(one->regmap, false); in sc16is7xx_efr_unlock()
456 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, one->old_lcr); in sc16is7xx_efr_unlock()
458 mutex_unlock(&one->efr_lock); in sc16is7xx_efr_unlock()
463 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
466 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
468 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
469 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
470 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
471 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
476 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
479 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
481 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
482 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
483 one->config.ier_val |= bit; in sc16is7xx_ier_set()
484 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
565 * Configure programmable baud rate generator (divisor) according to the
566 * desired baud rate.
571 * -----------------------
573 * divisor = ---------------------------
574 * baud-rate x sampling-rate
576 static int sc16is7xx_set_baud(struct uart_port *port, int baud) in sc16is7xx_set_baud() argument
581 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
600 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
608 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
611 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
616 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
629 if (unlikely(rxlen >= sizeof(one->buf))) { in sc16is7xx_handle_rx()
630 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
632 port->line, rxlen); in sc16is7xx_handle_rx()
633 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
635 rxlen = sizeof(one->buf); in sc16is7xx_handle_rx()
648 one->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
651 sc16is7xx_fifo_read(port, one->buf, rxlen); in sc16is7xx_handle_rx()
657 port->icount.rx++; in sc16is7xx_handle_rx()
662 port->icount.brk++; in sc16is7xx_handle_rx()
666 port->icount.parity++; in sc16is7xx_handle_rx()
668 port->icount.frame++; in sc16is7xx_handle_rx()
670 port->icount.overrun++; in sc16is7xx_handle_rx()
672 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
684 ch = one->buf[i]; in sc16is7xx_handle_rx()
688 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
694 rxlen -= bytes_read; in sc16is7xx_handle_rx()
697 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
702 struct tty_port *tport = &port->state->port; in sc16is7xx_handle_tx()
707 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
708 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
709 port->icount.tx++; in sc16is7xx_handle_tx()
710 port->x_char = 0; in sc16is7xx_handle_tx()
714 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) { in sc16is7xx_handle_tx()
724 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
730 txlen = kfifo_out_linear_ptr(&tport->xmit_fifo, &tail, txlen); in sc16is7xx_handle_tx()
735 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in sc16is7xx_handle_tx()
738 if (kfifo_is_empty(&tport->xmit_fifo)) in sc16is7xx_handle_tx()
759 struct uart_port *port = &one->port; in sc16is7xx_update_mlines()
763 lockdep_assert_held_once(&one->efr_lock); in sc16is7xx_update_mlines()
766 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
771 one->old_mctrl = status; in sc16is7xx_update_mlines()
775 port->icount.rng++; in sc16is7xx_update_mlines()
777 port->icount.dsr++; in sc16is7xx_update_mlines()
783 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
791 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq()
794 mutex_lock(&one->efr_lock); in sc16is7xx_port_irq()
813 * time-out interrupt but no data in the FIFO. This is in sc16is7xx_port_irq()
834 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
836 port->line, iir); in sc16is7xx_port_irq()
841 mutex_unlock(&one->efr_lock); in sc16is7xx_port_irq()
857 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
866 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc()
869 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
870 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
871 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
873 mutex_lock(&one->efr_lock); in sc16is7xx_tx_proc()
875 mutex_unlock(&one->efr_lock); in sc16is7xx_tx_proc()
883 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485()
887 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
890 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
904 uart_port_lock_irqsave(&one->port, &irqflags); in sc16is7xx_reg_proc()
905 config = one->config; in sc16is7xx_reg_proc()
906 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
907 uart_port_unlock_irqrestore(&one->port, irqflags); in sc16is7xx_reg_proc()
913 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
916 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
919 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
921 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
929 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
933 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
939 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
941 if (one->port.state) { in sc16is7xx_ms_proc()
942 mutex_lock(&one->efr_lock); in sc16is7xx_ms_proc()
944 mutex_unlock(&one->efr_lock); in sc16is7xx_ms_proc()
946 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
953 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
955 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
957 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
962 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
965 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
975 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
1005 return one->old_mctrl; in sc16is7xx_get_mctrl()
1010 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
1013 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
1014 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1030 int baud; in sc16is7xx_set_termios() local
1033 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1036 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1039 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1054 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1055 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1060 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1062 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1067 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1071 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1072 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1073 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1075 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1076 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1079 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1080 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1081 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1082 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1083 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1086 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1087 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1090 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1092 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1094 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1102 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1103 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1108 /* Get baud rate generator configuration */ in sc16is7xx_set_termios()
1109 baud = uart_get_baud_rate(port, termios, old, in sc16is7xx_set_termios()
1110 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1111 port->uartclk / 16); in sc16is7xx_set_termios()
1114 baud = sc16is7xx_set_baud(port, baud); in sc16is7xx_set_termios()
1118 /* Update timeout according to new baud rate */ in sc16is7xx_set_termios()
1119 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1121 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1130 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1133 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1139 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1140 return -EINVAL; in sc16is7xx_config_rs485()
1143 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1144 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1168 regcache_cache_bypass(one->regmap, true); in sc16is7xx_startup()
1186 regcache_cache_bypass(one->regmap, false); in sc16is7xx_startup()
1195 one->irda_mode ? in sc16is7xx_startup()
1219 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1222 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1235 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1240 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1242 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1254 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1260 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1261 return -EINVAL; in sc16is7xx_verify_port()
1262 if (s->irq != port->irq) in sc16is7xx_verify_port()
1263 return -EINVAL; in sc16is7xx_verify_port()
1306 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get()
1316 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set()
1326 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input()
1337 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output()
1366 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1373 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1375 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1378 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1380 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1383 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1386 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1392 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1395 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1396 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1397 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1398 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1399 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1400 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1401 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1402 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1403 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1404 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1405 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1407 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1417 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_irda_ports()
1419 count = device_property_count_u32(dev, "irda-mode-ports"); in sc16is7xx_setup_irda_ports()
1423 ret = device_property_read_u32_array(dev, "irda-mode-ports", in sc16is7xx_setup_irda_ports()
1429 if (irda_port[i] < s->devtype->nr_uart) in sc16is7xx_setup_irda_ports()
1430 s->p[irda_port[i]].irda_mode = true; in sc16is7xx_setup_irda_ports()
1444 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1446 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1450 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1455 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1460 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1462 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1465 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1470 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1478 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1514 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1529 return -EPROBE_DEFER; in sc16is7xx_probe()
1532 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1535 return -ENOMEM; in sc16is7xx_probe()
1539 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1541 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1542 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1543 return PTR_ERR(s->clk); in sc16is7xx_probe()
1545 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1549 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1558 return -EINVAL; in sc16is7xx_probe()
1561 s->devtype = devtype; in sc16is7xx_probe()
1564 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1565 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1567 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1568 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1571 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1578 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1579 s->p[i].port.line = SC16IS7XX_MAX_DEVS; in sc16is7xx_probe()
1583 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1585 SC16IS7XX_MAX_DEVS - 1, GFP_KERNEL); in sc16is7xx_probe()
1589 s->p[i].port.line = ret; in sc16is7xx_probe()
1592 s->p[i].port.dev = dev; in sc16is7xx_probe()
1593 s->p[i].port.irq = irq; in sc16is7xx_probe()
1594 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1595 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1596 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1597 s->p[i].port.iobase = i; in sc16is7xx_probe()
1603 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1604 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1605 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1606 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1607 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1608 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1609 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1610 s->p[i].regmap = regmaps[i]; in sc16is7xx_probe()
1612 mutex_init(&s->p[i].efr_lock); in sc16is7xx_probe()
1614 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1619 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1621 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1626 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1627 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1628 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1631 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1638 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1644 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1650 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1653 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1672 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1688 if (s->gpio_valid_mask) in sc16is7xx_probe()
1689 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1693 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_probe()
1694 if (s->p[i].port.line < SC16IS7XX_MAX_DEVS) in sc16is7xx_probe()
1695 ida_free(&sc16is7xx_lines, s->p[i].port.line); in sc16is7xx_probe()
1697 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1701 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1704 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1716 if (s->gpio_valid_mask) in sc16is7xx_remove()
1717 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1720 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1721 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1722 ida_free(&sc16is7xx_lines, s->p[i].port.line); in sc16is7xx_remove()
1723 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1724 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1727 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1728 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1730 clk_disable_unprepare(s->clk); in sc16is7xx_remove()