Lines Matching +full:gs101 +full:- +full:uart
1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
28 #include <linux/dma-mapping.h>
48 /* UART name and device definitions */
91 /* uart port features */
165 #define portaddr(port, reg) ((port)->membase + (reg))
167 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
171 switch (port->iotype) { in rd_reg()
186 switch (port->iotype) { in wr_reg()
200 /* Byte-order aware bit setting/clearing functions. */
237 return to_platform_device(port->dev)->name; in s3c24xx_serial_portname()
254 while (--count && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_rx_enable()
265 ourport->rx_enabled = 1; in s3c24xx_serial_rx_enable()
281 ourport->rx_enabled = 0; in s3c24xx_serial_rx_disable()
288 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_tx()
292 if (!ourport->tx_enabled) in s3c24xx_serial_stop_tx()
295 switch (ourport->info->type) { in s3c24xx_serial_stop_tx()
303 disable_irq_nosync(ourport->tx_irq); in s3c24xx_serial_stop_tx()
307 if (dma && dma->tx_chan && ourport->tx_in_progress == S3C24XX_TX_DMA) { in s3c24xx_serial_stop_tx()
308 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_tx()
309 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_stop_tx()
310 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_stop_tx()
311 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_stop_tx()
312 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_stop_tx()
314 async_tx_ack(dma->tx_desc); in s3c24xx_serial_stop_tx()
315 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_stop_tx()
319 ourport->tx_enabled = 0; in s3c24xx_serial_stop_tx()
320 ourport->tx_in_progress = 0; in s3c24xx_serial_stop_tx()
322 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_stop_tx()
325 ourport->tx_mode = 0; in s3c24xx_serial_stop_tx()
333 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_dma_complete()
334 struct tty_port *tport = &port->state->port; in s3c24xx_serial_tx_dma_complete()
335 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_tx_dma_complete()
340 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_tx_dma_complete()
341 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_tx_dma_complete()
342 async_tx_ack(dma->tx_desc); in s3c24xx_serial_tx_dma_complete()
344 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_tx_dma_complete()
345 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_tx_dma_complete()
351 ourport->tx_in_progress = 0; in s3c24xx_serial_tx_dma_complete()
353 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in s3c24xx_serial_tx_dma_complete()
362 const struct uart_port *port = &ourport->port; in enable_tx_dma()
366 switch (ourport->info->type) { in enable_tx_dma()
374 disable_irq_nosync(ourport->tx_irq); in enable_tx_dma()
385 ourport->tx_mode = S3C24XX_TX_DMA; in enable_tx_dma()
390 const struct uart_port *port = &ourport->port; in enable_tx_pio()
394 ourport->tx_in_progress = S3C24XX_TX_PIO; in enable_tx_pio()
405 switch (ourport->info->type) { in enable_tx_pio()
415 enable_irq(ourport->tx_irq); in enable_tx_pio()
419 ourport->tx_mode = S3C24XX_TX_PIO; in enable_tx_pio()
425 if (ourport->info->type == TYPE_APPLE_S5L) in enable_tx_pio()
431 if (ourport->tx_mode != S3C24XX_TX_PIO) in s3c24xx_serial_start_tx_pio()
438 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_start_tx_dma()
440 if (ourport->tx_mode != S3C24XX_TX_DMA) in s3c24xx_serial_start_tx_dma()
443 dma->tx_size = count & ~(dma_get_cache_alignment() - 1); in s3c24xx_serial_start_tx_dma()
444 dma->tx_transfer_addr = dma->tx_addr + tail; in s3c24xx_serial_start_tx_dma()
446 dma_sync_single_for_device(dma->tx_chan->device->dev, in s3c24xx_serial_start_tx_dma()
447 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
450 dma->tx_desc = dmaengine_prep_slave_single(dma->tx_chan, in s3c24xx_serial_start_tx_dma()
451 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
453 if (!dma->tx_desc) { in s3c24xx_serial_start_tx_dma()
454 dev_err(ourport->port.dev, "Unable to get desc for Tx\n"); in s3c24xx_serial_start_tx_dma()
455 return -EIO; in s3c24xx_serial_start_tx_dma()
458 dma->tx_desc->callback = s3c24xx_serial_tx_dma_complete; in s3c24xx_serial_start_tx_dma()
459 dma->tx_desc->callback_param = ourport; in s3c24xx_serial_start_tx_dma()
460 dma->tx_bytes_requested = dma->tx_size; in s3c24xx_serial_start_tx_dma()
462 ourport->tx_in_progress = S3C24XX_TX_DMA; in s3c24xx_serial_start_tx_dma()
463 dma->tx_cookie = dmaengine_submit(dma->tx_desc); in s3c24xx_serial_start_tx_dma()
464 dma_async_issue_pending(dma->tx_chan); in s3c24xx_serial_start_tx_dma()
470 struct uart_port *port = &ourport->port; in s3c24xx_serial_start_next_tx()
471 struct tty_port *tport = &port->state->port; in s3c24xx_serial_start_next_tx()
475 count = kfifo_out_linear(&tport->xmit_fifo, &tail, UART_XMIT_SIZE); in s3c24xx_serial_start_next_tx()
482 if (!ourport->dma || !ourport->dma->tx_chan || in s3c24xx_serial_start_next_tx()
483 count < ourport->min_dma_size || in s3c24xx_serial_start_next_tx()
484 tail & (dma_get_cache_alignment() - 1)) in s3c24xx_serial_start_next_tx()
493 struct tty_port *tport = &port->state->port; in s3c24xx_serial_start_tx()
495 if (!ourport->tx_enabled) { in s3c24xx_serial_start_tx()
496 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_start_tx()
499 ourport->tx_enabled = 1; in s3c24xx_serial_start_tx()
500 if (!ourport->dma || !ourport->dma->tx_chan) in s3c24xx_serial_start_tx()
504 if (ourport->dma && ourport->dma->tx_chan) { in s3c24xx_serial_start_tx()
505 if (!kfifo_is_empty(&tport->xmit_fifo) && in s3c24xx_serial_start_tx()
506 !ourport->tx_in_progress) in s3c24xx_serial_start_tx()
514 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_uart_copy_rx_to_tty()
520 dma_sync_single_for_cpu(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_uart_copy_rx_to_tty()
521 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_uart_copy_rx_to_tty()
523 ourport->port.icount.rx += count; in s3c24xx_uart_copy_rx_to_tty()
525 dev_err(ourport->port.dev, "No tty port\n"); in s3c24xx_uart_copy_rx_to_tty()
529 ((unsigned char *)(ourport->dma->rx_buf)), count); in s3c24xx_uart_copy_rx_to_tty()
532 dev_err(ourport->port.dev, "RxData copy to tty layer failed\n"); in s3c24xx_uart_copy_rx_to_tty()
539 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_rx()
540 struct tty_port *t = &port->state->port; in s3c24xx_serial_stop_rx()
545 if (ourport->rx_enabled) { in s3c24xx_serial_stop_rx()
546 dev_dbg(port->dev, "stopping rx\n"); in s3c24xx_serial_stop_rx()
547 switch (ourport->info->type) { in s3c24xx_serial_stop_rx()
558 disable_irq_nosync(ourport->rx_irq); in s3c24xx_serial_stop_rx()
561 ourport->rx_enabled = 0; in s3c24xx_serial_stop_rx()
563 if (dma && dma->rx_chan) { in s3c24xx_serial_stop_rx()
564 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_rx()
565 dma_status = dmaengine_tx_status(dma->rx_chan, in s3c24xx_serial_stop_rx()
566 dma->rx_cookie, &state); in s3c24xx_serial_stop_rx()
569 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_stop_rx()
570 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_stop_rx()
579 return to_ourport(port)->info; in s3c24xx_port_to_info()
587 if (port->dev == NULL) in s3c24xx_port_to_cfg()
591 return ourport->cfg; in s3c24xx_port_to_cfg()
597 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_rx_fifocnt()
599 if (ufstat & info->rx_fifofull) in s3c24xx_serial_rx_fifocnt()
600 return ourport->port.fifosize; in s3c24xx_serial_rx_fifocnt()
602 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; in s3c24xx_serial_rx_fifocnt()
609 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_dma_complete()
611 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_dma_complete()
612 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_dma_complete()
613 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_dma_complete()
619 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_dma_complete()
620 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_dma_complete()
621 async_tx_ack(dma->rx_desc); in s3c24xx_serial_rx_dma_complete()
640 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c64xx_start_rx_dma()
642 dma_sync_single_for_device(dma->rx_chan->device->dev, dma->rx_addr, in s3c64xx_start_rx_dma()
643 dma->rx_size, DMA_FROM_DEVICE); in s3c64xx_start_rx_dma()
645 dma->rx_desc = dmaengine_prep_slave_single(dma->rx_chan, in s3c64xx_start_rx_dma()
646 dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, in s3c64xx_start_rx_dma()
648 if (!dma->rx_desc) { in s3c64xx_start_rx_dma()
649 dev_err(ourport->port.dev, "Unable to get desc for Rx\n"); in s3c64xx_start_rx_dma()
653 dma->rx_desc->callback = s3c24xx_serial_rx_dma_complete; in s3c64xx_start_rx_dma()
654 dma->rx_desc->callback_param = ourport; in s3c64xx_start_rx_dma()
655 dma->rx_bytes_requested = dma->rx_size; in s3c64xx_start_rx_dma()
657 dma->rx_cookie = dmaengine_submit(dma->rx_desc); in s3c64xx_start_rx_dma()
658 dma_async_issue_pending(dma->rx_chan); in s3c64xx_start_rx_dma()
661 /* ? - where has parity gone?? */
666 struct uart_port *port = &ourport->port; in enable_rx_dma()
684 ourport->rx_mode = S3C24XX_RX_DMA; in enable_rx_dma()
689 struct uart_port *port = &ourport->port; in enable_rx_pio()
698 if (ourport->info->type != TYPE_APPLE_S5L) { in enable_rx_pio()
708 ourport->rx_mode = S3C24XX_RX_PIO; in enable_rx_pio()
715 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_dma()
716 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_chars_dma()
717 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_chars_dma()
718 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_chars_dma()
730 if (ourport->rx_mode == S3C24XX_RX_PIO) in s3c24xx_serial_rx_chars_dma()
735 if (ourport->rx_mode == S3C24XX_RX_DMA) { in s3c24xx_serial_rx_chars_dma()
736 dmaengine_pause(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
737 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_chars_dma()
738 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
739 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_chars_dma()
762 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_drain_fifo()
763 unsigned int max_count = port->fifosize; in s3c24xx_serial_rx_drain_fifo()
768 while (max_count-- > 0) { in s3c24xx_serial_rx_drain_fifo()
779 fifocnt--; in s3c24xx_serial_rx_drain_fifo()
784 if (port->flags & UPF_CONS_FLOW) { in s3c24xx_serial_rx_drain_fifo()
787 if (ourport->rx_enabled) { in s3c24xx_serial_rx_drain_fifo()
789 ourport->rx_enabled = 0; in s3c24xx_serial_rx_drain_fifo()
797 ourport->rx_enabled = 1; in s3c24xx_serial_rx_drain_fifo()
807 port->icount.rx++; in s3c24xx_serial_rx_drain_fifo()
810 dev_dbg(port->dev, in s3c24xx_serial_rx_drain_fifo()
816 dev_dbg(port->dev, "break!\n"); in s3c24xx_serial_rx_drain_fifo()
817 port->icount.brk++; in s3c24xx_serial_rx_drain_fifo()
823 port->icount.frame++; in s3c24xx_serial_rx_drain_fifo()
825 port->icount.overrun++; in s3c24xx_serial_rx_drain_fifo()
827 uerstat &= port->read_status_mask; in s3c24xx_serial_rx_drain_fifo()
845 tty_flip_buffer_push(&port->state->port); in s3c24xx_serial_rx_drain_fifo()
850 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_pio()
861 if (ourport->dma && ourport->dma->rx_chan) in s3c24xx_serial_rx_irq()
868 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_chars()
869 struct tty_port *tport = &port->state->port; in s3c24xx_serial_tx_chars()
872 count = kfifo_out_linear(&tport->xmit_fifo, &tail, UART_XMIT_SIZE); in s3c24xx_serial_tx_chars()
874 if (ourport->dma && ourport->dma->tx_chan && in s3c24xx_serial_tx_chars()
875 count >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
876 int align = dma_get_cache_alignment() - in s3c24xx_serial_tx_chars()
877 (tail & (dma_get_cache_alignment() - 1)); in s3c24xx_serial_tx_chars()
878 if (count - align >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
879 dma_count = count - align; in s3c24xx_serial_tx_chars()
885 if (port->x_char) { in s3c24xx_serial_tx_chars()
886 wr_reg(port, S3C2410_UTXH, port->x_char); in s3c24xx_serial_tx_chars()
887 port->icount.tx++; in s3c24xx_serial_tx_chars()
888 port->x_char = 0; in s3c24xx_serial_tx_chars()
892 /* if there isn't anything more to transmit, or the uart is now in s3c24xx_serial_tx_chars()
893 * stopped, disable the uart and exit in s3c24xx_serial_tx_chars()
896 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) { in s3c24xx_serial_tx_chars()
903 if (count > port->fifosize) { in s3c24xx_serial_tx_chars()
904 count = port->fifosize; in s3c24xx_serial_tx_chars()
908 while (!(rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull)) { in s3c24xx_serial_tx_chars()
915 count--; in s3c24xx_serial_tx_chars()
923 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in s3c24xx_serial_tx_chars()
926 if (kfifo_is_empty(&tport->xmit_fifo)) in s3c24xx_serial_tx_chars()
932 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_irq()
946 const struct uart_port *port = &ourport->port; in s3c64xx_serial_handle_irq()
965 const struct uart_port *port = &ourport->port; in apple_serial_handle_irq()
991 if ((ufstat & info->tx_fifomask) || in s3c24xx_serial_tx_empty()
992 (ufstat & info->tx_fifofull)) in s3c24xx_serial_tx_empty()
1052 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_request_dma()
1058 dma->rx_conf.direction = DMA_DEV_TO_MEM; in s3c24xx_serial_request_dma()
1059 dma->rx_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1060 dma->rx_conf.src_addr = p->port.mapbase + S3C2410_URXH; in s3c24xx_serial_request_dma()
1061 dma->rx_conf.src_maxburst = 1; in s3c24xx_serial_request_dma()
1063 dma->tx_conf.direction = DMA_MEM_TO_DEV; in s3c24xx_serial_request_dma()
1064 dma->tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1065 dma->tx_conf.dst_addr = p->port.mapbase + S3C2410_UTXH; in s3c24xx_serial_request_dma()
1066 dma->tx_conf.dst_maxburst = 1; in s3c24xx_serial_request_dma()
1068 dma->rx_chan = dma_request_chan(p->port.dev, "rx"); in s3c24xx_serial_request_dma()
1070 if (IS_ERR(dma->rx_chan)) { in s3c24xx_serial_request_dma()
1072 ret = PTR_ERR(dma->rx_chan); in s3c24xx_serial_request_dma()
1076 ret = dma_get_slave_caps(dma->rx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1080 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1084 dmaengine_slave_config(dma->rx_chan, &dma->rx_conf); in s3c24xx_serial_request_dma()
1086 dma->tx_chan = dma_request_chan(p->port.dev, "tx"); in s3c24xx_serial_request_dma()
1087 if (IS_ERR(dma->tx_chan)) { in s3c24xx_serial_request_dma()
1089 ret = PTR_ERR(dma->tx_chan); in s3c24xx_serial_request_dma()
1093 ret = dma_get_slave_caps(dma->tx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1097 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1101 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf); in s3c24xx_serial_request_dma()
1104 dma->rx_size = PAGE_SIZE; in s3c24xx_serial_request_dma()
1106 dma->rx_buf = kmalloc(dma->rx_size, GFP_KERNEL); in s3c24xx_serial_request_dma()
1107 if (!dma->rx_buf) { in s3c24xx_serial_request_dma()
1108 ret = -ENOMEM; in s3c24xx_serial_request_dma()
1112 dma->rx_addr = dma_map_single(dma->rx_chan->device->dev, dma->rx_buf, in s3c24xx_serial_request_dma()
1113 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1114 if (dma_mapping_error(dma->rx_chan->device->dev, dma->rx_addr)) { in s3c24xx_serial_request_dma()
1116 ret = -EIO; in s3c24xx_serial_request_dma()
1121 dma->tx_addr = dma_map_single(dma->tx_chan->device->dev, in s3c24xx_serial_request_dma()
1122 p->port.state->port.xmit_buf, in s3c24xx_serial_request_dma()
1125 if (dma_mapping_error(dma->tx_chan->device->dev, dma->tx_addr)) { in s3c24xx_serial_request_dma()
1127 ret = -EIO; in s3c24xx_serial_request_dma()
1134 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_request_dma()
1135 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1137 kfree(dma->rx_buf); in s3c24xx_serial_request_dma()
1139 dma_release_channel(dma->tx_chan); in s3c24xx_serial_request_dma()
1141 dma_release_channel(dma->rx_chan); in s3c24xx_serial_request_dma()
1144 dev_warn(p->port.dev, "%s, DMA will not be used\n", reason); in s3c24xx_serial_request_dma()
1150 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_release_dma()
1152 if (dma->rx_chan) { in s3c24xx_serial_release_dma()
1153 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_release_dma()
1154 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_release_dma()
1155 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_release_dma()
1156 kfree(dma->rx_buf); in s3c24xx_serial_release_dma()
1157 dma_release_channel(dma->rx_chan); in s3c24xx_serial_release_dma()
1158 dma->rx_chan = NULL; in s3c24xx_serial_release_dma()
1161 if (dma->tx_chan) { in s3c24xx_serial_release_dma()
1162 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_release_dma()
1163 dma_unmap_single(dma->tx_chan->device->dev, dma->tx_addr, in s3c24xx_serial_release_dma()
1165 dma_release_channel(dma->tx_chan); in s3c24xx_serial_release_dma()
1166 dma->tx_chan = NULL; in s3c24xx_serial_release_dma()
1174 ourport->tx_enabled = 0; in s3c64xx_serial_shutdown()
1175 ourport->tx_mode = 0; in s3c64xx_serial_shutdown()
1176 ourport->rx_enabled = 0; in s3c64xx_serial_shutdown()
1178 free_irq(port->irq, ourport); in s3c64xx_serial_shutdown()
1183 if (ourport->dma) in s3c64xx_serial_shutdown()
1186 ourport->tx_in_progress = 0; in s3c64xx_serial_shutdown()
1204 free_irq(port->irq, ourport); in apple_s5l_serial_shutdown()
1206 ourport->tx_enabled = 0; in apple_s5l_serial_shutdown()
1207 ourport->tx_mode = 0; in apple_s5l_serial_shutdown()
1208 ourport->rx_enabled = 0; in apple_s5l_serial_shutdown()
1210 if (ourport->dma) in apple_s5l_serial_shutdown()
1213 ourport->tx_in_progress = 0; in apple_s5l_serial_shutdown()
1224 if (ourport->dma) { in s3c64xx_serial_startup()
1227 devm_kfree(port->dev, ourport->dma); in s3c64xx_serial_startup()
1228 ourport->dma = NULL; in s3c64xx_serial_startup()
1232 ret = request_irq(port->irq, s3c64xx_serial_handle_irq, IRQF_SHARED, in s3c64xx_serial_startup()
1235 dev_err(port->dev, "cannot get irq %d\n", port->irq); in s3c64xx_serial_startup()
1240 ourport->rx_enabled = 1; in s3c64xx_serial_startup()
1241 ourport->tx_enabled = 0; in s3c64xx_serial_startup()
1270 ret = request_irq(port->irq, apple_serial_handle_irq, 0, in apple_s5l_serial_startup()
1273 dev_err(port->dev, "cannot get irq %d\n", port->irq); in apple_s5l_serial_startup()
1278 ourport->rx_enabled = 1; in apple_s5l_serial_startup()
1279 ourport->tx_enabled = 0; in apple_s5l_serial_startup()
1307 ourport->pm_level = level; in s3c24xx_serial_pm()
1311 while (--timeout && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_pm()
1314 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1315 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_pm()
1317 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_pm()
1321 clk_prepare_enable(ourport->clk); in s3c24xx_serial_pm()
1323 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1324 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_pm()
1327 dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level); in s3c24xx_serial_pm()
1351 if (info->num_clks == 1) in s3c24xx_serial_getsource()
1355 ucon &= info->clksel_mask; in s3c24xx_serial_getsource()
1356 return ucon >> info->clksel_shift; in s3c24xx_serial_getsource()
1364 if (info->num_clks == 1) in s3c24xx_serial_setsource()
1368 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) in s3c24xx_serial_setsource()
1371 ucon &= ~info->clksel_mask; in s3c24xx_serial_setsource()
1372 ucon |= clk_sel << info->clksel_shift; in s3c24xx_serial_setsource()
1380 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_getclk()
1385 int calc_deviation, deviation = (1 << 30) - 1; in s3c24xx_serial_getclk()
1388 for (cnt = 0; cnt < info->num_clks; cnt++) { in s3c24xx_serial_getclk()
1390 if (ourport->cfg->clk_sel && in s3c24xx_serial_getclk()
1391 !(ourport->cfg->clk_sel & (1 << cnt))) in s3c24xx_serial_getclk()
1395 clk = clk_get(ourport->port.dev, clkname); in s3c24xx_serial_getclk()
1401 dev_err(ourport->port.dev, in s3c24xx_serial_getclk()
1407 if (ourport->info->has_divslot) { in s3c24xx_serial_getclk()
1424 quot--; in s3c24xx_serial_getclk()
1426 calc_deviation = abs(req_baud - baud); in s3c24xx_serial_getclk()
1477 struct clk *clk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1487 termios->c_cflag &= ~(HUPCL | CMSPAR); in s3c24xx_serial_set_termios()
1488 termios->c_cflag |= CLOCAL; in s3c24xx_serial_set_termios()
1496 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) in s3c24xx_serial_set_termios()
1497 quot = port->custom_divisor; in s3c24xx_serial_set_termios()
1503 if (ourport->baudclk != clk) { in s3c24xx_serial_set_termios()
1508 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_set_termios()
1509 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_set_termios()
1510 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1513 ourport->baudclk = clk; in s3c24xx_serial_set_termios()
1514 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; in s3c24xx_serial_set_termios()
1517 if (ourport->info->has_divslot) { in s3c24xx_serial_set_termios()
1518 unsigned int div = ourport->baudclk_rate / baud; in s3c24xx_serial_set_termios()
1520 if (cfg->has_fracval) { in s3c24xx_serial_set_termios()
1522 dev_dbg(port->dev, "fracval = %04x\n", udivslot); in s3c24xx_serial_set_termios()
1525 dev_dbg(port->dev, "udivslot = %04x (div %d)\n", in s3c24xx_serial_set_termios()
1530 switch (termios->c_cflag & CSIZE) { in s3c24xx_serial_set_termios()
1532 dev_dbg(port->dev, "config: 5bits/char\n"); in s3c24xx_serial_set_termios()
1536 dev_dbg(port->dev, "config: 6bits/char\n"); in s3c24xx_serial_set_termios()
1540 dev_dbg(port->dev, "config: 7bits/char\n"); in s3c24xx_serial_set_termios()
1545 dev_dbg(port->dev, "config: 8bits/char\n"); in s3c24xx_serial_set_termios()
1551 ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); in s3c24xx_serial_set_termios()
1553 if (termios->c_cflag & CSTOPB) in s3c24xx_serial_set_termios()
1556 if (termios->c_cflag & PARENB) { in s3c24xx_serial_set_termios()
1557 if (termios->c_cflag & PARODD) in s3c24xx_serial_set_termios()
1567 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1574 port->status &= ~UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1577 if (termios->c_cflag & CRTSCTS) { in s3c24xx_serial_set_termios()
1581 port->status = UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1587 if (ourport->info->has_divslot) in s3c24xx_serial_set_termios()
1590 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1591 "uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", in s3c24xx_serial_set_termios()
1597 * Update the per-port timeout. in s3c24xx_serial_set_termios()
1599 uart_update_timeout(port, termios->c_cflag, baud); in s3c24xx_serial_set_termios()
1604 port->read_status_mask = S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1605 if (termios->c_iflag & INPCK) in s3c24xx_serial_set_termios()
1606 port->read_status_mask |= S3C2410_UERSTAT_FRAME | in s3c24xx_serial_set_termios()
1611 port->ignore_status_mask = 0; in s3c24xx_serial_set_termios()
1612 if (termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1613 port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1614 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1615 port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; in s3c24xx_serial_set_termios()
1620 if ((termios->c_cflag & CREAD) == 0) in s3c24xx_serial_set_termios()
1621 port->ignore_status_mask |= RXSTAT_DUMMY_READ; in s3c24xx_serial_set_termios()
1630 switch (ourport->info->type) { in s3c24xx_serial_type()
1645 port->type = info->port_type; in s3c24xx_serial_config_port()
1656 if (ser->type != PORT_UNKNOWN && ser->type != info->port_type) in s3c24xx_serial_verify_port()
1657 return -EINVAL; in s3c24xx_serial_verify_port()
1748 spin_lock_init(&port->lock); in s3c24xx_serial_init_port_default()
1750 port->uartclk = 0; in s3c24xx_serial_init_port_default()
1751 port->fifosize = 16; in s3c24xx_serial_init_port_default()
1752 port->flags = UPF_BOOT_AUTOCONF; in s3c24xx_serial_init_port_default()
1753 port->line = index; in s3c24xx_serial_init_port_default()
1767 ucon &= (info->clksel_mask | info->ucon_mask); in s3c24xx_serial_resetport()
1768 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); in s3c24xx_serial_resetport()
1771 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); in s3c24xx_serial_resetport()
1772 wr_regl(port, S3C2410_UFCON, cfg->ufcon); in s3c24xx_serial_resetport()
1780 struct device *dev = ourport->port.dev; in s3c24xx_serial_enable_baudclk()
1781 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_enable_baudclk()
1787 clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel; in s3c24xx_serial_enable_baudclk()
1788 for (clk_num = 0; clk_num < info->num_clks; clk_num++) { in s3c24xx_serial_enable_baudclk()
1803 ourport->baudclk = clk; in s3c24xx_serial_enable_baudclk()
1804 ourport->baudclk_rate = clk_get_rate(clk); in s3c24xx_serial_enable_baudclk()
1805 s3c24xx_serial_setsource(&ourport->port, clk_num); in s3c24xx_serial_enable_baudclk()
1810 return -EINVAL; in s3c24xx_serial_enable_baudclk()
1821 struct uart_port *port = &ourport->port; in s3c24xx_serial_init_port()
1822 const struct s3c2410_uartcfg *cfg = ourport->cfg; in s3c24xx_serial_init_port()
1827 return -ENODEV; in s3c24xx_serial_init_port()
1829 if (port->mapbase != 0) in s3c24xx_serial_init_port()
1830 return -EINVAL; in s3c24xx_serial_init_port()
1833 port->dev = &platdev->dev; in s3c24xx_serial_init_port()
1835 port->uartclk = 1; in s3c24xx_serial_init_port()
1837 if (cfg->uart_flags & UPF_CONS_FLOW) { in s3c24xx_serial_init_port()
1838 dev_dbg(port->dev, "enabling flow control\n"); in s3c24xx_serial_init_port()
1839 port->flags |= UPF_CONS_FLOW; in s3c24xx_serial_init_port()
1842 /* sort our the physical and virtual addresses for each UART */ in s3c24xx_serial_init_port()
1846 dev_err(port->dev, "failed to find memory resource for uart\n"); in s3c24xx_serial_init_port()
1847 return -EINVAL; in s3c24xx_serial_init_port()
1850 dev_dbg(port->dev, "resource %pR)\n", res); in s3c24xx_serial_init_port()
1852 port->membase = devm_ioremap_resource(port->dev, res); in s3c24xx_serial_init_port()
1853 if (IS_ERR(port->membase)) { in s3c24xx_serial_init_port()
1854 dev_err(port->dev, "failed to remap controller address\n"); in s3c24xx_serial_init_port()
1855 return -EBUSY; in s3c24xx_serial_init_port()
1858 port->mapbase = res->start; in s3c24xx_serial_init_port()
1861 port->irq = 0; in s3c24xx_serial_init_port()
1863 port->irq = ret; in s3c24xx_serial_init_port()
1864 ourport->rx_irq = ret; in s3c24xx_serial_init_port()
1865 ourport->tx_irq = ret + 1; in s3c24xx_serial_init_port()
1872 if (platdev->dev.of_node && of_find_property(platdev->dev.of_node, in s3c24xx_serial_init_port()
1874 ourport->dma = devm_kzalloc(port->dev, in s3c24xx_serial_init_port()
1875 sizeof(*ourport->dma), in s3c24xx_serial_init_port()
1877 if (!ourport->dma) { in s3c24xx_serial_init_port()
1878 ret = -ENOMEM; in s3c24xx_serial_init_port()
1883 ourport->clk = clk_get(&platdev->dev, "uart"); in s3c24xx_serial_init_port()
1884 if (IS_ERR(ourport->clk)) { in s3c24xx_serial_init_port()
1886 dev_name(&platdev->dev)); in s3c24xx_serial_init_port()
1887 ret = PTR_ERR(ourport->clk); in s3c24xx_serial_init_port()
1891 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_init_port()
1893 pr_err("uart: clock failed to prepare+enable: %d\n", ret); in s3c24xx_serial_init_port()
1894 clk_put(ourport->clk); in s3c24xx_serial_init_port()
1900 pr_warn("uart: failed to enable baudclk\n"); in s3c24xx_serial_init_port()
1903 switch (ourport->info->type) { in s3c24xx_serial_init_port()
1925 dev_dbg(port->dev, "port: map=%pa, mem=%p, irq=%d (%d,%d), clock=%u\n", in s3c24xx_serial_init_port()
1926 &port->mapbase, port->membase, port->irq, in s3c24xx_serial_init_port()
1927 ourport->rx_irq, ourport->tx_irq, port->uartclk); in s3c24xx_serial_init_port()
1929 /* reset the fifos (and setup the uart) */ in s3c24xx_serial_init_port()
1935 port->mapbase = 0; in s3c24xx_serial_init_port()
1946 if (dev_of_node(&pdev->dev)) in s3c24xx_get_driver_data()
1947 return of_device_get_match_data(&pdev->dev); in s3c24xx_get_driver_data()
1950 platform_get_device_id(pdev)->driver_data; in s3c24xx_get_driver_data()
1955 struct device_node *np = pdev->dev.of_node; in s3c24xx_serial_probe()
1967 dev_err(&pdev->dev, "serial%d out of range\n", index); in s3c24xx_serial_probe()
1968 return -EINVAL; in s3c24xx_serial_probe()
1974 ourport->drv_data = s3c24xx_get_driver_data(pdev); in s3c24xx_serial_probe()
1975 if (!ourport->drv_data) { in s3c24xx_serial_probe()
1976 dev_err(&pdev->dev, "could not find driver data\n"); in s3c24xx_serial_probe()
1977 return -ENODEV; in s3c24xx_serial_probe()
1980 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_probe()
1981 ourport->info = &ourport->drv_data->info; in s3c24xx_serial_probe()
1982 ourport->cfg = (dev_get_platdata(&pdev->dev)) ? in s3c24xx_serial_probe()
1983 dev_get_platdata(&pdev->dev) : in s3c24xx_serial_probe()
1984 &ourport->drv_data->def_cfg; in s3c24xx_serial_probe()
1986 switch (ourport->info->type) { in s3c24xx_serial_probe()
1988 ourport->port.ops = &s3c64xx_serial_ops; in s3c24xx_serial_probe()
1991 ourport->port.ops = &apple_s5l_serial_ops; in s3c24xx_serial_probe()
1995 ourport->port.iotype = ourport->info->iotype; in s3c24xx_serial_probe()
1998 fifosize_prop = of_property_read_u32(np, "samsung,uart-fifosize", in s3c24xx_serial_probe()
1999 &ourport->port.fifosize); in s3c24xx_serial_probe()
2001 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { in s3c24xx_serial_probe()
2004 ourport->port.iotype = UPIO_MEM; in s3c24xx_serial_probe()
2007 ourport->port.iotype = UPIO_MEM32; in s3c24xx_serial_probe()
2010 dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", in s3c24xx_serial_probe()
2012 return -EINVAL; in s3c24xx_serial_probe()
2018 if (ourport->drv_data->fifosize[index]) in s3c24xx_serial_probe()
2019 ourport->port.fifosize = ourport->drv_data->fifosize[index]; in s3c24xx_serial_probe()
2020 else if (ourport->info->fifosize) in s3c24xx_serial_probe()
2021 ourport->port.fifosize = ourport->info->fifosize; in s3c24xx_serial_probe()
2024 ourport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SAMSUNG_CONSOLE); in s3c24xx_serial_probe()
2030 ourport->min_dma_size = max_t(int, ourport->port.fifosize, in s3c24xx_serial_probe()
2033 dev_dbg(&pdev->dev, "%s: initialising port %p...\n", __func__, ourport); in s3c24xx_serial_probe()
2042 pr_err("Failed to register Samsung UART driver\n"); in s3c24xx_serial_probe()
2047 dev_dbg(&pdev->dev, "%s: adding port\n", __func__); in s3c24xx_serial_probe()
2048 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); in s3c24xx_serial_probe()
2049 platform_set_drvdata(pdev, &ourport->port); in s3c24xx_serial_probe()
2053 * so that a potential re-enablement through the pm-callback overlaps in s3c24xx_serial_probe()
2056 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_probe()
2057 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_probe()
2058 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_probe()
2067 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); in s3c24xx_serial_remove()
2075 /* UART power management code */
2093 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume()
2094 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2095 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume()
2097 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2098 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume()
2099 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume()
2114 switch (ourport->info->type) { in s3c24xx_serial_resume_noirq()
2118 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2120 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2122 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2123 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2124 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2126 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2127 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2128 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2135 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2140 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_resume_noirq()
2141 ret = clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2144 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2156 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2158 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2165 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2166 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2167 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2202 /* fifo mode - check amount of data in fifo registers... */ in s3c24xx_serial_console_txrdy()
2205 return !(ufstat & info->tx_fifofull); in s3c24xx_serial_console_txrdy()
2208 /* in non-fifo mode, we go and use the tx buffer empty */ in s3c24xx_serial_console_txrdy()
2223 * Console polling routines for writing and reading from the uart while
2278 if (cons_uart->sysrq) in s3c24xx_serial_console_write()
2342 clk = clk_get(port->dev, clk_name); in s3c24xx_serial_get_options()
2349 dev_dbg(port->dev, "calculated baud %d\n", *baud); in s3c24xx_serial_get_options()
2365 if (co->index == -1 || co->index >= UART_NR) in s3c24xx_serial_console_setup()
2366 co->index = 0; in s3c24xx_serial_console_setup()
2368 port = &s3c24xx_serial_ports[co->index].port; in s3c24xx_serial_console_setup()
2372 if (port->mapbase == 0x0) in s3c24xx_serial_console_setup()
2373 return -ENODEV; in s3c24xx_serial_console_setup()
2378 * Check whether an invalid uart number has been specified, and in s3c24xx_serial_console_setup()
2387 dev_dbg(port->dev, "baud %d\n", baud); in s3c24xx_serial_console_setup()
2396 .index = -1,
2406 .name = "Samsung S3C6400 UART",
2436 .name = "Samsung S5PV210 UART",
2466 .name = "Samsung Exynos UART", \
2505 /* samsung,uart-fifosize must be specified in the device tree. */
2511 .name = "Google GS101 UART",
2532 /* samsung,uart-fifosize must be specified in the device tree. */
2553 .name = "Apple S5L UART",
2583 .name = "Axis ARTPEC-8 UART",
2613 .name = "s3c6400-uart",
2616 .name = "s5pv210-uart",
2619 .name = "exynos4210-uart",
2622 .name = "exynos5433-uart",
2625 .name = "s5l-uart",
2628 .name = "exynos850-uart",
2631 .name = "artpec8-uart",
2634 .name = "gs101-uart",
2637 .name = "exynos8895-uart",
2646 { .compatible = "samsung,s3c6400-uart",
2648 { .compatible = "samsung,s5pv210-uart",
2650 { .compatible = "samsung,exynos4210-uart",
2652 { .compatible = "samsung,exynos5433-uart",
2654 { .compatible = "apple,s5l-uart",
2656 { .compatible = "samsung,exynos850-uart",
2658 { .compatible = "axis,artpec8-uart",
2660 { .compatible = "google,gs101-uart",
2662 { .compatible = "samsung,exynos8895-uart",
2674 .name = "samsung-uart",
2711 switch (port->iotype) { in wr_reg_barrier()
2730 while (!(readl(port->membase + S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE)) in samsung_early_busyuart()
2736 const struct samsung_early_console_data *data = port->private_data; in samsung_early_busyuart_fifo()
2738 while (readl(port->membase + S3C2410_UFSTAT) & data->txfull_mask) in samsung_early_busyuart_fifo()
2744 if (readl(port->membase + S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) in samsung_early_putc()
2755 struct earlycon_device *dev = con->data; in samsung_early_write()
2757 uart_console_write(&dev->port, s, n, samsung_early_putc); in samsung_early_write()
2762 struct earlycon_device *dev = con->data; in samsung_early_read()
2763 const struct samsung_early_console_data *data = dev->port.private_data; in samsung_early_read()
2768 ufstat = rd_regl(&dev->port, S3C2410_UFSTAT); in samsung_early_read()
2769 if (!(ufstat & data->rxfifo_mask)) in samsung_early_read()
2771 ch = rd_reg(&dev->port, S3C2410_URXH); in samsung_early_read()
2784 if (!device->port.membase) in samsung_early_console_setup()
2785 return -ENODEV; in samsung_early_console_setup()
2787 device->con->write = samsung_early_write; in samsung_early_console_setup()
2788 device->con->read = samsung_early_read; in samsung_early_console_setup()
2807 device->port.private_data = &s3c2440_early_console_data; in s3c2440_early_console_setup()
2811 OF_EARLYCON_DECLARE(s3c6400, "samsung,s3c6400-uart",
2823 device->port.private_data = &s5pv210_early_console_data; in s5pv210_early_console_setup()
2827 OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart",
2829 OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart",
2831 OF_EARLYCON_DECLARE(artpec8, "axis,artpec8-uart",
2837 /* gs101 always expects MMIO32 register accesses. */ in gs101_early_console_setup()
2838 device->port.iotype = UPIO_MEM32; in gs101_early_console_setup()
2843 OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
2849 /* Apple A7-A11 requires MMIO32 register accesses. */ in apple_s5l_early_console_setup()
2850 device->port.iotype = UPIO_MEM32; in apple_s5l_early_console_setup()
2853 device->port.private_data = &s3c2410_early_console_data; in apple_s5l_early_console_setup()
2857 __set_fixmap(FIX_EARLYCON_MEM_BASE, device->port.mapbase, in apple_s5l_early_console_setup()
2863 OF_EARLYCON_DECLARE(s5l, "apple,s5l-uart", apple_s5l_early_console_setup);
2866 MODULE_ALIAS("platform:samsung-uart");