1 // SPDX-License-Identifier: GPL-2.0
28 #define CSR	0x48  macro
58 #define CCR1_SHARPS		BIT(20)	/* Half -duplex Communication Select */
76 /* CSR (Common Status Register) */
90 #define SCxSR_ERRORS(port)	(to_sci_port(port)->params->error_mask)
91 #define SCxSR_ERROR_CLEAR(port)	(to_sci_port(port)->params->error_clear)
124 static u32 rsci_serial_in(struct uart_port *p, int offset)  in rsci_serial_in()  argument
126 	return readl(p->membase + offset);  in rsci_serial_in()
129 static void rsci_serial_out(struct uart_port *p, int offset, int value)  in rsci_serial_out()  argument
131 	writel(value, p->membase + offset);  in rsci_serial_out()
164 	if (termios->c_cflag & CREAD)  in rsci_set_termios()
185 	unsigned int status = rsci_serial_in(port, CSR);  in rsci_tx_empty()
212 	if (sp->chan_tx)  in rsci_start_tx()
245 	return port->fifosize - rsci_txfill(port);  in rsci_txroom()
251 	struct tty_port *tport = &port->state->port;  in rsci_transmit_chars()
255 	status = rsci_serial_in(port, CSR);  in rsci_transmit_chars()
258 		if (kfifo_is_empty(&tport->xmit_fifo))  in rsci_transmit_chars()
271 		if (port->x_char) {  in rsci_transmit_chars()
272 			c = port->x_char;  in rsci_transmit_chars()
273 			port->x_char = 0;  in rsci_transmit_chars()
274 		} else if (stopped || !kfifo_get(&tport->xmit_fifo, &c)) {  in rsci_transmit_chars()
281 		port->icount.tx++;  in rsci_transmit_chars()
282 	} while (--count > 0);  in rsci_transmit_chars()
284 	if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)  in rsci_transmit_chars()
287 	if (kfifo_is_empty(&tport->xmit_fifo)) {  in rsci_transmit_chars()
297 	struct tty_port *tport = &port->state->port;  in rsci_receive_chars()
302 	status = rsci_serial_in(port, CSR);  in rsci_receive_chars()
320 			/* 9-bits data is not supported yet */  in rsci_receive_chars()
324 				count--;  in rsci_receive_chars()
325 				i--;  in rsci_receive_chars()
334 				port->icount.frame++;  in rsci_receive_chars()
337 				port->icount.parity++;  in rsci_receive_chars()
345 		rsci_serial_in(port, CSR); /* dummy read */  in rsci_receive_chars()
349 		port->icount.rx += count;  in rsci_receive_chars()
358 		rsci_serial_in(port, CSR); /* dummy read */  in rsci_receive_chars()
368 	ret = readl_relaxed_poll_timeout_atomic(port->membase + CSR, status,  in rsci_poll_put_char()
372 		dev_err(port->dev,  in rsci_poll_put_char()
385 		s->params->param_bits->rxtx_enable | CCR0_TIE |  in rsci_prepare_console_write()
386 		s->hscif_tot;  in rsci_prepare_console_write()
409 	.status = CSR,
421 	.overrun_reg = CSR,
475 OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g077-rsci", rsci_early_console_setup);