194 	writel(rfr, uport->membase + SE_UART_MANUAL_RFR);  in qcom_geni_set_rs485_mode()
202 	uport->membase = devm_platform_ioremap_resource(pdev, 0);  in qcom_geni_serial_request_port()
203 	if (IS_ERR(uport->membase))  in qcom_geni_serial_request_port()
204 		return PTR_ERR(uport->membase);  in qcom_geni_serial_request_port()
205 	port->se.base = uport->membase;  in qcom_geni_serial_request_port()
225 		geni_ios = readl(uport->membase + SE_GENI_IOS);  in qcom_geni_serial_get_mctrl()
247 	writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR);  in qcom_geni_serial_set_mctrl()
292 	return readl(uport->membase + SE_GENI_STATUS) & M_GENI_CMD_ACTIVE;  in qcom_geni_serial_main_active()
297 	return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE;  in qcom_geni_serial_secondary_active()
320 		reg = readl(uport->membase + offset);  in qcom_geni_serial_poll_bitfield()
339 	writel(xmit_size, uport->membase + SE_UART_TX_TRANS_LEN);  in qcom_geni_serial_setup_tx()
341 	writel(m_cmd, uport->membase + SE_GENI_M_CMD0);  in qcom_geni_serial_setup_tx()
351 		writel(M_GENI_CMD_ABORT, uport->membase +  in qcom_geni_serial_poll_tx_done()
355 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_poll_tx_done()
363 	writel(S_GENI_CMD_ABORT, uport->membase + SE_GENI_S_CMD_CTRL_REG);  in qcom_geni_serial_abort_rx()
366 	writel(irq_clear, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_abort_rx()
367 	writel(FORCE_DEFAULT, uport->membase + GENI_FORCE_DEFAULT_REG);  in qcom_geni_serial_abort_rx()
379 		status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);  in qcom_geni_serial_get_char()
380 		writel(status, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_get_char()
382 		status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_get_char()
383 		writel(status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_get_char()
385 		status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS);  in qcom_geni_serial_get_char()
403 			readl(uport->membase + SE_GENI_RX_FIFOn);  in qcom_geni_serial_get_char()
421 	writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_poll_put_char()
423 	writel(c, uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_poll_put_char()
464 		       uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_wr_char()
487 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);  in __qcom_geni_serial_console_write()
488 	writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_console_write()
506 		writel(M_TX_FIFO_WATERMARK_EN, uport->membase +  in __qcom_geni_serial_console_write()
515 		       uport->membase + SE_GENI_TX_FIFOn);  in __qcom_geni_serial_console_write()
543 	m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
544 	s_irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
545 	writel(0, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
546 	writel(0, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
560 	writel(m_irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
561 	writel(s_irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
579 		ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, buf, 1);  in handle_rx_console()
627 	return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS);  in qcom_geni_serial_tx_empty()
655 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_stop_tx_dma()
658 	writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_stop_tx_dma()
706 			writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_start_tx_fifo()
708 			writel(c, uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_start_tx_fifo()
712 	irq_en = readl(uport->membase +	SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_tx_fifo()
714 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);  in qcom_geni_serial_start_tx_fifo()
715 	writel(irq_en, uport->membase +	SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_tx_fifo()
722 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_tx_fifo()
724 	writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG);  in qcom_geni_serial_stop_tx_fifo()
725 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_tx_fifo()
738 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_cancel_tx_cmd()
740 	writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_cancel_tx_cmd()
764 	status = readl(uport->membase +	SE_GENI_RX_FIFO_STATUS);  in qcom_geni_serial_handle_rx_fifo()
786 	irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
788 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
790 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
792 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
804 	s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_stop_rx_fifo()
808 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_stop_rx_fifo()
824 	irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
826 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
828 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
830 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
846 				uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_stop_rx_dma()
850 		writel(1, uport->membase + SE_DMA_RX_FSM_RST);  in qcom_geni_serial_stop_rx_dma()
854 				uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_stop_rx_dma()
898 	rx_in = readl(uport->membase + SE_DMA_RX_LEN_IN);  in qcom_geni_serial_handle_rx_dma()
944 		iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);  in qcom_geni_serial_send_chunk_fifo()
962 	status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);  in qcom_geni_serial_handle_tx_fifo()
992 		irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
995 					uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
1007 			uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_handle_tx_fifo()
1011 		irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
1014 					uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
1057 	m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);  in qcom_geni_serial_isr()
1058 	s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_isr()
1059 	dma_tx_status = readl(uport->membase + SE_DMA_TX_IRQ_STAT);  in qcom_geni_serial_isr()
1060 	dma_rx_status = readl(uport->membase + SE_DMA_RX_IRQ_STAT);  in qcom_geni_serial_isr()
1061 	geni_status = readl(uport->membase + SE_GENI_STATUS);  in qcom_geni_serial_isr()
1062 	dma = readl(uport->membase + SE_GENI_DMA_MODE_EN);  in qcom_geni_serial_isr()
1063 	m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_isr()
1064 	writel(m_irq_status, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_isr()
1065 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_isr()
1066 	writel(dma_tx_status, uport->membase + SE_DMA_TX_IRQ_CLR);  in qcom_geni_serial_isr()
1067 	writel(dma_rx_status, uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_isr()
1196 	writel(rxstale, uport->membase + SE_UART_RX_STALE_CNT);  in qcom_geni_serial_port_setup()
1198 	pin_swap = readl(uport->membase + SE_UART_IO_MACRO_CTRL);  in qcom_geni_serial_port_setup()
1209 		writel(pin_swap, uport->membase + SE_UART_IO_MACRO_CTRL);  in qcom_geni_serial_port_setup()
1295 	writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG);  in geni_serial_set_rate()
1296 	writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG);  in geni_serial_set_rate()
1298 	writel(clk_idx & CLK_SEL_MSK, uport->membase + SE_GENI_CLK_SEL);  in geni_serial_set_rate()
1325 	tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1326 	tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1327 	rx_trans_cfg = readl(uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1328 	rx_parity_cfg = readl(uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1383 				uport->membase + SE_UART_LOOPBACK_CFG);  in qcom_geni_serial_set_termios()
1384 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1385 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1386 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1387 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1388 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);  in qcom_geni_serial_set_termios()
1389 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);  in qcom_geni_serial_set_termios()
1390 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);  in qcom_geni_serial_set_termios()
1415 	if (unlikely(!uport->membase))  in qcom_geni_console_setup()
1482 	if (!uport->membase)  in qcom_geni_serial_earlycon_setup()
1488 	se.base = uport->membase;  in qcom_geni_serial_earlycon_setup()
1509 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_earlycon_setup()
1510 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_earlycon_setup()
1511 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_earlycon_setup()
1512 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_earlycon_setup()
1513 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);  in qcom_geni_serial_earlycon_setup()
1514 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);  in qcom_geni_serial_earlycon_setup()
1515 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);  in qcom_geni_serial_earlycon_setup()