Lines Matching refs:membase
208 void __iomem *membase; member
312 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER)); in port_show_regs()
314 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR)); in port_show_regs()
316 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR)); in port_show_regs()
318 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR)); in port_show_regs()
320 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR)); in port_show_regs()
322 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR)); in port_show_regs()
325 ioread8(priv->membase + PCH_UART_BRCSR)); in port_show_regs()
327 lcr = ioread8(priv->membase + UART_LCR); in port_show_regs()
328 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in port_show_regs()
330 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL)); in port_show_regs()
332 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM)); in port_show_regs()
333 iowrite8(lcr, priv->membase + UART_LCR); in port_show_regs()
414 u8 ier = ioread8(priv->membase + UART_IER); in pch_uart_hal_enable_interrupt()
416 iowrite8(ier, priv->membase + UART_IER); in pch_uart_hal_enable_interrupt()
422 u8 ier = ioread8(priv->membase + UART_IER); in pch_uart_hal_disable_interrupt()
424 iowrite8(ier, priv->membase + UART_IER); in pch_uart_hal_disable_interrupt()
464 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in pch_uart_hal_set_line()
465 iowrite8(dll, priv->membase + PCH_UART_DLL); in pch_uart_hal_set_line()
466 iowrite8(dlm, priv->membase + PCH_UART_DLM); in pch_uart_hal_set_line()
467 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_line()
481 iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
483 priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
484 iowrite8(priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
533 iowrite8(PCH_UART_FCR_FIFOE, priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
535 priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
536 iowrite8(fcr, priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
544 unsigned int msr = ioread8(priv->membase + UART_MSR); in pch_uart_hal_get_modem()
556 lsr = ioread8(priv->membase + UART_LSR); in pch_uart_hal_read()
557 for (i = 0, lsr = ioread8(priv->membase + UART_LSR); in pch_uart_hal_read()
559 lsr = ioread8(priv->membase + UART_LSR)) { in pch_uart_hal_read()
560 rbr = ioread8(priv->membase + PCH_UART_RBR); in pch_uart_hal_read()
577 return ioread8(priv->membase + UART_IIR) &\ in pch_uart_hal_get_iid()
583 return ioread8(priv->membase + UART_LSR); in pch_uart_hal_get_line_status()
590 lcr = ioread8(priv->membase + UART_LCR); in pch_uart_hal_set_break()
596 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_break()
826 iowrite8(port->x_char, priv->membase + PCH_UART_THR); in handle_tx()
835 iowrite8(ch, priv->membase + PCH_UART_THR); in handle_tx()
883 iowrite8(port->x_char, priv->membase + PCH_UART_THR); in dma_handle_tx()
1130 iowrite8(mcr, priv->membase + UART_MCR); in pch_uart_set_mctrl()
1361 pci_iounmap(priv->pdev, priv->membase); in pch_uart_release_port()
1369 void __iomem *membase; in pch_uart_request_port() local
1376 membase = pci_iomap(priv->pdev, 1, 0); in pch_uart_request_port()
1377 if (!membase) { in pch_uart_request_port()
1381 priv->membase = port->membase = membase; in pch_uart_request_port()
1437 status = ioread8(up->membase + UART_LSR); in wait_for_xmitr()
1450 unsigned int msr = ioread8(up->membase + UART_MSR); in wait_for_xmitr()
1469 u8 lsr = ioread8(priv->membase + UART_LSR); in pch_uart_get_poll_char()
1474 return ioread8(priv->membase + PCH_UART_RBR); in pch_uart_get_poll_char()
1488 ier = ioread8(priv->membase + UART_IER); in pch_uart_put_poll_char()
1495 iowrite8(c, priv->membase + PCH_UART_THR); in pch_uart_put_poll_char()
1502 iowrite8(ier, priv->membase + UART_IER); in pch_uart_put_poll_char()
1537 iowrite8(ch, priv->membase + PCH_UART_THR); in pch_console_putchar()
1566 ier = ioread8(priv->membase + UART_IER); in pch_console_write()
1577 iowrite8(ier, priv->membase + UART_IER); in pch_console_write()
1600 if (!port || (!port->iobase && !port->membase)) in pch_console_setup()
1691 priv->port.membase = NULL; in pch_uart_init_port()