761 #define FIFO_5125(port) ((struct mpc512x_psc_fifo __iomem *)(PSC_5125(port)+1))  macro
768 	out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);  in mpc5125_psc_fifo_init()
769 	out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);  in mpc5125_psc_fifo_init()
770 	out_be32(&FIFO_5125(port)->txalarm, 1);  in mpc5125_psc_fifo_init()
771 	out_be32(&FIFO_5125(port)->tximr, 0);  in mpc5125_psc_fifo_init()
773 	out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);  in mpc5125_psc_fifo_init()
774 	out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);  in mpc5125_psc_fifo_init()
775 	out_be32(&FIFO_5125(port)->rxalarm, 1);  in mpc5125_psc_fifo_init()
776 	out_be32(&FIFO_5125(port)->rximr, 0);  in mpc5125_psc_fifo_init()
778 	out_be32(&FIFO_5125(port)->tximr, MPC512x_PSC_FIFO_ALARM);  in mpc5125_psc_fifo_init()
779 	out_be32(&FIFO_5125(port)->rximr, MPC512x_PSC_FIFO_ALARM);  in mpc5125_psc_fifo_init()
784 	return !(in_be32(&FIFO_5125(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);  in mpc5125_psc_raw_rx_rdy()
789 	return !(in_be32(&FIFO_5125(port)->txsr) & MPC512x_PSC_FIFO_FULL);  in mpc5125_psc_raw_tx_rdy()
794 	return in_be32(&FIFO_5125(port)->rxsr) &  in mpc5125_psc_rx_rdy()
795 	       in_be32(&FIFO_5125(port)->rximr) & MPC512x_PSC_FIFO_ALARM;  in mpc5125_psc_rx_rdy()
800 	return in_be32(&FIFO_5125(port)->txsr) &  in mpc5125_psc_tx_rdy()
801 	       in_be32(&FIFO_5125(port)->tximr) & MPC512x_PSC_FIFO_ALARM;  in mpc5125_psc_tx_rdy()
806 	return in_be32(&FIFO_5125(port)->txsr) & MPC512x_PSC_FIFO_EMPTY;  in mpc5125_psc_tx_empty()
813 	rx_fifo_imr = in_be32(&FIFO_5125(port)->rximr);  in mpc5125_psc_stop_rx()
815 	out_be32(&FIFO_5125(port)->rximr, rx_fifo_imr);  in mpc5125_psc_stop_rx()
822 	tx_fifo_imr = in_be32(&FIFO_5125(port)->tximr);  in mpc5125_psc_start_tx()
824 	out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);  in mpc5125_psc_start_tx()
831 	tx_fifo_imr = in_be32(&FIFO_5125(port)->tximr);  in mpc5125_psc_stop_tx()
833 	out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);  in mpc5125_psc_stop_tx()
838 	out_be32(&FIFO_5125(port)->rxisr, in_be32(&FIFO_5125(port)->rxisr));  in mpc5125_psc_rx_clr_irq()
843 	out_be32(&FIFO_5125(port)->txisr, in_be32(&FIFO_5125(port)->txisr));  in mpc5125_psc_tx_clr_irq()
848 	out_8(&FIFO_5125(port)->txdata_8, c);  in mpc5125_psc_write_char()
853 	return in_8(&FIFO_5125(port)->rxdata_8);  in mpc5125_psc_read_char()
859 		in_be32(&FIFO_5125(port)->tximr) << 16 |  in mpc5125_psc_cw_disable_ints()
860 		in_be32(&FIFO_5125(port)->rximr);  in mpc5125_psc_cw_disable_ints()
861 	out_be32(&FIFO_5125(port)->tximr, 0);  in mpc5125_psc_cw_disable_ints()
862 	out_be32(&FIFO_5125(port)->rximr, 0);  in mpc5125_psc_cw_disable_ints()
867 	out_be32(&FIFO_5125(port)->tximr,  in mpc5125_psc_cw_restore_ints()
869 	out_be32(&FIFO_5125(port)->rximr, port->read_status_mask & 0x7f);  in mpc5125_psc_cw_restore_ints()