Lines Matching +full:lpc3220 +full:- +full:hsuart
1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/soc/nxp/lpc32xx-misc.h>
103 port->membase))) == 0) in wait_for_xmit_empty()
105 if (--timeout == 0) in wait_for_xmit_empty()
117 port->membase))) < 32) in wait_for_xmit_ready()
119 if (--timeout == 0) in wait_for_xmit_ready()
128 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase)); in lpc32xx_hsuart_console_putchar()
134 struct lpc32xx_hsuart_port *up = &lpc32xx_hs_ports[co->index]; in lpc32xx_hsuart_console_write()
140 locked = uart_port_trylock_irqsave(&up->port, &flags); in lpc32xx_hsuart_console_write()
142 uart_port_lock_irqsave(&up->port, &flags); in lpc32xx_hsuart_console_write()
144 uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar); in lpc32xx_hsuart_console_write()
145 wait_for_xmit_empty(&up->port); in lpc32xx_hsuart_console_write()
148 uart_port_unlock_irqrestore(&up->port, flags); in lpc32xx_hsuart_console_write()
160 if (co->index >= MAX_PORTS) in lpc32xx_hsuart_console_setup()
161 co->index = 0; in lpc32xx_hsuart_console_setup()
163 port = &lpc32xx_hs_ports[co->index].port; in lpc32xx_hsuart_console_setup()
164 if (!port->membase) in lpc32xx_hsuart_console_setup()
165 return -ENODEV; in lpc32xx_hsuart_console_setup()
170 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in lpc32xx_hsuart_console_setup()
182 .index = -1,
215 goodrate = hsu_rate = (div / 14) - 1; in __serial_get_clock_div()
217 hsu_rate--; in __serial_get_clock_div()
225 if (abs(comprate - rate) < rate_diff) { in __serial_get_clock_div()
227 rate_diff = abs(comprate - rate); in __serial_get_clock_div()
240 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) && in __serial_uart_flush()
242 readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
247 struct tty_port *tport = &port->state->port; in __serial_lpc32xx_rx()
251 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
254 port->icount.rx++; in __serial_lpc32xx_rx()
259 LPC32XX_HSUART_IIR(port->membase)); in __serial_lpc32xx_rx()
260 port->icount.frame++; in __serial_lpc32xx_rx()
268 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
276 u32 level = readl(LPC32XX_HSUART_LEVEL(port->membase)); in serial_lpc32xx_tx_ready()
287 writel(ch, LPC32XX_HSUART_FIFO(port->membase))); in __serial_lpc32xx_tx()
293 struct tty_port *tport = &port->state->port; in serial_lpc32xx_interrupt()
299 status = readl(LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
303 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
304 port->icount.brk++; in serial_lpc32xx_interrupt()
310 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
315 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
316 port->icount.overrun++; in serial_lpc32xx_interrupt()
327 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
336 /* port->lock is not held. */
341 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0) in serial_lpc32xx_tx_empty()
347 /* port->lock held by caller. */
354 /* port->lock is held by caller and interrupts are disabled. */
361 /* port->lock held by caller. */
366 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
368 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
371 /* port->lock held by caller. */
377 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
379 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
382 /* port->lock held by caller. */
387 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
389 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
392 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_stop_rx()
395 /* port->lock is not held. */
403 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
408 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
412 /* port->lock is not held. */
425 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
427 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_startup()
435 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
437 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in serial_lpc32xx_startup()
441 retval = request_irq(port->irq, serial_lpc32xx_interrupt, in serial_lpc32xx_startup()
445 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
450 /* port->lock is not held. */
460 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_shutdown()
462 lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */ in serial_lpc32xx_shutdown()
466 free_irq(port->irq, port); in serial_lpc32xx_shutdown()
469 /* port->lock is not held. */
478 /* Always 8-bit, no parity, 1 stop bit */ in serial_lpc32xx_set_termios()
479 termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD); in serial_lpc32xx_set_termios()
480 termios->c_cflag |= CS8; in serial_lpc32xx_set_termios()
482 termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); in serial_lpc32xx_set_termios()
485 port->uartclk / 14); in serial_lpc32xx_set_termios()
487 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
492 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
493 if ((termios->c_cflag & CREAD) == 0) in serial_lpc32xx_set_termios()
497 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
499 writel(quot, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_set_termios()
501 uart_update_timeout(port, termios->c_cflag, baud); in serial_lpc32xx_set_termios()
517 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_release_port()
518 if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_release_port()
519 iounmap(port->membase); in serial_lpc32xx_release_port()
520 port->membase = NULL; in serial_lpc32xx_release_port()
523 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_release_port()
529 int ret = -ENODEV; in serial_lpc32xx_request_port()
531 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_request_port()
534 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) in serial_lpc32xx_request_port()
535 ret = -EBUSY; in serial_lpc32xx_request_port()
536 else if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_request_port()
537 port->membase = ioremap(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
538 if (!port->membase) { in serial_lpc32xx_request_port()
539 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
540 ret = -ENOMEM; in serial_lpc32xx_request_port()
555 port->type = PORT_UART00; in serial_lpc32xx_config_port()
556 port->fifosize = 64; in serial_lpc32xx_config_port()
562 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
564 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_config_port()
570 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_config_port()
578 if (ser->type != PORT_UART00) in serial_lpc32xx_verify_port()
579 ret = -EINVAL; in serial_lpc32xx_verify_port()
612 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
615 return -ENXIO; in serial_hs_lpc32xx_probe()
622 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
625 return -ENXIO; in serial_hs_lpc32xx_probe()
627 p->port.mapbase = res->start; in serial_hs_lpc32xx_probe()
628 p->port.membase = NULL; in serial_hs_lpc32xx_probe()
633 p->port.irq = ret; in serial_hs_lpc32xx_probe()
635 p->port.iotype = UPIO_MEM32; in serial_hs_lpc32xx_probe()
636 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
637 p->port.regshift = 2; in serial_hs_lpc32xx_probe()
638 p->port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; in serial_hs_lpc32xx_probe()
639 p->port.dev = &pdev->dev; in serial_hs_lpc32xx_probe()
640 p->port.ops = &serial_lpc32xx_pops; in serial_hs_lpc32xx_probe()
641 p->port.line = uarts_registered++; in serial_hs_lpc32xx_probe()
642 spin_lock_init(&p->port.lock); in serial_hs_lpc32xx_probe()
645 lpc32xx_loopback_set(p->port.mapbase, 1); in serial_hs_lpc32xx_probe()
647 ret = uart_add_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_probe()
661 uart_remove_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_remove()
671 uart_suspend_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_suspend()
680 uart_resume_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_resume()
690 { .compatible = "nxp,lpc3220-hsuart" },