1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright 2012-2016 Freescale Semiconductor, Inc.
6  * Copyright 2017-2019 NXP
20 /* All registers are 32-bit width */
115 #define DRIVER_NAME	"fsl-linflexuart"
125 		.compatible = "fsl,s32v234-linflexuart",
147 	ier = readl(port->membase + LINIER);  in linflex_stop_tx()
149 	writel(ier, port->membase + LINIER);  in linflex_stop_tx()
156 	ier = readl(port->membase + LINIER);  in linflex_stop_rx()
157 	writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER);  in linflex_stop_rx()
164 	writeb(c, sport->membase + BDRL);  in linflex_put_char()
167 	while (((status = readl(sport->membase + UARTSR)) &  in linflex_put_char()
172 	writel(status | LINFLEXD_UARTSR_DTFTFF, sport->membase + UARTSR);  in linflex_put_char()
177 	struct tty_port *tport = &sport->state->port;  in linflex_transmit_buffer()
182 		sport->icount.tx++;  in linflex_transmit_buffer()
185 	if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)  in linflex_transmit_buffer()
188 	if (kfifo_is_empty(&tport->xmit_fifo))  in linflex_transmit_buffer()
197 	ier = readl(port->membase + LINIER);  in linflex_start_tx()
198 	writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER);  in linflex_start_tx()
204 	struct tty_port *tport = &sport->state->port;  in linflex_txint()
209 	if (sport->x_char) {  in linflex_txint()
210 		linflex_put_char(sport, sport->x_char);  in linflex_txint()
214 	if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(sport)) {  in linflex_txint()
229 	struct tty_port *port = &sport->state->port;  in linflex_rxint()
236 	status = readl(sport->membase + UARTSR);  in linflex_rxint()
238 		rx = readb(sport->membase + BDRM);  in linflex_rxint()
241 		sport->icount.rx++;  in linflex_rxint()
246 				sport->icount.overrun++;  in linflex_rxint()
250 					sport->icount.brk++;  in linflex_rxint()
252 					sport->icount.frame++;  in linflex_rxint()
255 				sport->icount.parity++;  in linflex_rxint()
258 		writel(status, sport->membase + UARTSR);  in linflex_rxint()
259 		status = readl(sport->membase + UARTSR);  in linflex_rxint()
282 	status = readl(sport->membase + UARTSR);  in linflex_int()
297 	status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;  in linflex_tx_empty()
320 	ier = readl(sport->membase + LINIER);  in linflex_setup_watermark()
322 	writel(ier, sport->membase + LINIER);  in linflex_setup_watermark()
324 	cr = readl(sport->membase + UARTCR);  in linflex_setup_watermark()
326 	writel(cr, sport->membase + UARTCR);  in linflex_setup_watermark()
330 	/* set the Linflex in master mode and activate by-pass filter */  in linflex_setup_watermark()
333 	writel(cr1, sport->membase + LINCR1);  in linflex_setup_watermark()
336 	while ((readl(sport->membase + LINSR)  in linflex_setup_watermark()
342 	 *	UART = 0x1;		- Linflex working in UART mode  in linflex_setup_watermark()
343 	 *	TXEN = 0x1;		- Enable transmission of data now  in linflex_setup_watermark()
344 	 *	RXEn = 0x1;		- Receiver enabled  in linflex_setup_watermark()
345 	 *	WL0 = 0x1;		- 8 bit data  in linflex_setup_watermark()
346 	 *	PCE = 0x0;		- No parity  in linflex_setup_watermark()
350 	writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR);  in linflex_setup_watermark()
355 	writel(cr, sport->membase + UARTCR);  in linflex_setup_watermark()
359 	writel(cr1, sport->membase + LINCR1);  in linflex_setup_watermark()
361 	ier = readl(sport->membase + LINIER);  in linflex_setup_watermark()
365 	writel(ier, sport->membase + LINIER);  in linflex_setup_watermark()
379 	ret = devm_request_irq(port->dev, port->irq, linflex_int, 0,  in linflex_startup()
393 	ier = readl(port->membase + LINIER);  in linflex_shutdown()
395 	writel(ier, port->membase + LINIER);  in linflex_shutdown()
399 	devm_free_irq(port->dev, port->irq, port);  in linflex_shutdown()
408 	unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;  in linflex_set_termios()
410 	cr = readl(port->membase + UARTCR);  in linflex_set_termios()
414 	cr1 = readl(port->membase + LINCR1);  in linflex_set_termios()
416 	writel(cr1, port->membase + LINCR1);  in linflex_set_termios()
419 	while ((readl(port->membase + LINSR)  in linflex_set_termios()
427 	 *	- (7,e/o,1)  in linflex_set_termios()
428 	 *	- (8,n,1)  in linflex_set_termios()
429 	 *	- (8,e/o,1)  in linflex_set_termios()
433 	while ((termios->c_cflag & CSIZE) != CS8 &&  in linflex_set_termios()
434 	       (termios->c_cflag & CSIZE) != CS7) {  in linflex_set_termios()
435 		termios->c_cflag &= ~CSIZE;  in linflex_set_termios()
436 		termios->c_cflag |= old_csize;  in linflex_set_termios()
440 	if ((termios->c_cflag & CSIZE) == CS7) {  in linflex_set_termios()
445 	if ((termios->c_cflag & CSIZE) == CS8) {  in linflex_set_termios()
450 	if (termios->c_cflag & CMSPAR) {  in linflex_set_termios()
451 		if ((termios->c_cflag & CSIZE) != CS8) {  in linflex_set_termios()
452 			termios->c_cflag &= ~CSIZE;  in linflex_set_termios()
453 			termios->c_cflag |= CS8;  in linflex_set_termios()
459 	if (termios->c_cflag & CSTOPB)  in linflex_set_termios()
460 		termios->c_cflag &= ~CSTOPB;  in linflex_set_termios()
462 	/* parity must be enabled when CS7 to match 8-bits format */  in linflex_set_termios()
463 	if ((termios->c_cflag & CSIZE) == CS7)  in linflex_set_termios()
464 		termios->c_cflag |= PARENB;  in linflex_set_termios()
466 	if ((termios->c_cflag & PARENB)) {  in linflex_set_termios()
468 		if (termios->c_cflag & PARODD)  in linflex_set_termios()
480 	port->read_status_mask = 0;  in linflex_set_termios()
482 	if (termios->c_iflag & INPCK)  in linflex_set_termios()
483 		port->read_status_mask |=	(LINFLEXD_UARTSR_FEF |  in linflex_set_termios()
488 	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))  in linflex_set_termios()
489 		port->read_status_mask |= LINFLEXD_UARTSR_FEF;  in linflex_set_termios()
492 	port->ignore_status_mask = 0;  in linflex_set_termios()
493 	if (termios->c_iflag & IGNPAR)  in linflex_set_termios()
494 		port->ignore_status_mask |= LINFLEXD_UARTSR_PE;  in linflex_set_termios()
495 	if (termios->c_iflag & IGNBRK) {  in linflex_set_termios()
496 		port->ignore_status_mask |= LINFLEXD_UARTSR_PE;  in linflex_set_termios()
501 		if (termios->c_iflag & IGNPAR)  in linflex_set_termios()
502 			port->ignore_status_mask |= LINFLEXD_UARTSR_BOF;  in linflex_set_termios()
505 	writel(cr, port->membase + UARTCR);  in linflex_set_termios()
509 	writel(cr1, port->membase + LINCR1);  in linflex_set_termios()
529 /* configure/auto-configure the port */
533 		port->type = PORT_LINFLEXUART;  in linflex_config_port()
560 	cr = readl(port->membase + UARTCR);  in linflex_console_putchar()
562 	writeb(ch, port->membase + BDRL);  in linflex_console_putchar()
565 		while ((readl(port->membase + UARTSR) &  in linflex_console_putchar()
570 		while (readl(port->membase + UARTSR) &  in linflex_console_putchar()
575 		writel((readl(port->membase + UARTSR) |  in linflex_console_putchar()
577 					port->membase + UARTSR);  in linflex_console_putchar()
628 	ier = readl(sport->membase + LINIER);  in linflex_string_write()
631 	cr = readl(sport->membase + UARTCR);  in linflex_string_write()
633 	writel(cr, sport->membase + UARTCR);  in linflex_string_write()
637 	writel(ier, sport->membase + LINIER);  in linflex_string_write()
643 	struct uart_port *sport = linflex_ports[co->index];  in linflex_console_write()
647 	if (sport->sysrq)  in linflex_console_write()
669 	cr = readl(sport->membase + UARTCR);  in linflex_console_get_options()
708 	if (co->index == -1 || co->index >= ARRAY_SIZE(linflex_ports))  in linflex_console_setup()
709 		co->index = 0;  in linflex_console_setup()
711 	sport = linflex_ports[co->index];  in linflex_console_setup()
713 		return -ENODEV;  in linflex_console_setup()
720 	if (earlycon_port && sport->mapbase == earlycon_port->mapbase) {  in linflex_console_setup()
767 	.index		= -1,
774 	struct earlycon_device *dev = con->data;  in linflex_earlycon_write()
776 	uart_console_write(&dev->port, s, n, linflex_earlycon_putchar);  in linflex_earlycon_write()
782 	if (!device->port.membase)  in linflex_early_console_setup()
783 		return -ENODEV;  in linflex_early_console_setup()
785 	device->con->write = linflex_earlycon_write;  in linflex_early_console_setup()
786 	earlycon_port = &device->port;  in linflex_early_console_setup()
791 OF_EARLYCON_DECLARE(linflex, "fsl,s32v234-linflexuart",
809 	struct device_node *np = pdev->dev.of_node;  in linflex_probe()
814 	sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);  in linflex_probe()
816 		return -ENOMEM;  in linflex_probe()
820 		dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);  in linflex_probe()
824 		dev_err(&pdev->dev, "driver limited to %d serial ports\n",  in linflex_probe()
826 		return -ENOMEM;  in linflex_probe()
829 	sport->line = ret;  in linflex_probe()
831 	sport->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in linflex_probe()
832 	if (IS_ERR(sport->membase))  in linflex_probe()
833 		return PTR_ERR(sport->membase);  in linflex_probe()
834 	sport->mapbase = res->start;  in linflex_probe()
840 	sport->dev = &pdev->dev;  in linflex_probe()
841 	sport->iotype = UPIO_MEM;  in linflex_probe()
842 	sport->irq = ret;  in linflex_probe()
843 	sport->ops = &linflex_pops;  in linflex_probe()
844 	sport->flags = UPF_BOOT_AUTOCONF;  in linflex_probe()
845 	sport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE);  in linflex_probe()
847 	linflex_ports[sport->line] = sport;  in linflex_probe()