Lines Matching +full:auto +full:- +full:baud
1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #define DRIVER_NAME "esp32-uart"
128 .compatible = "esp,esp32-uart",
131 .compatible = "esp,esp32s3-uart",
141 return port->private_data; in port_variant()
146 writel(v, port->membase + reg); in esp32_uart_write()
151 return readl(port->membase + reg); in esp32_uart_read()
158 return (status & port_variant(port)->txfifo_cnt_mask) >> UART_TXFIFO_CNT_SHIFT; in esp32_uart_tx_fifo_cnt()
165 return (status & port_variant(port)->rxfifo_cnt_mask) >> UART_RXFIFO_CNT_SHIFT; in esp32_uart_rx_fifo_cnt()
216 struct tty_port *tty_port = &port->state->port; in esp32_uart_rxint()
224 spin_lock_irqsave(&port->lock, flags); in esp32_uart_rxint()
232 ++port->icount.brk; in esp32_uart_rxint()
238 ++port->icount.rx; in esp32_uart_rxint()
241 spin_unlock_irqrestore(&port->lock, flags); in esp32_uart_rxint()
257 dev_warn(port->dev, "timeout waiting for TX FIFO\n"); in esp32_uart_put_char_sync()
275 ESP32_UART_TX_FIFO_SIZE - tx_fifo_used, in esp32_uart_transmit_buffer()
329 ret = clk_prepare_enable(sport->clk); in esp32_uart_startup()
333 ret = request_irq(port->irq, esp32_uart_int, 0, DRIVER_NAME, port); in esp32_uart_startup()
335 clk_disable_unprepare(sport->clk); in esp32_uart_startup()
339 spin_lock_irqsave(&port->lock, flags); in esp32_uart_startup()
340 if (port_variant(port)->has_clkconf) in esp32_uart_startup()
345 (1 << port_variant(port)->txfifo_empty_thrhd_shift)); in esp32_uart_startup()
348 spin_unlock_irqrestore(&port->lock, flags); in esp32_uart_startup()
358 free_irq(port->irq, port); in esp32_uart_shutdown()
359 clk_disable_unprepare(sport->clk); in esp32_uart_shutdown()
362 static bool esp32_uart_set_baud(struct uart_port *port, u32 baud) in esp32_uart_set_baud() argument
364 u32 sclk = port->uartclk; in esp32_uart_set_baud()
365 u32 div = sclk / baud; in esp32_uart_set_baud()
367 if (port_variant(port)->has_clkconf) { in esp32_uart_set_baud()
368 u32 sclk_div = div / port_variant(port)->clkdiv_mask; in esp32_uart_set_baud()
370 if (div > port_variant(port)->clkdiv_mask) { in esp32_uart_set_baud()
372 div = sclk / baud; in esp32_uart_set_baud()
379 if (div <= port_variant(port)->clkdiv_mask) { in esp32_uart_set_baud()
380 u32 frag = (sclk * 16) / baud - div * 16; in esp32_uart_set_baud()
396 u32 baud; in esp32_uart_set_termios() local
397 const u32 rx_flow_en = port_variant(port)->rx_flow_en; in esp32_uart_set_termios()
398 u32 max_div = port_variant(port)->clkdiv_mask; in esp32_uart_set_termios()
400 termios->c_cflag &= ~CMSPAR; in esp32_uart_set_termios()
402 if (port_variant(port)->has_clkconf) in esp32_uart_set_termios()
405 baud = uart_get_baud_rate(port, termios, old, in esp32_uart_set_termios()
406 port->uartclk / max_div, in esp32_uart_set_termios()
407 port->uartclk / 16); in esp32_uart_set_termios()
409 spin_lock_irqsave(&port->lock, flags); in esp32_uart_set_termios()
417 if (termios->c_cflag & PARENB) { in esp32_uart_set_termios()
419 if (termios->c_cflag & PARODD) in esp32_uart_set_termios()
423 switch (termios->c_cflag & CSIZE) { in esp32_uart_set_termios()
438 if (termios->c_cflag & CSTOPB) in esp32_uart_set_termios()
443 if (termios->c_cflag & CRTSCTS) in esp32_uart_set_termios()
449 if (baud) { in esp32_uart_set_termios()
450 esp32_uart_set_baud(port, baud); in esp32_uart_set_termios()
451 uart_update_timeout(port, termios->c_cflag, baud); in esp32_uart_set_termios()
454 baud = 115200; in esp32_uart_set_termios()
455 tty_termios_encode_baud_rate(termios, baud, baud); in esp32_uart_set_termios()
456 uart_update_timeout(port, termios->c_cflag, baud); in esp32_uart_set_termios()
458 dev_warn(port->dev, in esp32_uart_set_termios()
459 "unable to set speed to %d baud or the default 115200\n", in esp32_uart_set_termios()
460 baud); in esp32_uart_set_termios()
463 spin_unlock_irqrestore(&port->lock, flags); in esp32_uart_set_termios()
468 return port_variant(port)->type; in esp32_uart_type()
471 /* configure/auto-configure the port */
475 port->type = PORT_GENERIC; in esp32_uart_config_port()
483 return clk_prepare_enable(sport->clk); in esp32_uart_poll_init()
534 struct esp32_port *sport = esp32_uart_ports[co->index]; in esp32_uart_console_write()
535 struct uart_port *port = &sport->port; in esp32_uart_console_write()
539 if (port->sysrq) in esp32_uart_console_write()
542 locked = spin_trylock_irqsave(&port->lock, flags); in esp32_uart_console_write()
544 spin_lock_irqsave(&port->lock, flags); in esp32_uart_console_write()
549 spin_unlock_irqrestore(&port->lock, flags); in esp32_uart_console_write()
555 int baud = 115200; in esp32_uart_console_setup() local
566 if (co->index == -1 || co->index >= ARRAY_SIZE(esp32_uart_ports)) in esp32_uart_console_setup()
567 co->index = 0; in esp32_uart_console_setup()
569 sport = esp32_uart_ports[co->index]; in esp32_uart_console_setup()
571 return -ENODEV; in esp32_uart_console_setup()
573 ret = clk_prepare_enable(sport->clk); in esp32_uart_console_setup()
578 uart_parse_options(options, &baud, &parity, &bits, &flow); in esp32_uart_console_setup()
580 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in esp32_uart_console_setup()
585 struct esp32_port *sport = esp32_uart_ports[co->index]; in esp32_uart_console_exit()
587 clk_disable_unprepare(sport->clk); in esp32_uart_console_exit()
599 .index = -1,
611 struct earlycon_device *dev = con->data; in esp32_uart_earlycon_write()
613 uart_console_write(&dev->port, s, n, esp32_uart_earlycon_putchar); in esp32_uart_earlycon_write()
619 struct earlycon_device *dev = con->data; in esp32_uart_earlycon_read()
623 int c = esp32_uart_poll_get_char(&dev->port); in esp32_uart_earlycon_read()
636 if (!device->port.membase) in esp32xx_uart_early_console_setup()
637 return -ENODEV; in esp32xx_uart_early_console_setup()
639 device->con->write = esp32_uart_earlycon_write; in esp32xx_uart_early_console_setup()
641 device->con->read = esp32_uart_earlycon_read; in esp32xx_uart_early_console_setup()
643 if (device->port.uartclk != BASE_BAUD * 16) in esp32xx_uart_early_console_setup()
644 esp32_uart_set_baud(&device->port, device->baud); in esp32xx_uart_early_console_setup()
652 device->port.private_data = (void *)&esp32_variant; in esp32_uart_early_console_setup()
657 OF_EARLYCON_DECLARE(esp32uart, "esp,esp32-uart",
663 device->port.private_data = (void *)&esp32s3_variant; in esp32s3_uart_early_console_setup()
668 OF_EARLYCON_DECLARE(esp32s3uart, "esp,esp32s3-uart",
681 struct device_node *np = pdev->dev.of_node; in esp32_uart_probe()
687 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in esp32_uart_probe()
689 return -ENOMEM; in esp32_uart_probe()
691 port = &sport->port; in esp32_uart_probe()
695 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); in esp32_uart_probe()
699 dev_err(&pdev->dev, "driver limited to %d serial ports\n", UART_NR); in esp32_uart_probe()
700 return -ENOMEM; in esp32_uart_probe()
703 port->line = ret; in esp32_uart_probe()
707 return -ENODEV; in esp32_uart_probe()
709 port->mapbase = res->start; in esp32_uart_probe()
710 port->membase = devm_ioremap_resource(&pdev->dev, res); in esp32_uart_probe()
711 if (IS_ERR(port->membase)) in esp32_uart_probe()
712 return PTR_ERR(port->membase); in esp32_uart_probe()
714 sport->clk = devm_clk_get(&pdev->dev, NULL); in esp32_uart_probe()
715 if (IS_ERR(sport->clk)) in esp32_uart_probe()
716 return PTR_ERR(sport->clk); in esp32_uart_probe()
718 port->uartclk = clk_get_rate(sport->clk); in esp32_uart_probe()
719 port->dev = &pdev->dev; in esp32_uart_probe()
720 port->type = PORT_GENERIC; in esp32_uart_probe()
721 port->iotype = UPIO_MEM; in esp32_uart_probe()
722 port->irq = platform_get_irq(pdev, 0); in esp32_uart_probe()
723 port->ops = &esp32_uart_pops; in esp32_uart_probe()
724 port->flags = UPF_BOOT_AUTOCONF; in esp32_uart_probe()
725 port->has_sysrq = 1; in esp32_uart_probe()
726 port->fifosize = ESP32_UART_TX_FIFO_SIZE; in esp32_uart_probe()
727 port->private_data = (void *)device_get_match_data(&pdev->dev); in esp32_uart_probe()
729 esp32_uart_ports[port->line] = sport; in esp32_uart_probe()