1 // SPDX-License-Identifier: GPL-2.0+
31 		status = p->serial_in(p, UART_LSR);  in tegra_uart_handle_break()
35 		p->serial_in(p, UART_RX);  in tegra_uart_handle_break()
37 		if (--tmout == 0)  in tegra_uart_handle_break()
46 	struct tegra_uart *uart;  in tegra_uart_probe()  local
51 	uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);  in tegra_uart_probe()
52 	if (!uart)  in tegra_uart_probe()
53 		return -ENOMEM;  in tegra_uart_probe()
58 	spin_lock_init(&port->lock);  in tegra_uart_probe()
60 	port->flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE;  in tegra_uart_probe()
61 	port->type = PORT_TEGRA;  in tegra_uart_probe()
62 	port->dev = &pdev->dev;  in tegra_uart_probe()
63 	port->handle_break = tegra_uart_handle_break;  in tegra_uart_probe()
67 		return -ENODEV;  in tegra_uart_probe()
69 	port->membase = devm_ioremap(&pdev->dev, res->start,  in tegra_uart_probe()
71 	if (!port->membase)  in tegra_uart_probe()
72 		return -ENOMEM;  in tegra_uart_probe()
74 	port->mapbase = res->start;  in tegra_uart_probe()
75 	port->mapsize = resource_size(res);  in tegra_uart_probe()
81 	port->iotype = UPIO_MEM32;  in tegra_uart_probe()
82 	port->regshift = 2;  in tegra_uart_probe()
84 	uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);  in tegra_uart_probe()
85 	if (IS_ERR(uart->rst))  in tegra_uart_probe()
86 		return PTR_ERR(uart->rst);  in tegra_uart_probe()
88 	if (!port->uartclk) {  in tegra_uart_probe()
89 		uart->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_uart_probe()
90 		if (IS_ERR(uart->clk)) {  in tegra_uart_probe()
91 			dev_err(&pdev->dev, "failed to get clock!\n");  in tegra_uart_probe()
92 			return -ENODEV;  in tegra_uart_probe()
95 		ret = clk_prepare_enable(uart->clk);  in tegra_uart_probe()
99 		port->uartclk = clk_get_rate(uart->clk);  in tegra_uart_probe()
102 	ret = reset_control_deassert(uart->rst);  in tegra_uart_probe()
110 	platform_set_drvdata(pdev, uart);  in tegra_uart_probe()
111 	uart->line = ret;  in tegra_uart_probe()
116 	reset_control_assert(uart->rst);  in tegra_uart_probe()
118 	clk_disable_unprepare(uart->clk);  in tegra_uart_probe()
125 	struct tegra_uart *uart = platform_get_drvdata(pdev);  in tegra_uart_remove()  local
127 	serial8250_unregister_port(uart->line);  in tegra_uart_remove()
128 	reset_control_assert(uart->rst);  in tegra_uart_remove()
129 	clk_disable_unprepare(uart->clk);  in tegra_uart_remove()
135 	struct tegra_uart *uart = dev_get_drvdata(dev);  in tegra_uart_suspend()  local
136 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);  in tegra_uart_suspend()
137 	struct uart_port *port = &port8250->port;  in tegra_uart_suspend()
139 	serial8250_suspend_port(uart->line);  in tegra_uart_suspend()
142 		clk_disable_unprepare(uart->clk);  in tegra_uart_suspend()
149 	struct tegra_uart *uart = dev_get_drvdata(dev);  in tegra_uart_resume()  local
150 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);  in tegra_uart_resume()
151 	struct uart_port *port = &port8250->port;  in tegra_uart_resume()
154 		clk_prepare_enable(uart->clk);  in tegra_uart_resume()
156 	serial8250_resume_port(uart->line);  in tegra_uart_resume()
166 	{ .compatible = "nvidia,tegra20-uart", },
179 		.name = "tegra-uart",