Lines Matching +full:auto +full:- +full:baud
1 // SPDX-License-Identifier: GPL-2.0+
3 * Base port operations for 8250/16550-type serial ports
244 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
245 * workaround of errata A-008006 which states that tx_loadsz should
257 .name = "Palmchip BK-3103",
344 offset = offset << p->regshift; in hub6_serial_in()
345 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_in()
346 return inb(p->iobase + 1); in hub6_serial_in()
351 offset = offset << p->regshift; in hub6_serial_out()
352 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_out()
353 outb(value, p->iobase + 1); in hub6_serial_out()
359 offset = offset << p->regshift; in mem_serial_in()
360 return readb(p->membase + offset); in mem_serial_in()
365 offset = offset << p->regshift; in mem_serial_out()
366 writeb(value, p->membase + offset); in mem_serial_out()
371 offset = offset << p->regshift; in mem16_serial_out()
372 writew(value, p->membase + offset); in mem16_serial_out()
377 offset = offset << p->regshift; in mem16_serial_in()
378 return readw(p->membase + offset); in mem16_serial_in()
383 offset = offset << p->regshift; in mem32_serial_out()
384 writel(value, p->membase + offset); in mem32_serial_out()
389 offset = offset << p->regshift; in mem32_serial_in()
390 return readl(p->membase + offset); in mem32_serial_in()
395 offset = offset << p->regshift; in mem32be_serial_out()
396 iowrite32be(value, p->membase + offset); in mem32be_serial_out()
401 offset = offset << p->regshift; in mem32be_serial_in()
402 return ioread32be(p->membase + offset); in mem32be_serial_in()
408 offset = offset << p->regshift; in io_serial_in()
409 return inb(p->iobase + offset); in io_serial_in()
414 offset = offset << p->regshift; in io_serial_out()
415 outb(value, p->iobase + offset); in io_serial_out()
420 return (unsigned int)-1; in no_serial_in()
433 up->dl_read = default_serial_dl_read; in set_io_from_upio()
434 up->dl_write = default_serial_dl_write; in set_io_from_upio()
436 switch (p->iotype) { in set_io_from_upio()
439 p->serial_in = hub6_serial_in; in set_io_from_upio()
440 p->serial_out = hub6_serial_out; in set_io_from_upio()
445 p->serial_in = mem_serial_in; in set_io_from_upio()
446 p->serial_out = mem_serial_out; in set_io_from_upio()
450 p->serial_in = mem16_serial_in; in set_io_from_upio()
451 p->serial_out = mem16_serial_out; in set_io_from_upio()
455 p->serial_in = mem32_serial_in; in set_io_from_upio()
456 p->serial_out = mem32_serial_out; in set_io_from_upio()
460 p->serial_in = mem32be_serial_in; in set_io_from_upio()
461 p->serial_out = mem32be_serial_out; in set_io_from_upio()
465 p->serial_in = io_serial_in; in set_io_from_upio()
466 p->serial_out = io_serial_out; in set_io_from_upio()
470 WARN(p->iotype != UPIO_PORT || p->iobase, in set_io_from_upio()
471 "Unsupported UART type %x\n", p->iotype); in set_io_from_upio()
472 p->serial_in = no_serial_in; in set_io_from_upio()
473 p->serial_out = no_serial_out; in set_io_from_upio()
476 up->cur_iotype = p->iotype; in set_io_from_upio()
477 p->handle_irq = serial8250_default_handle_irq; in set_io_from_upio()
483 switch (p->iotype) { in serial_port_out_sync()
489 p->serial_out(p, offset, value); in serial_port_out_sync()
490 p->serial_in(p, UART_LCR); /* safe, no side-effects */ in serial_port_out_sync()
493 p->serial_out(p, offset, value); in serial_port_out_sync()
502 if (p->capabilities & UART_CAP_FIFO) { in serial8250_clear_fifos()
516 serial_out(p, UART_FCR, p->fcr); in serial8250_clear_and_reinit_fifos()
522 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get()
524 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get()
530 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put()
532 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put()
533 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put()
538 * serial8250_em485_init() - put uart_8250_port into rs485 emulating
551 * or from any other callback protected with p->port.lock spinlock.
555 * Return 0 - success, -errno - otherwise
560 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_init()
562 if (p->em485) in serial8250_em485_init()
565 p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC); in serial8250_em485_init()
566 if (!p->em485) in serial8250_em485_init()
567 return -ENOMEM; in serial8250_em485_init()
569 hrtimer_init(&p->em485->stop_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
571 hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
573 p->em485->stop_tx_timer.function = &serial8250_em485_handle_stop_tx; in serial8250_em485_init()
574 p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx; in serial8250_em485_init()
575 p->em485->port = p; in serial8250_em485_init()
576 p->em485->active_timer = NULL; in serial8250_em485_init()
577 p->em485->tx_stopped = true; in serial8250_em485_init()
580 if (p->em485->tx_stopped) in serial8250_em485_init()
581 p->rs485_stop_tx(p); in serial8250_em485_init()
587 * serial8250_em485_destroy() - put uart_8250_port into normal state
595 * or from any other callback protected with p->port.lock spinlock.
601 if (!p->em485) in serial8250_em485_destroy()
604 hrtimer_cancel(&p->em485->start_tx_timer); in serial8250_em485_destroy()
605 hrtimer_cancel(&p->em485->stop_tx_timer); in serial8250_em485_destroy()
607 kfree(p->em485); in serial8250_em485_destroy()
608 p->em485 = NULL; in serial8250_em485_destroy()
621 * serial8250_em485_config() - generic ->rs485_config() callback
639 if (rs485->flags & SER_RS485_ENABLED) in serial8250_em485_config()
656 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get_tx()
659 rpm_active = xchg(&p->rpm_tx_active, 1); in serial8250_rpm_get_tx()
662 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get_tx()
670 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put_tx()
673 rpm_active = xchg(&p->rpm_tx_active, 0); in serial8250_rpm_put_tx()
676 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put_tx()
677 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put_tx()
692 if (p->capabilities & UART_CAP_SLEEP) { in serial8250_set_sleep()
694 uart_port_lock_irq(&p->port); in serial8250_set_sleep()
695 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
703 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
708 uart_port_unlock_irq(&p->port); in serial8250_set_sleep()
716 if (up->capabilities & UART_CAP_UUE) in serial8250_clear_IER()
742 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; in __enable_rsa()
749 if (up->port.type == PORT_RSA) { in enable_rsa()
750 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { in enable_rsa()
751 uart_port_lock_irq(&up->port); in enable_rsa()
753 uart_port_unlock_irq(&up->port); in enable_rsa()
755 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) in enable_rsa()
771 if (up->port.type == PORT_RSA && in disable_rsa()
772 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { in disable_rsa()
773 uart_port_lock_irq(&up->port); in disable_rsa()
785 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; in disable_rsa()
786 uart_port_unlock_irq(&up->port); in disable_rsa()
814 mdelay(20);/* FIXME - schedule_timeout */ in size_fifo()
828 * Read UART ID using the divisor method - set DLL and DLM to zero
866 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_has_efr()
871 * If we have to do this here because some non-National in autoconfig_has_efr()
885 up->acr = 0; in autoconfig_has_efr()
898 up->port.type = PORT_16C950; in autoconfig_has_efr()
902 * chip which causes it to seriously miscalculate baud rates in autoconfig_has_efr()
906 up->bugs |= UART_BUG_QUOT; in autoconfig_has_efr()
914 * 0x10 - XR16C850 and the DLL contains the chip revision. in autoconfig_has_efr()
915 * 0x12 - XR16C2850. in autoconfig_has_efr()
916 * 0x14 - XR16C854. in autoconfig_has_efr()
923 up->port.type = PORT_16850; in autoconfig_has_efr()
934 * I've had problems doing this in the past. -TYT in autoconfig_has_efr()
937 up->port.type = PORT_16654; in autoconfig_has_efr()
939 up->port.type = PORT_16650V2; in autoconfig_has_efr()
944 * this category - the original 8250 and the 16450. The
951 up->port.type = PORT_8250; in autoconfig_8250()
961 up->port.type = PORT_16450; in autoconfig_8250()
969 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html in broken_efr()
989 lockdep_assert_held_once(&up->port.lock); in autoconfig_16550a()
991 up->port.type = PORT_16550A; in autoconfig_16550a()
992 up->capabilities |= UART_CAP_FIFO; in autoconfig_16550a()
995 !(up->port.flags & UPF_FULL_PROBE)) in autoconfig_16550a()
1007 up->port.type = PORT_16650; in autoconfig_16550a()
1008 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_16550a()
1018 up->port.type = PORT_16550A_FSL64; in autoconfig_16550a()
1042 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 in autoconfig_16550a()
1070 up->port.uartclk = 921600*16; in autoconfig_16550a()
1071 up->port.type = PORT_NS16550A; in autoconfig_16550a()
1072 up->capabilities |= UART_NATSEMI; in autoconfig_16550a()
1099 up->port.type = PORT_16750; in autoconfig_16550a()
1100 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP; in autoconfig_16550a()
1126 up->port.type = PORT_XSCALE; in autoconfig_16550a()
1127 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE; in autoconfig_16550a()
1143 if (up->port.type == PORT_16550A && size_fifo(up) == 64) { in autoconfig_16550a()
1144 up->port.type = PORT_U6_16550A; in autoconfig_16550a()
1145 up->capabilities |= UART_CAP_AFE; in autoconfig_16550a()
1160 struct uart_port *port = &up->port; in autoconfig()
1164 if (!port->iobase && !port->mapbase && !port->membase) in autoconfig()
1168 port->name, port->iobase, port->membase); in autoconfig()
1171 * We really do need global IRQs disabled here - we're going to in autoconfig()
1178 up->capabilities = 0; in autoconfig()
1179 up->bugs = 0; in autoconfig()
1181 if (!(port->flags & UPF_BUGGY_UART)) { in autoconfig()
1188 * assumption is that 0x80 is a non-existent port; in autoconfig()
1232 * that conflicts with COM 1-4 --- we hope! in autoconfig()
1234 if (!(port->flags & UPF_SKIP_TEST)) { in autoconfig()
1266 port->type = PORT_16550; in autoconfig()
1272 port->type = PORT_UNKNOWN; in autoconfig()
1280 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA && in autoconfig()
1282 port->type = PORT_RSA; in autoconfig()
1287 port->fifosize = uart_config[up->port.type].fifo_size; in autoconfig()
1288 old_capabilities = up->capabilities; in autoconfig()
1289 up->capabilities = uart_config[port->type].flags; in autoconfig()
1290 up->tx_loadsz = uart_config[port->type].tx_loadsz; in autoconfig()
1292 if (port->type == PORT_UNKNOWN) in autoconfig()
1299 if (port->type == PORT_RSA) in autoconfig()
1313 if (port->type == PORT_16550A && port->iotype == UPIO_PORT) in autoconfig()
1316 if (up->capabilities != old_capabilities) { in autoconfig()
1317 dev_warn(port->dev, "detected caps %08x should be %08x\n", in autoconfig()
1318 old_capabilities, up->capabilities); in autoconfig()
1322 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name); in autoconfig()
1327 struct uart_port *port = &up->port; in autoconfig_irq()
1334 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1335 ICP = (port->iobase & 0xfe0) | 0x1f; in autoconfig_irq()
1353 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1377 if (port->flags & UPF_FOURPORT) in autoconfig_irq()
1380 port->irq = (irq > 0) ? irq : 0; in autoconfig_irq()
1388 lockdep_assert_held_once(&port->lock); in serial8250_stop_rx()
1392 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial8250_stop_rx()
1393 up->port.read_status_mask &= ~UART_LSR_DR; in serial8250_stop_rx()
1394 serial_port_out(port, UART_IER, up->ier); in serial8250_stop_rx()
1400 * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1410 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_stop_tx()
1412 if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) in serial8250_em485_stop_tx()
1420 * received during the half-duplex transmission. in serial8250_em485_stop_tx()
1423 if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { in serial8250_em485_stop_tx()
1426 p->ier |= UART_IER_RLSI | UART_IER_RDI; in serial8250_em485_stop_tx()
1427 serial_port_out(&p->port, UART_IER, p->ier); in serial8250_em485_stop_tx()
1436 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_stop_tx()
1440 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_stop_tx()
1441 if (em485->active_timer == &em485->stop_tx_timer) { in serial8250_em485_handle_stop_tx()
1442 p->rs485_stop_tx(p); in serial8250_em485_handle_stop_tx()
1443 em485->active_timer = NULL; in serial8250_em485_handle_stop_tx()
1444 em485->tx_stopped = true; in serial8250_em485_handle_stop_tx()
1446 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_stop_tx()
1459 struct uart_8250_em485 *em485 = p->em485; in __stop_tx_rs485()
1462 lockdep_assert_held_once(&p->port.lock); in __stop_tx_rs485()
1464 stop_delay += (u64)p->port.rs485.delay_rts_after_send * NSEC_PER_MSEC; in __stop_tx_rs485()
1471 em485->active_timer = &em485->stop_tx_timer; in __stop_tx_rs485()
1472 hrtimer_start(&em485->stop_tx_timer, ns_to_ktime(stop_delay), HRTIMER_MODE_REL); in __stop_tx_rs485()
1474 p->rs485_stop_tx(p); in __stop_tx_rs485()
1475 em485->active_timer = NULL; in __stop_tx_rs485()
1476 em485->tx_stopped = true; in __stop_tx_rs485()
1482 struct uart_8250_em485 *em485 = p->em485; in __stop_tx()
1499 if (!(p->capabilities & UART_CAP_NOTEMT)) in __stop_tx()
1508 stop_delay = p->port.frame_time + DIV_ROUND_UP(p->port.frame_time, 7); in __stop_tx()
1528 if (port->type == PORT_16C950) { in serial8250_stop_tx()
1529 up->acr |= UART_ACR_TXDIS; in serial8250_stop_tx()
1530 serial_icr_write(up, UART_ACR, up->acr); in serial8250_stop_tx()
1539 if (up->dma && !up->dma->tx_dma(up)) in __start_tx()
1543 if (up->bugs & UART_BUG_TXEN) { in __start_tx()
1552 * Re-enable the transmitter if we disabled it. in __start_tx()
1554 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in __start_tx()
1555 up->acr &= ~UART_ACR_TXDIS; in __start_tx()
1556 serial_icr_write(up, UART_ACR, up->acr); in __start_tx()
1561 * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1574 if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) in serial8250_em485_start_tx()
1575 serial8250_stop_rx(&up->port); in serial8250_em485_start_tx()
1577 if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) in serial8250_em485_start_tx()
1589 struct uart_8250_em485 *em485 = up->em485; in start_tx_rs485()
1593 * em485->active_timer != &em485->stop_tx_timer, it might happen that in start_tx_rs485()
1595 * chars is send and em485->active_timer == &em485->stop_tx_timer again. in start_tx_rs485()
1598 * em485->active_timer when &em485->stop_tx_timer is armed again. in start_tx_rs485()
1600 if (em485->active_timer == &em485->stop_tx_timer) in start_tx_rs485()
1601 hrtimer_try_to_cancel(&em485->stop_tx_timer); in start_tx_rs485()
1603 em485->active_timer = NULL; in start_tx_rs485()
1605 if (em485->tx_stopped) { in start_tx_rs485()
1606 em485->tx_stopped = false; in start_tx_rs485()
1608 up->rs485_start_tx(up); in start_tx_rs485()
1610 if (up->port.rs485.delay_rts_before_send > 0) { in start_tx_rs485()
1611 em485->active_timer = &em485->start_tx_timer; in start_tx_rs485()
1612 start_hrtimer_ms(&em485->start_tx_timer, in start_tx_rs485()
1613 up->port.rs485.delay_rts_before_send); in start_tx_rs485()
1625 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_start_tx()
1628 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_start_tx()
1629 if (em485->active_timer == &em485->start_tx_timer) { in serial8250_em485_handle_start_tx()
1630 __start_tx(&p->port); in serial8250_em485_handle_start_tx()
1631 em485->active_timer = NULL; in serial8250_em485_handle_start_tx()
1633 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_start_tx()
1641 struct uart_8250_em485 *em485 = up->em485; in serial8250_start_tx()
1644 lockdep_assert_held_once(&port->lock); in serial8250_start_tx()
1646 if (!port->x_char && kfifo_is_empty(&port->state->port.xmit_fifo)) in serial8250_start_tx()
1652 if ((em485->active_timer == &em485->start_tx_timer) || in serial8250_start_tx()
1661 port->throttle(port); in serial8250_throttle()
1666 port->unthrottle(port); in serial8250_unthrottle()
1674 lockdep_assert_held_once(&port->lock); in serial8250_disable_ms()
1677 if (up->bugs & UART_BUG_NOMSR) in serial8250_disable_ms()
1680 mctrl_gpio_disable_ms(up->gpios); in serial8250_disable_ms()
1682 up->ier &= ~UART_IER_MSI; in serial8250_disable_ms()
1683 serial_port_out(port, UART_IER, up->ier); in serial8250_disable_ms()
1691 lockdep_assert_held_once(&port->lock); in serial8250_enable_ms()
1694 if (up->bugs & UART_BUG_NOMSR) in serial8250_enable_ms()
1697 mctrl_gpio_enable_ms(up->gpios); in serial8250_enable_ms()
1699 up->ier |= UART_IER_MSI; in serial8250_enable_ms()
1702 serial_port_out(port, UART_IER, up->ier); in serial8250_enable_ms()
1708 struct uart_port *port = &up->port; in serial8250_read_char()
1723 port->icount.rx++; in serial8250_read_char()
1725 lsr |= up->lsr_saved_flags; in serial8250_read_char()
1726 up->lsr_saved_flags = 0; in serial8250_read_char()
1731 port->icount.brk++; in serial8250_read_char()
1741 port->icount.parity++; in serial8250_read_char()
1743 port->icount.frame++; in serial8250_read_char()
1745 port->icount.overrun++; in serial8250_read_char()
1750 lsr &= port->read_status_mask; in serial8250_read_char()
1753 dev_dbg(port->dev, "handling break\n"); in serial8250_read_char()
1768 * serial8250_rx_chars - Read characters. The first LSR value must be passed in.
1770 * Returns LSR bits. The caller should rely only on non-Rx related LSR bits
1776 struct uart_port *port = &up->port; in serial8250_rx_chars()
1781 if (--max_count == 0) in serial8250_rx_chars()
1786 tty_flip_buffer_push(&port->state->port); in serial8250_rx_chars()
1793 struct uart_port *port = &up->port; in serial8250_tx_chars()
1794 struct tty_port *tport = &port->state->port; in serial8250_tx_chars()
1797 if (port->x_char) { in serial8250_tx_chars()
1805 if (kfifo_is_empty(&tport->xmit_fifo)) { in serial8250_tx_chars()
1810 count = up->tx_loadsz; in serial8250_tx_chars()
1818 if (up->bugs & UART_BUG_TXRACE) { in serial8250_tx_chars()
1824 * Delay back-to-back writes by a read cycle to avoid in serial8250_tx_chars()
1826 * side-effects and discard the result. in serial8250_tx_chars()
1831 if ((up->capabilities & UART_CAP_HFIFO) && in serial8250_tx_chars()
1834 /* The BCM2835 MINI UART THRE bit is really a not-full bit. */ in serial8250_tx_chars()
1835 if ((up->capabilities & UART_CAP_MINI) && in serial8250_tx_chars()
1838 } while (--count > 0); in serial8250_tx_chars()
1840 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in serial8250_tx_chars()
1848 if (kfifo_is_empty(&tport->xmit_fifo) && in serial8250_tx_chars()
1849 !(up->capabilities & UART_CAP_RPM)) in serial8250_tx_chars()
1857 struct uart_port *port = &up->port; in serial8250_modem_status()
1860 status |= up->msr_saved_flags; in serial8250_modem_status()
1861 up->msr_saved_flags = 0; in serial8250_modem_status()
1862 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && in serial8250_modem_status()
1863 port->state != NULL) { in serial8250_modem_status()
1865 port->icount.rng++; in serial8250_modem_status()
1867 port->icount.dsr++; in serial8250_modem_status()
1873 wake_up_interruptible(&port->state->port.delta_msr_wait); in serial8250_modem_status()
1895 if (!up->dma->rx_running) in handle_rx_dma()
1903 return up->dma->rx_dma(up); in handle_rx_dma()
1912 struct tty_port *tport = &port->state->port; in serial8250_handle_irq()
1927 * overflow. Not servicing, RX FIFO would trigger auto HW flow in serial8250_handle_irq()
1929 * halting RX. This only works when auto HW flow control is in serial8250_handle_irq()
1933 (port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) && in serial8250_handle_irq()
1934 !(port->read_status_mask & UART_LSR_DR)) in serial8250_handle_irq()
1940 d = irq_get_irq_data(port->irq); in serial8250_handle_irq()
1942 pm_wakeup_event(tport->tty->dev, 0); in serial8250_handle_irq()
1943 if (!up->dma || handle_rx_dma(up, iir)) in serial8250_handle_irq()
1947 if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) { in serial8250_handle_irq()
1948 if (!up->dma || up->dma->tx_err) in serial8250_handle_irq()
1950 else if (!up->dma->tx_running) in serial8250_handle_irq()
2028 if (up->gpios) in serial8250_do_get_mctrl()
2029 return mctrl_gpio_get(up->gpios, &val); in serial8250_do_get_mctrl()
2037 if (port->get_mctrl) in serial8250_get_mctrl()
2038 return port->get_mctrl(port); in serial8250_get_mctrl()
2049 mcr |= up->mcr; in serial8250_do_set_mctrl()
2057 if (port->rs485.flags & SER_RS485_ENABLED) in serial8250_set_mctrl()
2060 if (port->set_mctrl) in serial8250_set_mctrl()
2061 port->set_mctrl(port, mctrl); in serial8250_set_mctrl()
2073 if (break_state == -1) in serial8250_break_ctl()
2074 up->lcr |= UART_LCR_SBC; in serial8250_break_ctl()
2076 up->lcr &= ~UART_LCR_SBC; in serial8250_break_ctl()
2077 serial_port_out(port, UART_LCR, up->lcr); in serial8250_break_ctl()
2092 if (--tmout == 0) in wait_for_lsr()
2109 if (up->port.flags & UPF_CONS_FLOW) { in wait_for_xmitr()
2110 for (tmout = 1000000; tmout; tmout--) { in wait_for_xmitr()
2112 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; in wait_for_xmitr()
2195 if (!port->fifosize) in serial8250_do_startup()
2196 port->fifosize = uart_config[port->type].fifo_size; in serial8250_do_startup()
2197 if (!up->tx_loadsz) in serial8250_do_startup()
2198 up->tx_loadsz = uart_config[port->type].tx_loadsz; in serial8250_do_startup()
2199 if (!up->capabilities) in serial8250_do_startup()
2200 up->capabilities = uart_config[port->type].flags; in serial8250_do_startup()
2201 up->mcr = 0; in serial8250_do_startup()
2203 if (port->iotype != up->cur_iotype) in serial8250_do_startup()
2207 if (port->type == PORT_16C950) { in serial8250_do_startup()
2214 up->acr = 0; in serial8250_do_startup()
2226 if (port->type == PORT_DA830) { in serial8250_do_startup()
2272 if (!(port->flags & UPF_BUGGY_UART) && in serial8250_do_startup()
2274 dev_info_ratelimited(port->dev, "LSR safety check engaged!\n"); in serial8250_do_startup()
2275 retval = -ENODEV; in serial8250_do_startup()
2282 if (port->type == PORT_16850) { in serial8250_do_startup()
2301 if (((port->type == PORT_ALTR_16550_F32) || in serial8250_do_startup()
2302 (port->type == PORT_ALTR_16550_F64) || in serial8250_do_startup()
2303 (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) { in serial8250_do_startup()
2304 /* Bounds checking of TX threshold (valid 0 to fifosize-2) */ in serial8250_do_startup()
2305 if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) { in serial8250_do_startup()
2306 dev_err(port->dev, "TX FIFO Threshold errors, skipping\n"); in serial8250_do_startup()
2311 port->fifosize - up->tx_loadsz); in serial8250_do_startup()
2312 port->handle_irq = serial8250_tx_threshold_handle_irq; in serial8250_do_startup()
2317 if (port->irq && (up->port.flags & UPF_SHARE_IRQ)) in serial8250_do_startup()
2318 up->port.irqflags |= IRQF_SHARED; in serial8250_do_startup()
2320 retval = up->ops->setup_irq(up); in serial8250_do_startup()
2324 if (port->irq && !(up->port.flags & UPF_NO_THRE_TEST)) { in serial8250_do_startup()
2327 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2328 disable_irq_nosync(port->irq); in serial8250_do_startup()
2348 udelay(1); /* allow a working UART time to re-assert THRE */ in serial8250_do_startup()
2354 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2355 enable_irq(port->irq); in serial8250_do_startup()
2363 up->port.flags & UPF_BUG_THRE) { in serial8250_do_startup()
2364 up->bugs |= UART_BUG_THRE; in serial8250_do_startup()
2368 up->ops->setup_timer(up); in serial8250_do_startup()
2376 if (up->port.flags & UPF_FOURPORT) { in serial8250_do_startup()
2377 if (!up->port.irq) in serial8250_do_startup()
2378 up->port.mctrl |= TIOCM_OUT1; in serial8250_do_startup()
2383 if (port->irq) in serial8250_do_startup()
2384 up->port.mctrl |= TIOCM_OUT2; in serial8250_do_startup()
2386 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_startup()
2399 if (up->port.quirks & UPQ_NO_TXEN_TEST) in serial8250_do_startup()
2412 if (!(up->bugs & UART_BUG_TXEN)) { in serial8250_do_startup()
2413 up->bugs |= UART_BUG_TXEN; in serial8250_do_startup()
2414 dev_dbg(port->dev, "enabling bad tx status workarounds\n"); in serial8250_do_startup()
2417 up->bugs &= ~UART_BUG_TXEN; in serial8250_do_startup()
2432 up->lsr_saved_flags = 0; in serial8250_do_startup()
2433 up->msr_saved_flags = 0; in serial8250_do_startup()
2438 if (up->dma) { in serial8250_do_startup()
2446 dev_warn_ratelimited(port->dev, "%s\n", msg); in serial8250_do_startup()
2447 up->dma = NULL; in serial8250_do_startup()
2453 * enable until after the FIFOs are enabled; otherwise, an already- in serial8250_do_startup()
2456 up->ier = UART_IER_RLSI | UART_IER_RDI; in serial8250_do_startup()
2458 if (port->flags & UPF_FOURPORT) { in serial8250_do_startup()
2463 icp = (port->iobase & 0xfe0) | 0x01f; in serial8250_do_startup()
2476 if (port->startup) in serial8250_startup()
2477 return port->startup(port); in serial8250_startup()
2493 up->ier = 0; in serial8250_do_shutdown()
2497 synchronize_irq(port->irq); in serial8250_do_shutdown()
2499 if (up->dma) in serial8250_do_shutdown()
2503 if (port->flags & UPF_FOURPORT) { in serial8250_do_shutdown()
2505 inb((port->iobase & 0xfe0) | 0x1f); in serial8250_do_shutdown()
2506 port->mctrl |= TIOCM_OUT1; in serial8250_do_shutdown()
2508 port->mctrl &= ~TIOCM_OUT2; in serial8250_do_shutdown()
2510 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_shutdown()
2534 up->ops->release_irq(up); in serial8250_do_shutdown()
2540 if (port->shutdown) in serial8250_shutdown()
2541 port->shutdown(port); in serial8250_shutdown()
2547 unsigned int baud, in serial8250_do_get_divisor() argument
2550 upf_t magic_multiplier = port->flags & UPF_MAGIC_MULTIPLIER; in serial8250_do_get_divisor()
2555 * Handle magic divisors for baud rates above baud_base on SMSC in serial8250_do_get_divisor()
2558 * magic divisors actually reprogram the baud rate generator's in serial8250_do_get_divisor()
2563 * for the extra baud rates of 460800bps and 230400bps rather in serial8250_do_get_divisor()
2570 * the base frequency is divided by 4 for use by the Baud Rate in serial8250_do_get_divisor()
2572 * the divisor produces the baud rate of 115200bps. Conversely, in serial8250_do_get_divisor()
2573 * if set to 1 and high-speed operation has been enabled with the in serial8250_do_get_divisor()
2575 * then the base frequency is supplied directly to the Baud Rate in serial8250_do_get_divisor()
2577 * 0x8004, etc. the respective baud rates produced are 460800bps, in serial8250_do_get_divisor()
2581 * the baud base and therefore 32767 is the maximum divisor value in serial8250_do_get_divisor()
2583 * Baud Rate Generator is capable of dividing the internal PLL in serial8250_do_get_divisor()
2586 if (magic_multiplier && baud >= port->uartclk / 6) in serial8250_do_get_divisor()
2588 else if (magic_multiplier && baud >= port->uartclk / 12) in serial8250_do_get_divisor()
2591 quot = uart_get_divisor(port, baud); in serial8250_do_get_divisor()
2596 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) in serial8250_do_get_divisor()
2603 unsigned int baud, in serial8250_get_divisor() argument
2606 if (port->get_divisor) in serial8250_get_divisor()
2607 return port->get_divisor(port, baud, frac); in serial8250_get_divisor()
2609 return serial8250_do_get_divisor(port, baud, frac); in serial8250_get_divisor()
2631 void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud, in serial8250_do_set_divisor() argument
2636 /* Workaround to enable 115200 baud on OMAP1510 internal ports */ in serial8250_do_set_divisor()
2638 if (baud == 115200) { in serial8250_do_set_divisor()
2649 if (up->capabilities & UART_NATSEMI) in serial8250_do_set_divisor()
2652 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); in serial8250_do_set_divisor()
2658 static void serial8250_set_divisor(struct uart_port *port, unsigned int baud, in serial8250_set_divisor() argument
2661 if (port->set_divisor) in serial8250_set_divisor()
2662 port->set_divisor(port, baud, quot, quot_frac); in serial8250_set_divisor()
2664 serial8250_do_set_divisor(port, baud, quot); in serial8250_set_divisor()
2671 unsigned int tolerance = port->uartclk / 100; in serial8250_get_baud_rate()
2676 * Handle magic divisors for baud rates above baud_base on SMSC in serial8250_get_baud_rate()
2680 if (port->flags & UPF_MAGIC_MULTIPLIER) { in serial8250_get_baud_rate()
2681 min = port->uartclk / 16 / UART_DIV_MAX >> 1; in serial8250_get_baud_rate()
2682 max = (port->uartclk + tolerance) / 4; in serial8250_get_baud_rate()
2684 min = port->uartclk / 16 / UART_DIV_MAX; in serial8250_get_baud_rate()
2685 max = (port->uartclk + tolerance) / 16; in serial8250_get_baud_rate()
2691 * slower than nominal still match standard baud rates without in serial8250_get_baud_rate()
2704 struct tty_port *tport = &port->state->port; in serial8250_update_uartclk()
2709 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2710 port->uartclk = uartclk; in serial8250_update_uartclk()
2711 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2715 down_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2716 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2718 if (port->uartclk == uartclk) in serial8250_update_uartclk()
2721 port->uartclk = uartclk; in serial8250_update_uartclk()
2726 serial8250_do_set_termios(port, &tty->termios, NULL); in serial8250_update_uartclk()
2729 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2730 up_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2742 unsigned int baud, quot, frac = 0; in serial8250_do_set_termios() local
2744 if (up->capabilities & UART_CAP_MINI) { in serial8250_do_set_termios()
2745 termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR); in serial8250_do_set_termios()
2746 if ((termios->c_cflag & CSIZE) == CS5 || in serial8250_do_set_termios()
2747 (termios->c_cflag & CSIZE) == CS6) in serial8250_do_set_termios()
2748 termios->c_cflag = (termios->c_cflag & ~CSIZE) | CS7; in serial8250_do_set_termios()
2750 cval = serial8250_compute_lcr(up, termios->c_cflag); in serial8250_do_set_termios()
2752 baud = serial8250_get_baud_rate(port, termios, old); in serial8250_do_set_termios()
2753 quot = serial8250_get_divisor(port, baud, &frac); in serial8250_do_set_termios()
2764 up->lcr = cval; /* Save computed LCR */ in serial8250_do_set_termios()
2766 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { in serial8250_do_set_termios()
2767 if (baud < 2400 && !up->dma) { in serial8250_do_set_termios()
2768 up->fcr &= ~UART_FCR_TRIGGER_MASK; in serial8250_do_set_termios()
2769 up->fcr |= UART_FCR_TRIGGER_1; in serial8250_do_set_termios()
2774 * MCR-based auto flow control. When AFE is enabled, RTS will be in serial8250_do_set_termios()
2778 if (up->capabilities & UART_CAP_AFE) { in serial8250_do_set_termios()
2779 up->mcr &= ~UART_MCR_AFE; in serial8250_do_set_termios()
2780 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2781 up->mcr |= UART_MCR_AFE; in serial8250_do_set_termios()
2785 * Update the per-port timeout. in serial8250_do_set_termios()
2787 uart_update_timeout(port, termios->c_cflag, baud); in serial8250_do_set_termios()
2789 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial8250_do_set_termios()
2790 if (termios->c_iflag & INPCK) in serial8250_do_set_termios()
2791 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; in serial8250_do_set_termios()
2792 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in serial8250_do_set_termios()
2793 port->read_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2798 port->ignore_status_mask = 0; in serial8250_do_set_termios()
2799 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2800 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in serial8250_do_set_termios()
2801 if (termios->c_iflag & IGNBRK) { in serial8250_do_set_termios()
2802 port->ignore_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2807 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2808 port->ignore_status_mask |= UART_LSR_OE; in serial8250_do_set_termios()
2814 if ((termios->c_cflag & CREAD) == 0) in serial8250_do_set_termios()
2815 port->ignore_status_mask |= UART_LSR_DR; in serial8250_do_set_termios()
2820 up->ier &= ~UART_IER_MSI; in serial8250_do_set_termios()
2821 if (!(up->bugs & UART_BUG_NOMSR) && in serial8250_do_set_termios()
2822 UART_ENABLE_MS(&up->port, termios->c_cflag)) in serial8250_do_set_termios()
2823 up->ier |= UART_IER_MSI; in serial8250_do_set_termios()
2824 if (up->capabilities & UART_CAP_UUE) in serial8250_do_set_termios()
2825 up->ier |= UART_IER_UUE; in serial8250_do_set_termios()
2826 if (up->capabilities & UART_CAP_RTOIE) in serial8250_do_set_termios()
2827 up->ier |= UART_IER_RTOIE; in serial8250_do_set_termios()
2829 serial_port_out(port, UART_IER, up->ier); in serial8250_do_set_termios()
2831 if (up->capabilities & UART_CAP_EFR) { in serial8250_do_set_termios()
2835 * - TI16C752 requires control thresholds to be set. in serial8250_do_set_termios()
2836 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled. in serial8250_do_set_termios()
2838 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2842 if (port->flags & UPF_EXAR_EFR) in serial8250_do_set_termios()
2848 serial8250_set_divisor(port, baud, quot, frac); in serial8250_do_set_termios()
2851 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR in serial8250_do_set_termios()
2854 if (port->type == PORT_16750) in serial8250_do_set_termios()
2855 serial_port_out(port, UART_FCR, up->fcr); in serial8250_do_set_termios()
2857 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */ in serial8250_do_set_termios()
2858 if (port->type != PORT_16750) { in serial8250_do_set_termios()
2860 if (up->fcr & UART_FCR_ENABLE_FIFO) in serial8250_do_set_termios()
2862 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */ in serial8250_do_set_termios()
2864 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_set_termios()
2870 tty_termios_encode_baud_rate(termios, baud, baud); in serial8250_do_set_termios()
2878 if (port->set_termios) in serial8250_set_termios()
2879 port->set_termios(port, termios, old); in serial8250_set_termios()
2886 if (termios->c_line == N_PPS) { in serial8250_do_set_ldisc()
2887 port->flags |= UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2892 port->flags &= ~UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2893 if (!UART_ENABLE_MS(port, termios->c_cflag)) { in serial8250_do_set_ldisc()
2905 if (port->set_ldisc) in serial8250_set_ldisc()
2906 port->set_ldisc(port, termios); in serial8250_set_ldisc()
2924 if (port->pm) in serial8250_pm()
2925 port->pm(port, state, oldstate); in serial8250_pm()
2932 if (pt->port.mapsize) in serial8250_port_size()
2933 return pt->port.mapsize; in serial8250_port_size()
2935 return 0x16 << pt->port.regshift; in serial8250_port_size()
2937 return 8 << pt->port.regshift; in serial8250_port_size()
2946 struct uart_port *port = &up->port; in serial8250_request_std_resource()
2949 switch (port->iotype) { in serial8250_request_std_resource()
2956 if (!port->mapbase) { in serial8250_request_std_resource()
2957 ret = -EINVAL; in serial8250_request_std_resource()
2961 if (!request_mem_region(port->mapbase, size, "serial")) { in serial8250_request_std_resource()
2962 ret = -EBUSY; in serial8250_request_std_resource()
2966 if (port->flags & UPF_IOREMAP) { in serial8250_request_std_resource()
2967 port->membase = ioremap(port->mapbase, size); in serial8250_request_std_resource()
2968 if (!port->membase) { in serial8250_request_std_resource()
2969 release_mem_region(port->mapbase, size); in serial8250_request_std_resource()
2970 ret = -ENOMEM; in serial8250_request_std_resource()
2977 if (!request_region(port->iobase, size, "serial")) in serial8250_request_std_resource()
2978 ret = -EBUSY; in serial8250_request_std_resource()
2987 struct uart_port *port = &up->port; in serial8250_release_std_resource()
2989 switch (port->iotype) { in serial8250_release_std_resource()
2996 if (!port->mapbase) in serial8250_release_std_resource()
2999 if (port->flags & UPF_IOREMAP) { in serial8250_release_std_resource()
3000 iounmap(port->membase); in serial8250_release_std_resource()
3001 port->membase = NULL; in serial8250_release_std_resource()
3004 release_mem_region(port->mapbase, size); in serial8250_release_std_resource()
3009 release_region(port->iobase, size); in serial8250_release_std_resource()
3030 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in fcr_get_rxtrig_bytes()
3033 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)]; in fcr_get_rxtrig_bytes()
3035 return bytes ? bytes : -EOPNOTSUPP; in fcr_get_rxtrig_bytes()
3040 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in bytes_to_fcr_rxtrig()
3043 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)]) in bytes_to_fcr_rxtrig()
3044 return -EOPNOTSUPP; in bytes_to_fcr_rxtrig()
3047 if (bytes < conf_type->rxtrig_bytes[i]) in bytes_to_fcr_rxtrig()
3049 return (--i) << UART_FCR_R_TRIG_SHIFT; in bytes_to_fcr_rxtrig()
3058 struct uart_port *uport = state->uart_port; in do_get_rxtrig()
3061 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_get_rxtrig()
3062 return -EINVAL; in do_get_rxtrig()
3071 mutex_lock(&port->mutex); in do_serial8250_get_rxtrig()
3073 mutex_unlock(&port->mutex); in do_serial8250_get_rxtrig()
3094 struct uart_port *uport = state->uart_port; in do_set_rxtrig()
3098 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_set_rxtrig()
3099 return -EINVAL; in do_set_rxtrig()
3106 up->fcr &= ~UART_FCR_TRIGGER_MASK; in do_set_rxtrig()
3107 up->fcr |= (unsigned char)rxtrig; in do_set_rxtrig()
3108 serial_out(up, UART_FCR, up->fcr); in do_set_rxtrig()
3116 mutex_lock(&port->mutex); in do_serial8250_set_rxtrig()
3118 mutex_unlock(&port->mutex); in do_serial8250_set_rxtrig()
3131 return -EINVAL; in rx_trig_bytes_store()
3157 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in register_dev_spec_attr_grp()
3159 if (conf_type->rxtrig_bytes[0]) in register_dev_spec_attr_grp()
3160 up->port.attr_group = &serial8250_dev_attr_group; in register_dev_spec_attr_grp()
3176 if (port->iotype != up->cur_iotype) in serial8250_config_port()
3183 if (port->type == PORT_TEGRA) in serial8250_config_port()
3184 up->bugs |= UART_BUG_NOMSR; in serial8250_config_port()
3186 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) in serial8250_config_port()
3189 if (port->type == PORT_UNKNOWN) in serial8250_config_port()
3193 up->fcr = uart_config[up->port.type].fcr; in serial8250_config_port()
3199 if (ser->irq >= irq_get_nr_irqs() || ser->irq < 0 || in serial8250_verify_port()
3200 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN || in serial8250_verify_port()
3201 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS || in serial8250_verify_port()
3202 ser->type == PORT_STARTECH) in serial8250_verify_port()
3203 return -EINVAL; in serial8250_verify_port()
3209 int type = port->type; in serial8250_type()
3245 struct uart_port *port = &up->port; in serial8250_init_port()
3247 spin_lock_init(&port->lock); in serial8250_init_port()
3248 port->ctrl_id = 0; in serial8250_init_port()
3249 port->pm = NULL; in serial8250_init_port()
3250 port->ops = &serial8250_pops; in serial8250_init_port()
3251 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); in serial8250_init_port()
3253 up->cur_iotype = 0xFF; in serial8250_init_port()
3259 struct uart_port *port = &up->port; in serial8250_set_defaults()
3261 if (up->port.flags & UPF_FIXED_TYPE) { in serial8250_set_defaults()
3262 unsigned int type = up->port.type; in serial8250_set_defaults()
3264 if (!up->port.fifosize) in serial8250_set_defaults()
3265 up->port.fifosize = uart_config[type].fifo_size; in serial8250_set_defaults()
3266 if (!up->tx_loadsz) in serial8250_set_defaults()
3267 up->tx_loadsz = uart_config[type].tx_loadsz; in serial8250_set_defaults()
3268 if (!up->capabilities) in serial8250_set_defaults()
3269 up->capabilities = uart_config[type].flags; in serial8250_set_defaults()
3275 if (up->dma) { in serial8250_set_defaults()
3276 if (!up->dma->tx_dma) in serial8250_set_defaults()
3277 up->dma->tx_dma = serial8250_tx_dma; in serial8250_set_defaults()
3278 if (!up->dma->rx_dma) in serial8250_set_defaults()
3279 up->dma->rx_dma = serial8250_rx_dma; in serial8250_set_defaults()
3295 * Restore serial console when h/w power-off detected
3299 struct uart_port *port = &up->port; in serial8250_console_restore()
3301 unsigned int baud, quot, frac = 0; in serial8250_console_restore() local
3303 termios.c_cflag = port->cons->cflag; in serial8250_console_restore()
3304 termios.c_ispeed = port->cons->ispeed; in serial8250_console_restore()
3305 termios.c_ospeed = port->cons->ospeed; in serial8250_console_restore()
3306 if (port->state->port.tty && termios.c_cflag == 0) { in serial8250_console_restore()
3307 termios.c_cflag = port->state->port.tty->termios.c_cflag; in serial8250_console_restore()
3308 termios.c_ispeed = port->state->port.tty->termios.c_ispeed; in serial8250_console_restore()
3309 termios.c_ospeed = port->state->port.tty->termios.c_ospeed; in serial8250_console_restore()
3312 baud = serial8250_get_baud_rate(port, &termios, NULL); in serial8250_console_restore()
3313 quot = serial8250_get_divisor(port, baud, &frac); in serial8250_console_restore()
3315 serial8250_set_divisor(port, baud, quot, frac); in serial8250_console_restore()
3316 serial_port_out(port, UART_LCR, up->lcr); in serial8250_console_restore()
3317 serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); in serial8250_console_restore()
3331 unsigned int fifosize = up->tx_loadsz; in serial8250_console_fifo_write()
3361 struct uart_8250_em485 *em485 = up->em485; in serial8250_console_write()
3362 struct uart_port *port = &up->port; in serial8250_console_write()
3381 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { in serial8250_console_write()
3383 up->canary = 0; in serial8250_console_write()
3387 if (em485->tx_stopped) in serial8250_console_write()
3388 up->rs485_start_tx(up); in serial8250_console_write()
3389 mdelay(port->rs485.delay_rts_before_send); in serial8250_console_write()
3392 use_fifo = (up->capabilities & UART_CAP_FIFO) && in serial8250_console_write()
3397 !(up->capabilities & UART_CAP_MINI) && in serial8250_console_write()
3401 up->tx_loadsz > 1 && in serial8250_console_write()
3402 (up->fcr & UART_FCR_ENABLE_FIFO) && in serial8250_console_write()
3403 port->state && in serial8250_console_write()
3404 test_bit(TTY_PORT_INITIALIZED, &port->state->port.iflags) && in serial8250_console_write()
3410 !(up->port.flags & UPF_CONS_FLOW); in serial8250_console_write()
3424 mdelay(port->rs485.delay_rts_after_send); in serial8250_console_write()
3425 if (em485->tx_stopped) in serial8250_console_write()
3426 up->rs485_stop_tx(up); in serial8250_console_write()
3438 if (up->msr_saved_flags) in serial8250_console_write()
3457 return (port->uartclk / 16) / quot; in probe_baud()
3462 int baud = 9600; in serial8250_console_setup() local
3468 if (!port->iobase && !port->membase) in serial8250_console_setup()
3469 return -ENODEV; in serial8250_console_setup()
3472 uart_parse_options(options, &baud, &parity, &bits, &flow); in serial8250_console_setup()
3474 baud = probe_baud(port); in serial8250_console_setup()
3476 ret = uart_set_options(port, port->cons, baud, parity, bits, flow); in serial8250_console_setup()
3480 if (port->dev) in serial8250_console_setup()
3481 pm_runtime_get_sync(port->dev); in serial8250_console_setup()
3488 if (port->dev) in serial8250_console_exit()
3489 pm_runtime_put_sync(port->dev); in serial8250_console_exit()
3496 MODULE_DESCRIPTION("Base port operations for 8250/16550-type serial ports");