Lines Matching +full:overrun +full:- +full:throttle +full:- +full:ms
1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
28 #include <linux/dma-mapping.h>
169 return readl(priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_read()
179 struct omap8250_priv *priv = up->port.private_data; in __omap8250_set_mctrl()
184 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in __omap8250_set_mctrl()
191 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in __omap8250_set_mctrl()
192 priv->efr |= UART_EFR_RTS; in __omap8250_set_mctrl()
194 priv->efr &= ~UART_EFR_RTS; in __omap8250_set_mctrl()
195 serial_out(up, UART_EFR, priv->efr); in __omap8250_set_mctrl()
204 err = pm_runtime_resume_and_get(port->dev); in omap8250_set_mctrl()
210 pm_runtime_mark_last_busy(port->dev); in omap8250_set_mctrl()
211 pm_runtime_put_autosuspend(port->dev); in omap8250_set_mctrl()
226 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap_8250_mdr1_errataset()
228 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in omap_8250_mdr1_errataset()
235 unsigned int uartclk = port->uartclk; in omap_8250_get_divisor()
242 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { in omap_8250_get_divisor()
243 priv->quot = port->custom_divisor & UART_DIV_MAX; in omap_8250_get_divisor()
249 if (port->custom_divisor & (1 << 16)) in omap_8250_get_divisor()
250 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
252 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
263 abs_d13 = abs(baud - uartclk / 13 / div_13); in omap_8250_get_divisor()
264 abs_d16 = abs(baud - uartclk / 16 / div_16); in omap_8250_get_divisor()
267 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
268 priv->quot = div_16; in omap_8250_get_divisor()
270 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
271 priv->quot = div_13; in omap_8250_get_divisor()
281 if (old_scr == priv->scr) in omap8250_update_scr()
289 if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) in omap8250_update_scr()
291 priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); in omap8250_update_scr()
292 serial_out(up, UART_OMAP_SCR, priv->scr); in omap8250_update_scr()
298 if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS) in omap8250_update_mdr1()
301 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap8250_update_mdr1()
306 struct omap8250_priv *priv = up->port.private_data; in omap8250_restore_regs()
307 struct uart_8250_dma *dma = up->dma; in omap8250_restore_regs()
311 lockdep_assert_held_once(&up->port.lock); in omap8250_restore_regs()
313 if (dma && dma->tx_running) { in omap8250_restore_regs()
316 * we have a TX-DMA operation in progress then it has been in omap8250_restore_regs()
320 priv->delayed_restore = 1; in omap8250_restore_regs()
329 serial_out(up, UART_FCR, up->fcr); in omap8250_restore_regs()
338 TRIGGER_TLR_MASK(priv->tx_trigger) << UART_TI752_TLR_TX | in omap8250_restore_regs()
339 TRIGGER_TLR_MASK(priv->rx_trigger) << UART_TI752_TLR_RX); in omap8250_restore_regs()
346 serial_out(up, UART_IER, up->ier); in omap8250_restore_regs()
349 serial_dl_write(up, priv->quot); in omap8250_restore_regs()
351 serial_out(up, UART_EFR, priv->efr); in omap8250_restore_regs()
355 serial_out(up, UART_XON1, priv->xon); in omap8250_restore_regs()
356 serial_out(up, UART_XOFF1, priv->xoff); in omap8250_restore_regs()
358 serial_out(up, UART_LCR, up->lcr); in omap8250_restore_regs()
362 __omap8250_set_mctrl(&up->port, up->port.mctrl); in omap8250_restore_regs()
364 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_restore_regs()
366 if (up->port.rs485.flags & SER_RS485_ENABLED && in omap8250_restore_regs()
367 up->port.rs485_config == serial8250_em485_config) in omap8250_restore_regs()
380 struct omap8250_priv *priv = up->port.private_data; in omap_8250_set_termios()
384 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); in omap_8250_set_termios()
386 if (termios->c_cflag & CSTOPB) in omap_8250_set_termios()
388 if (termios->c_cflag & PARENB) in omap_8250_set_termios()
390 if (!(termios->c_cflag & PARODD)) in omap_8250_set_termios()
392 if (termios->c_cflag & CMSPAR) in omap_8250_set_termios()
399 port->uartclk / 16 / UART_DIV_MAX, in omap_8250_set_termios()
400 port->uartclk / 13); in omap_8250_set_termios()
407 pm_runtime_get_sync(port->dev); in omap_8250_set_termios()
411 * Update the per-port timeout. in omap_8250_set_termios()
413 uart_update_timeout(port, termios->c_cflag, baud); in omap_8250_set_termios()
415 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in omap_8250_set_termios()
416 if (termios->c_iflag & INPCK) in omap_8250_set_termios()
417 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in omap_8250_set_termios()
418 if (termios->c_iflag & (IGNBRK | PARMRK)) in omap_8250_set_termios()
419 up->port.read_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
424 up->port.ignore_status_mask = 0; in omap_8250_set_termios()
425 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
426 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in omap_8250_set_termios()
427 if (termios->c_iflag & IGNBRK) { in omap_8250_set_termios()
428 up->port.ignore_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
433 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
434 up->port.ignore_status_mask |= UART_LSR_OE; in omap_8250_set_termios()
440 if ((termios->c_cflag & CREAD) == 0) in omap_8250_set_termios()
441 up->port.ignore_status_mask |= UART_LSR_DR; in omap_8250_set_termios()
446 up->ier &= ~UART_IER_MSI; in omap_8250_set_termios()
447 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in omap_8250_set_termios()
448 up->ier |= UART_IER_MSI; in omap_8250_set_termios()
450 up->lcr = cval; in omap_8250_set_termios()
456 * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt. in omap_8250_set_termios()
457 * - less than RX_TRIGGER number of bytes will also cause an interrupt in omap_8250_set_termios()
459 * - Once THRE is enabled, the interrupt will be fired once the FIFO is in omap_8250_set_termios()
460 * empty - the trigger level is ignored here. in omap_8250_set_termios()
463 * - UART will assert the TX DMA line once there is room for TX_TRIGGER in omap_8250_set_termios()
466 * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in in omap_8250_set_termios()
470 up->fcr = UART_FCR_ENABLE_FIFO; in omap_8250_set_termios()
471 up->fcr |= TRIGGER_FCR_MASK(priv->tx_trigger) << OMAP_UART_FCR_TX_TRIG; in omap_8250_set_termios()
472 up->fcr |= TRIGGER_FCR_MASK(priv->rx_trigger) << OMAP_UART_FCR_RX_TRIG; in omap_8250_set_termios()
474 priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | in omap_8250_set_termios()
477 if (up->dma) in omap_8250_set_termios()
478 priv->scr |= OMAP_UART_SCR_DMAMODE_1 | in omap_8250_set_termios()
481 priv->xon = termios->c_cc[VSTART]; in omap_8250_set_termios()
482 priv->xoff = termios->c_cc[VSTOP]; in omap_8250_set_termios()
484 priv->efr = 0; in omap_8250_set_termios()
485 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in omap_8250_set_termios()
487 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW && in omap_8250_set_termios()
488 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) && in omap_8250_set_termios()
489 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_CTS)) { in omap_8250_set_termios()
491 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in omap_8250_set_termios()
492 priv->efr |= UART_EFR_CTS; in omap_8250_set_termios()
493 } else if (up->port.flags & UPF_SOFT_FLOW) { in omap_8250_set_termios()
504 if (termios->c_iflag & IXOFF) { in omap_8250_set_termios()
505 up->port.status |= UPSTAT_AUTOXOFF; in omap_8250_set_termios()
506 priv->efr |= OMAP_UART_SW_TX; in omap_8250_set_termios()
511 uart_port_unlock_irq(&up->port); in omap_8250_set_termios()
512 pm_runtime_mark_last_busy(port->dev); in omap_8250_set_termios()
513 pm_runtime_put_autosuspend(port->dev); in omap_8250_set_termios()
516 priv->calc_latency = USEC_PER_SEC * 64 * 8 / baud; in omap_8250_set_termios()
517 priv->latency = priv->calc_latency; in omap_8250_set_termios()
519 schedule_work(&priv->qos_work); in omap_8250_set_termios()
533 pm_runtime_get_sync(port->dev); in omap_8250_pm()
550 pm_runtime_mark_last_busy(port->dev); in omap_8250_pm()
551 pm_runtime_put_autosuspend(port->dev); in omap_8250_pm()
585 dev_warn(up->port.dev, in omap_serial_fill_features_erratas()
596 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
599 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
603 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
616 priv->habit &= ~UART_HAS_RHR_IT_DIS; in omap_serial_fill_features_erratas()
624 cpu_latency_qos_update_request(&priv->pm_qos_request, priv->latency); in omap8250_uart_qos_work()
634 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_irq()
635 struct uart_port *port = &up->port; in omap8250_irq()
639 pm_runtime_get_noresume(port->dev); in omap8250_irq()
641 /* Shallow idle state wake-up to an IO interrupt? */ in omap8250_irq()
642 if (atomic_add_unless(&priv->active, 1, 1)) { in omap8250_irq()
643 priv->latency = priv->calc_latency; in omap8250_irq()
644 schedule_work(&priv->qos_work); in omap8250_irq()
648 if (up->dma) { in omap8250_irq()
650 pm_runtime_mark_last_busy(port->dev); in omap8250_irq()
651 pm_runtime_put(port->dev); in omap8250_irq()
666 if (priv->habit & UART_RX_TIMEOUT_QUIRK && in omap8250_irq()
683 /* Stop processing interrupts on input overrun */ in omap8250_irq()
684 if ((lsr & UART_LSR_OE) && up->overrun_backoff_time_ms > 0) { in omap8250_irq()
689 up->ier = port->serial_in(port, UART_IER); in omap8250_irq()
690 if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) { in omap8250_irq()
691 port->ops->stop_rx(port); in omap8250_irq()
694 * the input overrun subsides. in omap8250_irq()
696 cancel_delayed_work(&up->overrun_backoff); in omap8250_irq()
700 delay = msecs_to_jiffies(up->overrun_backoff_time_ms); in omap8250_irq()
701 schedule_delayed_work(&up->overrun_backoff, delay); in omap8250_irq()
704 pm_runtime_mark_last_busy(port->dev); in omap8250_irq()
705 pm_runtime_put(port->dev); in omap8250_irq()
713 struct omap8250_priv *priv = port->private_data; in omap_8250_startup()
714 struct uart_8250_dma *dma = &priv->omap8250_dma; in omap_8250_startup()
717 if (priv->wakeirq) { in omap_8250_startup()
718 ret = dev_pm_set_dedicated_wake_irq(port->dev, priv->wakeirq); in omap_8250_startup()
723 pm_runtime_get_sync(port->dev); in omap_8250_startup()
729 up->lsr_saved_flags = 0; in omap_8250_startup()
730 up->msr_saved_flags = 0; in omap_8250_startup()
733 if (dma->fn && !uart_console(port)) { in omap_8250_startup()
734 up->dma = &priv->omap8250_dma; in omap_8250_startup()
737 dev_warn_ratelimited(port->dev, in omap_8250_startup()
739 up->dma = NULL; in omap_8250_startup()
742 up->dma = NULL; in omap_8250_startup()
747 up->ier = UART_IER_RLSI | UART_IER_RDI; in omap_8250_startup()
748 serial_out(up, UART_IER, up->ier); in omap_8250_startup()
752 up->capabilities |= UART_CAP_RPM; in omap_8250_startup()
756 priv->wer = OMAP_UART_WER_MOD_WKUP; in omap_8250_startup()
757 if (priv->habit & OMAP_UART_WER_HAS_TX_WAKEUP) in omap_8250_startup()
758 priv->wer |= OMAP_UART_TX_WAKEUP_EN; in omap_8250_startup()
759 serial_out(up, UART_OMAP_WER, priv->wer); in omap_8250_startup()
761 if (up->dma && !(priv->habit & UART_HAS_EFR2)) { in omap_8250_startup()
763 up->dma->rx_dma(up); in omap_8250_startup()
767 enable_irq(up->port.irq); in omap_8250_startup()
769 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
770 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
777 struct omap8250_priv *priv = port->private_data; in omap_8250_shutdown()
779 flush_work(&priv->qos_work); in omap_8250_shutdown()
780 if (up->dma) in omap_8250_shutdown()
783 pm_runtime_get_sync(port->dev); in omap_8250_shutdown()
786 if (priv->habit & UART_HAS_EFR2) in omap_8250_shutdown()
791 up->ier = 0; in omap_8250_shutdown()
794 disable_irq_nosync(up->port.irq); in omap_8250_shutdown()
795 dev_pm_clear_wake_irq(port->dev); in omap_8250_shutdown()
798 up->dma = NULL; in omap_8250_shutdown()
803 if (up->lcr & UART_LCR_SBC) in omap_8250_shutdown()
804 serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); in omap_8250_shutdown()
807 pm_runtime_mark_last_busy(port->dev); in omap_8250_shutdown()
808 pm_runtime_put_autosuspend(port->dev); in omap_8250_shutdown()
813 struct omap8250_priv *priv = port->private_data; in omap_8250_throttle()
816 pm_runtime_get_sync(port->dev); in omap_8250_throttle()
819 port->ops->stop_rx(port); in omap_8250_throttle()
820 priv->throttled = true; in omap_8250_throttle()
823 pm_runtime_mark_last_busy(port->dev); in omap_8250_throttle()
824 pm_runtime_put_autosuspend(port->dev); in omap_8250_throttle()
829 struct omap8250_priv *priv = port->private_data; in omap_8250_unthrottle()
833 pm_runtime_get_sync(port->dev); in omap_8250_unthrottle()
837 priv->throttled = false; in omap_8250_unthrottle()
838 if (up->dma) in omap_8250_unthrottle()
839 up->dma->rx_dma(up); in omap_8250_unthrottle()
840 up->ier |= UART_IER_RLSI | UART_IER_RDI; in omap_8250_unthrottle()
841 port->read_status_mask |= UART_LSR_DR; in omap_8250_unthrottle()
842 serial_out(up, UART_IER, up->ier); in omap_8250_unthrottle()
845 pm_runtime_mark_last_busy(port->dev); in omap_8250_unthrottle()
846 pm_runtime_put_autosuspend(port->dev); in omap_8250_unthrottle()
853 struct omap8250_priv *priv = port->private_data; in omap8250_rs485_config()
868 if (priv->quot) { in omap8250_rs485_config()
869 if (priv->mdr1 == UART_OMAP_MDR1_16X_MODE) in omap8250_rs485_config()
870 baud = port->uartclk / (16 * priv->quot); in omap8250_rs485_config()
872 baud = port->uartclk / (13 * priv->quot); in omap8250_rs485_config()
884 if (!(priv->habit & UART_HAS_NATIVE_RS485) || in omap8250_rs485_config()
885 mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) || in omap8250_rs485_config()
886 rs485->delay_rts_after_send > fixed_delay_rts_after_send || in omap8250_rs485_config()
887 rs485->delay_rts_before_send > fixed_delay_rts_before_send) { in omap8250_rs485_config()
888 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
889 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_rs485_config()
891 port->rs485_config = serial8250_em485_config; in omap8250_rs485_config()
895 rs485->delay_rts_after_send = fixed_delay_rts_after_send; in omap8250_rs485_config()
896 rs485->delay_rts_before_send = fixed_delay_rts_before_send; in omap8250_rs485_config()
898 if (rs485->flags & SER_RS485_ENABLED) in omap8250_rs485_config()
899 priv->mdr3 |= UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
901 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
907 if (rs485->flags & SER_RS485_RTS_ON_SEND) in omap8250_rs485_config()
908 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_POL; in omap8250_rs485_config()
910 priv->mdr3 |= UART_OMAP_MDR3_DIR_POL; in omap8250_rs485_config()
912 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_rs485_config()
920 /* Must be called while priv->rx_dma_lock is held */
923 struct uart_8250_dma *dma = p->dma; in __dma_rx_do_complete()
924 struct tty_port *tty_port = &p->port.state->port; in __dma_rx_do_complete()
925 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_do_complete()
926 struct dma_chan *rxchan = dma->rxchan; in __dma_rx_do_complete()
933 if (!dma->rx_running) in __dma_rx_do_complete()
936 cookie = dma->rx_cookie; in __dma_rx_do_complete()
937 dma->rx_running = 0; in __dma_rx_do_complete()
939 /* Re-enable RX FIFO interrupt now that transfer is complete */ in __dma_rx_do_complete()
940 if (priv->habit & UART_HAS_RHR_IT_DIS) { in __dma_rx_do_complete()
948 count = dma->rx_size - state.residue + state.in_flight_bytes; in __dma_rx_do_complete()
949 if (count < dma->rx_size) { in __dma_rx_do_complete()
960 poll_count--) in __dma_rx_do_complete()
963 if (poll_count == -1) in __dma_rx_do_complete()
964 dev_err(p->port.dev, "teardown incomplete\n"); in __dma_rx_do_complete()
969 ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); in __dma_rx_do_complete()
971 p->port.icount.rx += ret; in __dma_rx_do_complete()
972 p->port.icount.buf_overrun += count - ret; in __dma_rx_do_complete()
981 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_complete()
982 struct uart_8250_dma *dma = p->dma; in __dma_rx_complete()
987 uart_port_lock_irqsave(&p->port, &flags); in __dma_rx_complete()
994 if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) != in __dma_rx_complete()
996 uart_port_unlock_irqrestore(&p->port, flags); in __dma_rx_complete()
1000 if (!priv->throttled) { in __dma_rx_complete()
1001 p->ier |= UART_IER_RLSI | UART_IER_RDI; in __dma_rx_complete()
1002 serial_out(p, UART_IER, p->ier); in __dma_rx_complete()
1003 if (!(priv->habit & UART_HAS_EFR2)) in __dma_rx_complete()
1007 uart_port_unlock_irqrestore(&p->port, flags); in __dma_rx_complete()
1012 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma_flush()
1013 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma_flush()
1018 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
1020 if (!dma->rx_running) { in omap_8250_rx_dma_flush()
1021 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
1025 ret = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in omap_8250_rx_dma_flush()
1027 ret = dmaengine_pause(dma->rxchan); in omap_8250_rx_dma_flush()
1029 priv->rx_dma_broken = true; in omap_8250_rx_dma_flush()
1032 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
1037 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma()
1038 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma()
1045 lockdep_assert_held_once(&p->port.lock); in omap_8250_rx_dma()
1047 if (priv->rx_dma_broken) in omap_8250_rx_dma()
1048 return -EINVAL; in omap_8250_rx_dma()
1050 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
1052 if (dma->rx_running) { in omap_8250_rx_dma()
1055 state = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, NULL); in omap_8250_rx_dma()
1061 p->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in omap_8250_rx_dma()
1062 serial_out(p, UART_IER, p->ier); in omap_8250_rx_dma()
1067 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, in omap_8250_rx_dma()
1068 dma->rx_size, DMA_DEV_TO_MEM, in omap_8250_rx_dma()
1071 err = -EBUSY; in omap_8250_rx_dma()
1075 dma->rx_running = 1; in omap_8250_rx_dma()
1076 desc->callback = __dma_rx_complete; in omap_8250_rx_dma()
1077 desc->callback_param = p; in omap_8250_rx_dma()
1079 dma->rx_cookie = dmaengine_submit(desc); in omap_8250_rx_dma()
1086 if (priv->habit & UART_HAS_RHR_IT_DIS) { in omap_8250_rx_dma()
1092 dma_async_issue_pending(dma->rxchan); in omap_8250_rx_dma()
1094 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
1103 struct uart_8250_dma *dma = p->dma; in omap_8250_dma_tx_complete()
1104 struct tty_port *tport = &p->port.state->port; in omap_8250_dma_tx_complete()
1107 struct omap8250_priv *priv = p->port.private_data; in omap_8250_dma_tx_complete()
1109 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in omap_8250_dma_tx_complete()
1112 uart_port_lock_irqsave(&p->port, &flags); in omap_8250_dma_tx_complete()
1114 dma->tx_running = 0; in omap_8250_dma_tx_complete()
1116 uart_xmit_advance(&p->port, dma->tx_size); in omap_8250_dma_tx_complete()
1118 if (priv->delayed_restore) { in omap_8250_dma_tx_complete()
1119 priv->delayed_restore = 0; in omap_8250_dma_tx_complete()
1123 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in omap_8250_dma_tx_complete()
1124 uart_write_wakeup(&p->port); in omap_8250_dma_tx_complete()
1126 if (!kfifo_is_empty(&tport->xmit_fifo) && !uart_tx_stopped(&p->port)) { in omap_8250_dma_tx_complete()
1132 } else if (p->capabilities & UART_CAP_RPM) { in omap_8250_dma_tx_complete()
1137 dma->tx_err = 1; in omap_8250_dma_tx_complete()
1141 uart_port_unlock_irqrestore(&p->port, flags); in omap_8250_dma_tx_complete()
1146 struct uart_8250_dma *dma = p->dma; in omap_8250_tx_dma()
1147 struct omap8250_priv *priv = p->port.private_data; in omap_8250_tx_dma()
1148 struct tty_port *tport = &p->port.state->port; in omap_8250_tx_dma()
1151 int skip_byte = -1; in omap_8250_tx_dma()
1154 if (dma->tx_running) in omap_8250_tx_dma()
1156 if (uart_tx_stopped(&p->port) || kfifo_is_empty(&tport->xmit_fifo)) { in omap_8250_tx_dma()
1163 if (dma->tx_err || p->capabilities & UART_CAP_RPM) { in omap_8250_tx_dma()
1164 ret = -EBUSY; in omap_8250_tx_dma()
1172 ret = kfifo_dma_out_prepare_mapped(&tport->xmit_fifo, &sg, 1, in omap_8250_tx_dma()
1173 UART_XMIT_SIZE, dma->tx_addr); in omap_8250_tx_dma()
1179 dma->tx_size = sg_dma_len(&sg); in omap_8250_tx_dma()
1181 if (priv->habit & OMAP_DMA_TX_KICK) { in omap_8250_tx_dma()
1201 if (tx_lvl == p->tx_loadsz) { in omap_8250_tx_dma()
1202 ret = -EBUSY; in omap_8250_tx_dma()
1205 if (dma->tx_size < 4) { in omap_8250_tx_dma()
1206 ret = -EINVAL; in omap_8250_tx_dma()
1209 if (!kfifo_get(&tport->xmit_fifo, &c)) { in omap_8250_tx_dma()
1210 ret = -EINVAL; in omap_8250_tx_dma()
1215 kfifo_dma_out_prepare_mapped(&tport->xmit_fifo, &sg, 1, in omap_8250_tx_dma()
1216 UART_XMIT_SIZE, dma->tx_addr); in omap_8250_tx_dma()
1219 desc = dmaengine_prep_slave_sg(dma->txchan, &sg, 1, DMA_MEM_TO_DEV, in omap_8250_tx_dma()
1222 ret = -EBUSY; in omap_8250_tx_dma()
1226 dma->tx_running = 1; in omap_8250_tx_dma()
1228 desc->callback = omap_8250_dma_tx_complete; in omap_8250_tx_dma()
1229 desc->callback_param = p; in omap_8250_tx_dma()
1231 dma->tx_cookie = dmaengine_submit(desc); in omap_8250_tx_dma()
1233 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, in omap_8250_tx_dma()
1236 dma_async_issue_pending(dma->txchan); in omap_8250_tx_dma()
1237 if (dma->tx_err) in omap_8250_tx_dma()
1238 dma->tx_err = 0; in omap_8250_tx_dma()
1244 dma->tx_err = 1; in omap_8250_tx_dma()
1280 lockdep_assert_held_once(&up->port.lock); in am654_8250_handle_rx_dma()
1286 (up->ier & UART_IER_RDI)) { in am654_8250_handle_rx_dma()
1293 * periodic timeouts, re-enable interrupts. in am654_8250_handle_rx_dma()
1295 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in am654_8250_handle_rx_dma()
1296 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1300 up->ier |= UART_IER_RLSI | UART_IER_RDI; in am654_8250_handle_rx_dma()
1301 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1308 * use the default routine in the non-DMA case and this one for with DMA.
1313 struct omap8250_priv *priv = up->port.private_data; in omap_8250_dma_handle_irq()
1327 if (priv->habit & UART_HAS_EFR2) in omap_8250_dma_handle_irq()
1334 if (status & UART_LSR_THRE && up->dma->tx_err) { in omap_8250_dma_handle_irq()
1335 if (uart_tx_stopped(&up->port) || in omap_8250_dma_handle_irq()
1336 kfifo_is_empty(&up->port.state->port.xmit_fifo)) { in omap_8250_dma_handle_irq()
1337 up->dma->tx_err = 0; in omap_8250_dma_handle_irq()
1363 return -EINVAL; in omap_8250_rx_dma()
1403 { .compatible = "ti,am654-uart", .data = &am654_platdata, },
1404 { .compatible = "ti,omap2-uart" },
1405 { .compatible = "ti,omap3-uart" },
1406 { .compatible = "ti,omap4-uart", .data = &omap4_platdata, },
1407 { .compatible = "ti,am3352-uart", .data = &am33xx_platdata, },
1408 { .compatible = "ti,am4372-uart", .data = &am33xx_platdata, },
1409 { .compatible = "ti,dra742-uart", .data = &omap4_platdata, },
1416 struct device_node *np = pdev->dev.of_node; in omap8250_probe()
1426 dev_err(&pdev->dev, "missing registers\n"); in omap8250_probe()
1427 return -EINVAL; in omap8250_probe()
1430 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in omap8250_probe()
1432 return -ENOMEM; in omap8250_probe()
1434 membase = devm_ioremap(&pdev->dev, regs->start, in omap8250_probe()
1437 return -ENODEV; in omap8250_probe()
1440 up.port.dev = &pdev->dev; in omap8250_probe()
1441 up.port.mapbase = regs->start; in omap8250_probe()
1471 up.port.throttle = omap_8250_throttle; in omap8250_probe()
1490 clk = devm_clk_get(&pdev->dev, NULL); in omap8250_probe()
1492 if (PTR_ERR(clk) == -EPROBE_DEFER) in omap8250_probe()
1493 return -EPROBE_DEFER; in omap8250_probe()
1499 if (of_property_read_u32(np, "overrun-throttle-ms", in omap8250_probe()
1503 pdata = of_device_get_match_data(&pdev->dev); in omap8250_probe()
1505 priv->habit |= pdata->habit; in omap8250_probe()
1509 dev_warn(&pdev->dev, in omap8250_probe()
1514 priv->membase = membase; in omap8250_probe()
1515 priv->line = -ENODEV; in omap8250_probe()
1516 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1517 priv->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1518 cpu_latency_qos_add_request(&priv->pm_qos_request, priv->latency); in omap8250_probe()
1519 INIT_WORK(&priv->qos_work, omap8250_uart_qos_work); in omap8250_probe()
1521 spin_lock_init(&priv->rx_dma_lock); in omap8250_probe()
1525 device_set_wakeup_capable(&pdev->dev, true); in omap8250_probe()
1526 if (of_property_read_bool(np, "wakeup-source")) in omap8250_probe()
1527 device_set_wakeup_enable(&pdev->dev, true); in omap8250_probe()
1529 pm_runtime_enable(&pdev->dev); in omap8250_probe()
1530 pm_runtime_use_autosuspend(&pdev->dev); in omap8250_probe()
1535 * prevent an unsafe default policy with lossy characters on wake-up. in omap8250_probe()
1539 if (!of_get_available_child_count(pdev->dev.of_node)) in omap8250_probe()
1540 pm_runtime_set_autosuspend_delay(&pdev->dev, -1); in omap8250_probe()
1542 pm_runtime_get_sync(&pdev->dev); in omap8250_probe()
1546 priv->rx_trigger = RX_TRIGGER; in omap8250_probe()
1547 priv->tx_trigger = TX_TRIGGER; in omap8250_probe()
1557 ret = of_property_count_strings(np, "dma-names"); in omap8250_probe()
1560 struct uart_8250_dma *dma = &priv->omap8250_dma; in omap8250_probe()
1562 dma->fn = the_no_dma_filter_fn; in omap8250_probe()
1563 dma->tx_dma = omap_8250_tx_dma; in omap8250_probe()
1564 dma->rx_dma = omap_8250_rx_dma; in omap8250_probe()
1566 dma_params = pdata->dma_params; in omap8250_probe()
1569 dma->rx_size = dma_params->rx_size; in omap8250_probe()
1570 dma->rxconf.src_maxburst = dma_params->rx_trigger; in omap8250_probe()
1571 dma->txconf.dst_maxburst = dma_params->tx_trigger; in omap8250_probe()
1572 priv->rx_trigger = dma_params->rx_trigger; in omap8250_probe()
1573 priv->tx_trigger = dma_params->tx_trigger; in omap8250_probe()
1575 dma->rx_size = RX_TRIGGER; in omap8250_probe()
1576 dma->rxconf.src_maxburst = RX_TRIGGER; in omap8250_probe()
1577 dma->txconf.dst_maxburst = TX_TRIGGER; in omap8250_probe()
1583 ret = devm_request_irq(&pdev->dev, up.port.irq, omap8250_irq, 0, in omap8250_probe()
1584 dev_name(&pdev->dev), priv); in omap8250_probe()
1588 priv->wakeirq = irq_of_parse_and_map(np, 1); in omap8250_probe()
1592 dev_err(&pdev->dev, "unable to register 8250 port\n"); in omap8250_probe()
1595 priv->line = ret; in omap8250_probe()
1596 pm_runtime_mark_last_busy(&pdev->dev); in omap8250_probe()
1597 pm_runtime_put_autosuspend(&pdev->dev); in omap8250_probe()
1600 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_probe()
1601 pm_runtime_put_sync(&pdev->dev); in omap8250_probe()
1602 flush_work(&priv->qos_work); in omap8250_probe()
1603 pm_runtime_disable(&pdev->dev); in omap8250_probe()
1604 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_probe()
1614 err = pm_runtime_resume_and_get(&pdev->dev); in omap8250_remove()
1616 dev_err(&pdev->dev, "Failed to resume hardware\n"); in omap8250_remove()
1618 up = serial8250_get_port(priv->line); in omap8250_remove()
1619 omap_8250_shutdown(&up->port); in omap8250_remove()
1620 serial8250_unregister_port(priv->line); in omap8250_remove()
1621 priv->line = -ENODEV; in omap8250_remove()
1622 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_remove()
1623 pm_runtime_put_sync(&pdev->dev); in omap8250_remove()
1624 flush_work(&priv->qos_work); in omap8250_remove()
1625 pm_runtime_disable(&pdev->dev); in omap8250_remove()
1626 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_remove()
1627 device_set_wakeup_capable(&pdev->dev, false); in omap8250_remove()
1636 priv->is_suspending = true; in omap8250_prepare()
1646 priv->is_suspending = false; in omap8250_complete()
1652 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_suspend()
1655 serial8250_suspend_port(priv->line); in omap8250_suspend()
1661 priv->wer = 0; in omap8250_suspend()
1662 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_suspend()
1663 if (uart_console(&up->port) && console_suspend_enabled) in omap8250_suspend()
1665 flush_work(&priv->qos_work); in omap8250_suspend()
1673 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_resume()
1676 if (uart_console(&up->port) && console_suspend_enabled) { in omap8250_resume()
1682 serial8250_resume_port(priv->line); in omap8250_resume()
1707 writel(val, priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_write()
1741 } while (--timeout && !(syss & OMAP_UART_SYSS_RESETDONE)); in omap8250_soft_reset()
1745 return -ETIMEDOUT; in omap8250_soft_reset()
1756 if (priv->line >= 0) in omap8250_runtime_suspend()
1757 up = serial8250_get_port(priv->line); in omap8250_runtime_suspend()
1759 if (priv->habit & UART_ERRATA_CLOCK_DISABLE) { in omap8250_runtime_suspend()
1770 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_runtime_suspend()
1774 if (up && up->dma && up->dma->rxchan) in omap8250_runtime_suspend()
1777 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_runtime_suspend()
1778 schedule_work(&priv->qos_work); in omap8250_runtime_suspend()
1779 atomic_set(&priv->active, 0); in omap8250_runtime_suspend()
1790 if (atomic_read(&priv->active)) in omap8250_runtime_resume()
1793 if (priv->line >= 0) in omap8250_runtime_resume()
1794 up = serial8250_get_port(priv->line); in omap8250_runtime_resume()
1797 uart_port_lock_irq(&up->port); in omap8250_runtime_resume()
1799 uart_port_unlock_irq(&up->port); in omap8250_runtime_resume()
1802 if (up && up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) { in omap8250_runtime_resume()
1803 uart_port_lock_irq(&up->port); in omap8250_runtime_resume()
1805 uart_port_unlock_irq(&up->port); in omap8250_runtime_resume()
1808 atomic_set(&priv->active, 1); in omap8250_runtime_resume()
1809 priv->latency = priv->calc_latency; in omap8250_runtime_resume()
1810 schedule_work(&priv->qos_work); in omap8250_runtime_resume()
1833 idx = *omap_str - '0'; in omap8250_console_fixup()