Lines Matching +full:rx +full:- +full:port +full:- +full:mapping
1 // SPDX-License-Identifier: GPL-2.0+
3 * 8250_dma.c - DMA Engine API support for 8250.c
10 #include <linux/dma-mapping.h>
17 struct uart_8250_dma *dma = p->dma;
18 struct tty_port *tport = &p->port.state->port;
22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
25 uart_port_lock_irqsave(&p->port, &flags);
27 dma->tx_running = 0;
29 uart_xmit_advance(&p->port, dma->tx_size);
31 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
32 uart_write_wakeup(&p->port);
35 if (ret || !dma->tx_running)
38 uart_port_unlock_irqrestore(&p->port, flags);
43 struct uart_8250_dma *dma = p->dma;
44 struct tty_port *tty_port = &p->port.state->port;
50 * New DMA Rx can be started during the completion handler before it
51 * could acquire port's lock and it might still be ongoing. Don't to
54 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
58 count = dma->rx_size - state.residue;
60 tty_insert_flip_string(tty_port, dma->rx_buf, count);
61 p->port.icount.rx += count;
62 dma->rx_running = 0;
70 struct uart_8250_dma *dma = p->dma;
73 uart_port_lock_irqsave(&p->port, &flags);
74 if (dma->rx_running)
79 * changes dma->rx_running.
81 if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))
82 p->dma->rx_dma(p);
83 uart_port_unlock_irqrestore(&p->port, flags);
88 struct uart_8250_dma *dma = p->dma;
89 struct tty_port *tport = &p->port.state->port;
91 struct uart_port *up = &p->port;
97 if (dma->tx_running) {
98 if (up->x_char) {
99 dmaengine_pause(dma->txchan);
101 dmaengine_resume(dma->txchan);
104 } else if (up->x_char) {
108 if (uart_tx_stopped(&p->port) || kfifo_is_empty(&tport->xmit_fifo)) {
117 ret = kfifo_dma_out_prepare_mapped(&tport->xmit_fifo, sgl, ARRAY_SIZE(sgl),
118 UART_XMIT_SIZE, dma->tx_addr);
120 dma->tx_size = 0;
123 dma->tx_size += sg_dma_len(sg);
125 desc = dmaengine_prep_slave_sg(dma->txchan, sgl, ret,
129 ret = -EBUSY;
133 dma->tx_running = 1;
134 desc->callback = __dma_tx_complete;
135 desc->callback_param = p;
137 dma->tx_cookie = dmaengine_submit(desc);
139 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
142 dma_async_issue_pending(dma->txchan);
144 dma->tx_err = 0;
148 dma->tx_err = 1;
154 struct uart_8250_dma *dma = p->dma;
156 if (!dma->tx_running)
163 dma->tx_size = 0;
165 dmaengine_terminate_async(dma->txchan);
170 struct uart_8250_dma *dma = p->dma;
173 if (dma->rx_running)
178 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
179 dma->rx_size, DMA_DEV_TO_MEM,
182 return -EBUSY;
184 dma->rx_running = 1;
185 desc->callback = dma_rx_complete;
186 desc->callback_param = p;
188 dma->rx_cookie = dmaengine_submit(desc);
190 dma_async_issue_pending(dma->rxchan);
197 struct uart_8250_dma *dma = p->dma;
199 if (dma->rx_running) {
200 dmaengine_pause(dma->rxchan);
202 dmaengine_terminate_async(dma->rxchan);
209 struct uart_8250_dma *dma = p->dma;
210 phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
211 dma->rx_dma_addr : p->port.mapbase;
212 phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
213 dma->tx_dma_addr : p->port.mapbase;
219 dma->rxconf.direction = DMA_DEV_TO_MEM;
220 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
221 dma->rxconf.src_addr = rx_dma_addr + UART_RX;
223 dma->txconf.direction = DMA_MEM_TO_DEV;
224 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
225 dma->txconf.dst_addr = tx_dma_addr + UART_TX;
230 /* Get a channel for RX */
231 dma->rxchan = dma_request_slave_channel_compat(mask,
232 dma->fn, dma->rx_param,
233 p->port.dev, "rx");
234 if (!dma->rxchan)
235 return -ENODEV;
237 /* 8250 rx dma requires dmaengine driver to support pause/terminate */
238 ret = dma_get_slave_caps(dma->rxchan, &caps);
243 ret = -EINVAL;
247 dmaengine_slave_config(dma->rxchan, &dma->rxconf);
250 dma->txchan = dma_request_slave_channel_compat(mask,
251 dma->fn, dma->tx_param,
252 p->port.dev, "tx");
253 if (!dma->txchan) {
254 ret = -ENODEV;
259 ret = dma_get_slave_caps(dma->txchan, &caps);
263 ret = -EINVAL;
267 dmaengine_slave_config(dma->txchan, &dma->txconf);
269 /* RX buffer */
270 if (!dma->rx_size)
271 dma->rx_size = PAGE_SIZE;
273 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
274 &dma->rx_addr, GFP_KERNEL);
275 if (!dma->rx_buf) {
276 ret = -ENOMEM;
281 dma->tx_addr = dma_map_single(dma->txchan->device->dev,
282 p->port.state->port.xmit_buf,
285 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
286 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
287 dma->rx_buf, dma->rx_addr);
288 ret = -ENOMEM;
292 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
296 dma_release_channel(dma->txchan);
298 dma_release_channel(dma->rxchan);
305 struct uart_8250_dma *dma = p->dma;
310 /* Release RX resources */
311 dmaengine_terminate_sync(dma->rxchan);
312 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
313 dma->rx_addr);
314 dma_release_channel(dma->rxchan);
315 dma->rxchan = NULL;
318 dmaengine_terminate_sync(dma->txchan);
319 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
321 dma_release_channel(dma->txchan);
322 dma->txchan = NULL;
323 dma->tx_running = 0;
325 dev_dbg_ratelimited(p->port.dev, "dma channels released\n");