Lines Matching +full:0 +full:x1c8
19 #define THERMCTL_LEVEL0_GROUP_CPU 0x0
20 #define THERMCTL_LEVEL0_GROUP_GPU 0x4
21 #define THERMCTL_LEVEL0_GROUP_MEM 0x8
22 #define THERMCTL_LEVEL0_GROUP_TSENSE 0xc
25 #define SENSOR_CONFIG2_THERMA_MASK (0xffff << 16)
27 #define SENSOR_CONFIG2_THERMB_MASK 0xffff
28 #define SENSOR_CONFIG2_THERMB_SHIFT 0
30 #define THERMCTL_THERMTRIP_CTL 0x80
33 #define THERMCTL_INTR_ENABLE 0x88
34 #define THERMCTL_INTR_DISABLE 0x8c
35 #define TH_INTR_UP_DN_EN 0x3
39 #define THERM_IRQ_TSENSE_MASK (TH_INTR_UP_DN_EN << 0)
41 #define SENSOR_PDIV 0x1c0
42 #define SENSOR_PDIV_CPU_MASK (0xf << 12)
43 #define SENSOR_PDIV_GPU_MASK (0xf << 8)
44 #define SENSOR_PDIV_MEM_MASK (0xf << 4)
45 #define SENSOR_PDIV_PLLX_MASK (0xf << 0)
47 #define SENSOR_HOTSPOT_OFF 0x1c4
48 #define SENSOR_HOTSPOT_CPU_MASK (0xff << 16)
49 #define SENSOR_HOTSPOT_GPU_MASK (0xff << 8)
50 #define SENSOR_HOTSPOT_MEM_MASK (0xff << 0)
52 #define SENSOR_TEMP1 0x1c8
53 #define SENSOR_TEMP1_CPU_TEMP_MASK (0xffff << 16)
54 #define SENSOR_TEMP1_GPU_TEMP_MASK 0xffff
55 #define SENSOR_TEMP2 0x1cc
56 #define SENSOR_TEMP2_MEM_TEMP_MASK (0xffff << 16)
57 #define SENSOR_TEMP2_PLLX_TEMP_MASK 0xffff
68 * @pllx_hotspot_diff: hotspot offset from the PLLX sensor, must be 0 for