Lines Matching +full:spi +full:- +full:sck +full:- +full:cs +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012 - 2014 Allwinner Tech
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
41 #define SUN6I_TFR_CTL_CS(cs) (((cs) << 4) & SUN6I_TFR_CTL_CS_MASK) argument
119 return readl(sspi->base_addr + reg); in sun6i_spi_read()
124 writel(value, sspi->base_addr + reg); in sun6i_spi_write()
157 while (len--) { in sun6i_spi_drain_fifo()
158 byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); in sun6i_spi_drain_fifo()
159 if (sspi->rx_buf) in sun6i_spi_drain_fifo()
160 *sspi->rx_buf++ = byte; in sun6i_spi_drain_fifo()
171 cnt = sspi->cfg->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi); in sun6i_spi_fill_fifo()
173 len = min((int)cnt, sspi->len); in sun6i_spi_fill_fifo()
175 while (len--) { in sun6i_spi_fill_fifo()
176 byte = sspi->tx_buf ? *sspi->tx_buf++ : 0; in sun6i_spi_fill_fifo()
177 writeb(byte, sspi->base_addr + SUN6I_TXDATA_REG); in sun6i_spi_fill_fifo()
178 sspi->len--; in sun6i_spi_fill_fifo()
182 static void sun6i_spi_set_cs(struct spi_device *spi, bool enable) in sun6i_spi_set_cs() argument
184 struct sun6i_spi *sspi = spi_controller_get_devdata(spi->controller); in sun6i_spi_set_cs()
189 reg |= SUN6I_TFR_CTL_CS(spi_get_chipselect(spi, 0)); in sun6i_spi_set_cs()
199 static size_t sun6i_spi_max_transfer_size(struct spi_device *spi) in sun6i_spi_max_transfer_size() argument
201 return SUN6I_MAX_XFER_SIZE - 1; in sun6i_spi_max_transfer_size()
208 complete(&sspi->dma_rx_done); in sun6i_spi_dma_rx_cb()
215 struct spi_controller *host = sspi->host; in sun6i_spi_prepare_dma()
218 if (tfr->rx_buf) { in sun6i_spi_prepare_dma()
221 .src_addr = sspi->dma_addr_rx, in sun6i_spi_prepare_dma()
226 dmaengine_slave_config(host->dma_rx, &rxconf); in sun6i_spi_prepare_dma()
228 rxdesc = dmaengine_prep_slave_sg(host->dma_rx, in sun6i_spi_prepare_dma()
229 tfr->rx_sg.sgl, in sun6i_spi_prepare_dma()
230 tfr->rx_sg.nents, in sun6i_spi_prepare_dma()
234 return -EINVAL; in sun6i_spi_prepare_dma()
235 rxdesc->callback_param = sspi; in sun6i_spi_prepare_dma()
236 rxdesc->callback = sun6i_spi_dma_rx_cb; in sun6i_spi_prepare_dma()
240 if (tfr->tx_buf) { in sun6i_spi_prepare_dma()
243 .dst_addr = sspi->dma_addr_tx, in sun6i_spi_prepare_dma()
248 dmaengine_slave_config(host->dma_tx, &txconf); in sun6i_spi_prepare_dma()
250 txdesc = dmaengine_prep_slave_sg(host->dma_tx, in sun6i_spi_prepare_dma()
251 tfr->tx_sg.sgl, in sun6i_spi_prepare_dma()
252 tfr->tx_sg.nents, in sun6i_spi_prepare_dma()
257 dmaengine_terminate_sync(host->dma_rx); in sun6i_spi_prepare_dma()
258 return -EINVAL; in sun6i_spi_prepare_dma()
262 if (tfr->rx_buf) { in sun6i_spi_prepare_dma()
264 dma_async_issue_pending(host->dma_rx); in sun6i_spi_prepare_dma()
267 if (tfr->tx_buf) { in sun6i_spi_prepare_dma()
269 dma_async_issue_pending(host->dma_tx); in sun6i_spi_prepare_dma()
276 struct spi_device *spi, in sun6i_spi_transfer_one() argument
289 if (tfr->len > SUN6I_MAX_XFER_SIZE) in sun6i_spi_transfer_one()
290 return -EINVAL; in sun6i_spi_transfer_one()
292 reinit_completion(&sspi->done); in sun6i_spi_transfer_one()
293 reinit_completion(&sspi->dma_rx_done); in sun6i_spi_transfer_one()
294 sspi->tx_buf = tfr->tx_buf; in sun6i_spi_transfer_one()
295 sspi->rx_buf = tfr->rx_buf; in sun6i_spi_transfer_one()
296 sspi->len = tfr->len; in sun6i_spi_transfer_one()
297 use_dma = host->can_dma ? host->can_dma(host, spi, tfr) : false; in sun6i_spi_transfer_one()
313 * SPI controller. (See spi-sun4i.c) in sun6i_spi_transfer_one()
315 trig_level = sspi->cfg->fifo_depth / 4 * 3; in sun6i_spi_transfer_one()
322 trig_level = sspi->cfg->fifo_depth / 2; in sun6i_spi_transfer_one()
324 if (tfr->tx_buf) in sun6i_spi_transfer_one()
326 if (tfr->rx_buf) in sun6i_spi_transfer_one()
341 if (spi->mode & SPI_CPOL) in sun6i_spi_transfer_one()
346 if (spi->mode & SPI_CPHA) in sun6i_spi_transfer_one()
351 if (spi->mode & SPI_LSB_FIRST) in sun6i_spi_transfer_one()
360 if (sspi->rx_buf) { in sun6i_spi_transfer_one()
362 rx_len = tfr->len; in sun6i_spi_transfer_one()
372 if (sspi->cfg->has_clk_ctl) { in sun6i_spi_transfer_one()
373 unsigned int mclk_rate = clk_get_rate(sspi->mclk); in sun6i_spi_transfer_one()
376 if (mclk_rate < (2 * tfr->speed_hz)) { in sun6i_spi_transfer_one()
377 clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); in sun6i_spi_transfer_one()
378 mclk_rate = clk_get_rate(sspi->mclk); in sun6i_spi_transfer_one()
395 div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz); in sun6i_spi_transfer_one()
398 reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS; in sun6i_spi_transfer_one()
399 tfr->effective_speed_hz = mclk_rate / (2 * div_cdr2); in sun6i_spi_transfer_one()
403 tfr->effective_speed_hz = mclk_rate / (1 << div); in sun6i_spi_transfer_one()
408 clk_set_rate(sspi->mclk, tfr->speed_hz); in sun6i_spi_transfer_one()
409 tfr->effective_speed_hz = clk_get_rate(sspi->mclk); in sun6i_spi_transfer_one()
416 * - normal sample mode : CLK <= 24MHz SDM=1 SDC=0 in sun6i_spi_transfer_one()
417 * - delay half-cycle sample mode : CLK <= 40MHz SDM=0 SDC=0 in sun6i_spi_transfer_one()
418 * - delay one-cycle sample mode : CLK >= 80MHz SDM=0 SDC=1 in sun6i_spi_transfer_one()
423 if (tfr->effective_speed_hz <= 24000000) in sun6i_spi_transfer_one()
425 else if (tfr->effective_speed_hz >= 80000000) in sun6i_spi_transfer_one()
431 /* Finally enable the bus - doing so before might raise SCK to HIGH */ in sun6i_spi_transfer_one()
437 if (sspi->tx_buf) { in sun6i_spi_transfer_one()
438 tx_len = tfr->len; in sun6i_spi_transfer_one()
439 nbits = tfr->tx_nbits; in sun6i_spi_transfer_one()
440 } else if (tfr->rx_buf) { in sun6i_spi_transfer_one()
441 nbits = tfr->rx_nbits; in sun6i_spi_transfer_one()
458 sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, tfr->len); in sun6i_spi_transfer_one()
467 dev_warn(&host->dev, in sun6i_spi_transfer_one()
469 dev_name(&spi->dev), ret); in sun6i_spi_transfer_one()
478 if (rx_len > sspi->cfg->fifo_depth) in sun6i_spi_transfer_one()
480 if (tx_len > sspi->cfg->fifo_depth) in sun6i_spi_transfer_one()
492 time_left = wait_for_completion_timeout(&sspi->done, in sun6i_spi_transfer_one()
503 time_left = wait_for_completion_timeout(&sspi->dma_rx_done, in sun6i_spi_transfer_one()
506 dev_warn(&host->dev, "RX DMA timeout\n"); in sun6i_spi_transfer_one()
512 dev_warn(&host->dev, in sun6i_spi_transfer_one()
514 dev_name(&spi->dev), tfr->len, tfr->speed_hz, in sun6i_spi_transfer_one()
515 jiffies_to_msecs(end - start), tx_time); in sun6i_spi_transfer_one()
516 ret = -ETIMEDOUT; in sun6i_spi_transfer_one()
522 dmaengine_terminate_sync(host->dma_rx); in sun6i_spi_transfer_one()
523 dmaengine_terminate_sync(host->dma_tx); in sun6i_spi_transfer_one()
537 complete(&sspi->done); in sun6i_spi_handler()
553 if (!sspi->len) in sun6i_spi_handler()
557 /* Only clear the interrupt _after_ re-seeding the FIFO */ in sun6i_spi_handler()
572 ret = clk_prepare_enable(sspi->hclk); in sun6i_spi_runtime_resume()
578 ret = clk_prepare_enable(sspi->mclk); in sun6i_spi_runtime_resume()
584 ret = reset_control_deassert(sspi->rstc); in sun6i_spi_runtime_resume()
596 clk_disable_unprepare(sspi->mclk); in sun6i_spi_runtime_resume()
598 clk_disable_unprepare(sspi->hclk); in sun6i_spi_runtime_resume()
608 reset_control_assert(sspi->rstc); in sun6i_spi_runtime_suspend()
609 clk_disable_unprepare(sspi->mclk); in sun6i_spi_runtime_suspend()
610 clk_disable_unprepare(sspi->hclk); in sun6i_spi_runtime_suspend()
616 struct spi_device *spi, in sun6i_spi_can_dma() argument
622 * If the number of spi words to transfer is less or equal than in sun6i_spi_can_dma()
626 return xfer->len > sspi->cfg->fifo_depth; in sun6i_spi_can_dma()
636 host = spi_alloc_host(&pdev->dev, sizeof(struct sun6i_spi)); in sun6i_spi_probe()
638 dev_err(&pdev->dev, "Unable to allocate SPI Host\n"); in sun6i_spi_probe()
639 return -ENOMEM; in sun6i_spi_probe()
645 sspi->base_addr = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); in sun6i_spi_probe()
646 if (IS_ERR(sspi->base_addr)) { in sun6i_spi_probe()
647 ret = PTR_ERR(sspi->base_addr); in sun6i_spi_probe()
653 ret = -ENXIO; in sun6i_spi_probe()
657 ret = devm_request_irq(&pdev->dev, irq, sun6i_spi_handler, in sun6i_spi_probe()
658 0, "sun6i-spi", sspi); in sun6i_spi_probe()
660 dev_err(&pdev->dev, "Cannot request IRQ\n"); in sun6i_spi_probe()
664 sspi->host = host; in sun6i_spi_probe()
665 sspi->cfg = of_device_get_match_data(&pdev->dev); in sun6i_spi_probe()
667 host->max_speed_hz = 100 * 1000 * 1000; in sun6i_spi_probe()
668 host->min_speed_hz = 3 * 1000; in sun6i_spi_probe()
669 host->use_gpio_descriptors = true; in sun6i_spi_probe()
670 host->set_cs = sun6i_spi_set_cs; in sun6i_spi_probe()
671 host->transfer_one = sun6i_spi_transfer_one; in sun6i_spi_probe()
672 host->num_chipselect = 4; in sun6i_spi_probe()
673 host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST | in sun6i_spi_probe()
674 sspi->cfg->mode_bits; in sun6i_spi_probe()
675 host->bits_per_word_mask = SPI_BPW_MASK(8); in sun6i_spi_probe()
676 host->dev.of_node = pdev->dev.of_node; in sun6i_spi_probe()
677 host->auto_runtime_pm = true; in sun6i_spi_probe()
678 host->max_transfer_size = sun6i_spi_max_transfer_size; in sun6i_spi_probe()
680 sspi->hclk = devm_clk_get(&pdev->dev, "ahb"); in sun6i_spi_probe()
681 if (IS_ERR(sspi->hclk)) { in sun6i_spi_probe()
682 dev_err(&pdev->dev, "Unable to acquire AHB clock\n"); in sun6i_spi_probe()
683 ret = PTR_ERR(sspi->hclk); in sun6i_spi_probe()
687 sspi->mclk = devm_clk_get(&pdev->dev, "mod"); in sun6i_spi_probe()
688 if (IS_ERR(sspi->mclk)) { in sun6i_spi_probe()
689 dev_err(&pdev->dev, "Unable to acquire module clock\n"); in sun6i_spi_probe()
690 ret = PTR_ERR(sspi->mclk); in sun6i_spi_probe()
694 init_completion(&sspi->done); in sun6i_spi_probe()
695 init_completion(&sspi->dma_rx_done); in sun6i_spi_probe()
697 sspi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); in sun6i_spi_probe()
698 if (IS_ERR(sspi->rstc)) { in sun6i_spi_probe()
699 dev_err(&pdev->dev, "Couldn't get reset controller\n"); in sun6i_spi_probe()
700 ret = PTR_ERR(sspi->rstc); in sun6i_spi_probe()
704 host->dma_tx = dma_request_chan(&pdev->dev, "tx"); in sun6i_spi_probe()
705 if (IS_ERR(host->dma_tx)) { in sun6i_spi_probe()
707 if (PTR_ERR(host->dma_tx) == -EPROBE_DEFER) { in sun6i_spi_probe()
708 ret = -EPROBE_DEFER; in sun6i_spi_probe()
711 dev_warn(&pdev->dev, "Failed to request TX DMA channel\n"); in sun6i_spi_probe()
712 host->dma_tx = NULL; in sun6i_spi_probe()
715 host->dma_rx = dma_request_chan(&pdev->dev, "rx"); in sun6i_spi_probe()
716 if (IS_ERR(host->dma_rx)) { in sun6i_spi_probe()
717 if (PTR_ERR(host->dma_rx) == -EPROBE_DEFER) { in sun6i_spi_probe()
718 ret = -EPROBE_DEFER; in sun6i_spi_probe()
721 dev_warn(&pdev->dev, "Failed to request RX DMA channel\n"); in sun6i_spi_probe()
722 host->dma_rx = NULL; in sun6i_spi_probe()
725 if (host->dma_tx && host->dma_rx) { in sun6i_spi_probe()
726 sspi->dma_addr_tx = mem->start + SUN6I_TXDATA_REG; in sun6i_spi_probe()
727 sspi->dma_addr_rx = mem->start + SUN6I_RXDATA_REG; in sun6i_spi_probe()
728 host->can_dma = sun6i_spi_can_dma; in sun6i_spi_probe()
732 * This wake-up/shutdown pattern is to be able to have the in sun6i_spi_probe()
735 ret = sun6i_spi_runtime_resume(&pdev->dev); in sun6i_spi_probe()
737 dev_err(&pdev->dev, "Couldn't resume the device\n"); in sun6i_spi_probe()
741 pm_runtime_set_autosuspend_delay(&pdev->dev, SUN6I_AUTOSUSPEND_TIMEOUT); in sun6i_spi_probe()
742 pm_runtime_use_autosuspend(&pdev->dev); in sun6i_spi_probe()
743 pm_runtime_set_active(&pdev->dev); in sun6i_spi_probe()
744 pm_runtime_enable(&pdev->dev); in sun6i_spi_probe()
746 ret = devm_spi_register_controller(&pdev->dev, host); in sun6i_spi_probe()
748 dev_err(&pdev->dev, "cannot register SPI host\n"); in sun6i_spi_probe()
755 pm_runtime_disable(&pdev->dev); in sun6i_spi_probe()
756 sun6i_spi_runtime_suspend(&pdev->dev); in sun6i_spi_probe()
758 if (host->dma_rx) in sun6i_spi_probe()
759 dma_release_channel(host->dma_rx); in sun6i_spi_probe()
761 if (host->dma_tx) in sun6i_spi_probe()
762 dma_release_channel(host->dma_tx); in sun6i_spi_probe()
772 pm_runtime_force_suspend(&pdev->dev); in sun6i_spi_remove()
774 if (host->dma_tx) in sun6i_spi_remove()
775 dma_release_channel(host->dma_tx); in sun6i_spi_remove()
776 if (host->dma_rx) in sun6i_spi_remove()
777 dma_release_channel(host->dma_rx); in sun6i_spi_remove()
796 { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg },
797 { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg },
799 .compatible = "allwinner,sun50i-r329-spi",
815 .name = "sun6i-spi",
823 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
824 MODULE_DESCRIPTION("Allwinner A31 SPI controller driver");