Lines Matching +full:tx +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
18 #define DRIVER_NAME "rockchip-spi"
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
179 const void *tx; member
189 u32 freq; member
196 bool cs_high_supported; /* native CS supports active-high polarity */
203 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
212 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_TARGET_TX_BUSY) && in wait_for_tx_idle()
213 !((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))) in wait_for_tx_idle()
216 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) in wait_for_tx_idle()
221 dev_warn(rs->dev, "spi controller is in busy state!\n"); in wait_for_tx_idle()
228 ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); in get_fifo_len()
241 struct spi_controller *ctlr = spi->controller; in rockchip_spi_set_cs()
243 bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; in rockchip_spi_set_cs()
247 * SPI subsystem tries to avoid no-op calls that would break the PM in rockchip_spi_set_cs()
249 * To detect this case we read it here and bail out early for no-ops. in rockchip_spi_set_cs()
252 cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & 1); in rockchip_spi_set_cs()
254 cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & in rockchip_spi_set_cs()
261 pm_runtime_get_sync(rs->dev); in rockchip_spi_set_cs()
264 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
266 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
270 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
272 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
276 pm_runtime_put(rs->dev); in rockchip_spi_set_cs()
286 * this also flushes both rx and tx fifos in rockchip_spi_handle_err()
291 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_handle_err()
292 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_handle_err()
294 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_handle_err()
295 dmaengine_terminate_async(ctlr->dma_tx); in rockchip_spi_handle_err()
297 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_handle_err()
298 dmaengine_terminate_async(ctlr->dma_rx); in rockchip_spi_handle_err()
303 u32 tx_free = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR); in rockchip_spi_pio_writer()
304 u32 words = min(rs->tx_left, tx_free); in rockchip_spi_pio_writer()
306 rs->tx_left -= words; in rockchip_spi_pio_writer()
307 for (; words; words--) { in rockchip_spi_pio_writer()
310 if (rs->n_bytes == 1) in rockchip_spi_pio_writer()
311 txw = *(u8 *)rs->tx; in rockchip_spi_pio_writer()
313 txw = *(u16 *)rs->tx; in rockchip_spi_pio_writer()
315 writel_relaxed(txw, rs->regs + ROCKCHIP_SPI_TXDR); in rockchip_spi_pio_writer()
316 rs->tx += rs->n_bytes; in rockchip_spi_pio_writer()
322 u32 words = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_pio_reader()
323 u32 rx_left = (rs->rx_left > words) ? rs->rx_left - words : 0; in rockchip_spi_pio_reader()
331 u32 ftl = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFTLR) + 1; in rockchip_spi_pio_reader()
335 words = rs->rx_left - rx_left; in rockchip_spi_pio_reader()
339 rs->rx_left = rx_left; in rockchip_spi_pio_reader()
340 for (; words; words--) { in rockchip_spi_pio_reader()
341 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_pio_reader()
343 if (!rs->rx) in rockchip_spi_pio_reader()
346 if (rs->n_bytes == 1) in rockchip_spi_pio_reader()
347 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_pio_reader()
349 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_pio_reader()
350 rs->rx += rs->n_bytes; in rockchip_spi_pio_reader()
360 if (rs->cs_inactive && readl_relaxed(rs->regs + ROCKCHIP_SPI_IMR) & INT_CS_INACTIVE) { in rockchip_spi_isr()
361 ctlr->target_abort(ctlr); in rockchip_spi_isr()
362 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
363 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
368 if (rs->tx_left) in rockchip_spi_isr()
372 if (!rs->rx_left) { in rockchip_spi_isr()
374 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
375 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
386 rs->tx = xfer->tx_buf; in rockchip_spi_prepare_irq()
387 rs->rx = xfer->rx_buf; in rockchip_spi_prepare_irq()
388 rs->tx_left = rs->tx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_prepare_irq()
389 rs->rx_left = xfer->len / rs->n_bytes; in rockchip_spi_prepare_irq()
391 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_prepare_irq()
395 if (rs->tx_left) in rockchip_spi_prepare_irq()
398 if (rs->cs_inactive) in rockchip_spi_prepare_irq()
399 writel_relaxed(INT_RF_FULL | INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
401 writel_relaxed(INT_RF_FULL, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
411 int state = atomic_fetch_andnot(RXDMA, &rs->state); in rockchip_spi_dma_rxcb()
413 if (state & TXDMA && !rs->target_abort) in rockchip_spi_dma_rxcb()
416 if (rs->cs_inactive) in rockchip_spi_dma_rxcb()
417 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_dma_rxcb()
427 int state = atomic_fetch_andnot(TXDMA, &rs->state); in rockchip_spi_dma_txcb()
429 if (state & RXDMA && !rs->target_abort) in rockchip_spi_dma_txcb()
433 wait_for_tx_idle(rs, ctlr->target); in rockchip_spi_dma_txcb()
457 atomic_set(&rs->state, 0); in rockchip_spi_prepare_dma()
459 rs->tx = xfer->tx_buf; in rockchip_spi_prepare_dma()
460 rs->rx = xfer->rx_buf; in rockchip_spi_prepare_dma()
463 if (xfer->rx_buf) { in rockchip_spi_prepare_dma()
466 .src_addr = rs->dma_addr_rx, in rockchip_spi_prepare_dma()
467 .src_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
468 .src_maxburst = rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes), in rockchip_spi_prepare_dma()
471 dmaengine_slave_config(ctlr->dma_rx, &rxconf); in rockchip_spi_prepare_dma()
474 ctlr->dma_rx, in rockchip_spi_prepare_dma()
475 xfer->rx_sg.sgl, xfer->rx_sg.nents, in rockchip_spi_prepare_dma()
478 return -EINVAL; in rockchip_spi_prepare_dma()
480 rxdesc->callback = rockchip_spi_dma_rxcb; in rockchip_spi_prepare_dma()
481 rxdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
485 if (xfer->tx_buf) { in rockchip_spi_prepare_dma()
488 .dst_addr = rs->dma_addr_tx, in rockchip_spi_prepare_dma()
489 .dst_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
490 .dst_maxburst = rs->fifo_len / 4, in rockchip_spi_prepare_dma()
493 dmaengine_slave_config(ctlr->dma_tx, &txconf); in rockchip_spi_prepare_dma()
496 ctlr->dma_tx, in rockchip_spi_prepare_dma()
497 xfer->tx_sg.sgl, xfer->tx_sg.nents, in rockchip_spi_prepare_dma()
501 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_prepare_dma()
502 return -EINVAL; in rockchip_spi_prepare_dma()
505 txdesc->callback = rockchip_spi_dma_txcb; in rockchip_spi_prepare_dma()
506 txdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
509 /* rx must be started before tx due to spi instinct */ in rockchip_spi_prepare_dma()
511 atomic_or(RXDMA, &rs->state); in rockchip_spi_prepare_dma()
512 ctlr->dma_rx->cookie = dmaengine_submit(rxdesc); in rockchip_spi_prepare_dma()
513 dma_async_issue_pending(ctlr->dma_rx); in rockchip_spi_prepare_dma()
516 if (rs->cs_inactive) in rockchip_spi_prepare_dma()
517 writel_relaxed(INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_dma()
522 atomic_or(TXDMA, &rs->state); in rockchip_spi_prepare_dma()
524 dma_async_issue_pending(ctlr->dma_tx); in rockchip_spi_prepare_dma()
544 rs->target_abort = false; in rockchip_spi_config()
546 cr0 |= rs->rsd << CR0_RSD_OFFSET; in rockchip_spi_config()
547 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; in rockchip_spi_config()
548 if (spi->mode & SPI_LSB_FIRST) in rockchip_spi_config()
550 if (spi->mode & SPI_CS_HIGH) in rockchip_spi_config()
553 if (xfer->rx_buf && xfer->tx_buf) in rockchip_spi_config()
555 else if (xfer->rx_buf) in rockchip_spi_config()
560 switch (xfer->bits_per_word) { in rockchip_spi_config()
563 cr1 = xfer->len - 1; in rockchip_spi_config()
567 cr1 = xfer->len - 1; in rockchip_spi_config()
571 cr1 = xfer->len / 2 - 1; in rockchip_spi_config()
575 * ctlr->bits_per_word_mask, so this shouldn't in rockchip_spi_config()
578 dev_err(rs->dev, "unknown bits per word: %d\n", in rockchip_spi_config()
579 xfer->bits_per_word); in rockchip_spi_config()
580 return -EINVAL; in rockchip_spi_config()
584 if (xfer->tx_buf) in rockchip_spi_config()
586 if (xfer->rx_buf) in rockchip_spi_config()
590 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_config()
591 writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1); in rockchip_spi_config()
597 if ((xfer->len / rs->n_bytes) < rs->fifo_len) in rockchip_spi_config()
598 writel_relaxed(xfer->len / rs->n_bytes - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
600 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
602 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR); in rockchip_spi_config()
603 writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1, in rockchip_spi_config()
604 rs->regs + ROCKCHIP_SPI_DMARDLR); in rockchip_spi_config()
605 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
611 writel_relaxed(2 * DIV_ROUND_UP(rs->freq, 2 * xfer->speed_hz), in rockchip_spi_config()
612 rs->regs + ROCKCHIP_SPI_BAUDR); in rockchip_spi_config()
630 if (atomic_read(&rs->state) & RXDMA) { in rockchip_spi_target_abort()
631 dmaengine_pause(ctlr->dma_rx); in rockchip_spi_target_abort()
632 status = dmaengine_tx_status(ctlr->dma_rx, ctlr->dma_rx->cookie, &state); in rockchip_spi_target_abort()
634 rs->rx = rs->xfer->rx_buf; in rockchip_spi_target_abort()
635 rs->xfer->len = 0; in rockchip_spi_target_abort()
636 rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_target_abort()
637 for (; rx_fifo_left; rx_fifo_left--) in rockchip_spi_target_abort()
638 readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_target_abort()
641 rs->rx += rs->xfer->len - rs->n_bytes * state.residue; in rockchip_spi_target_abort()
645 /* Get the valid data left in rx fifo and set rs->xfer->len real rx size */ in rockchip_spi_target_abort()
646 if (rs->rx) { in rockchip_spi_target_abort()
647 rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_target_abort()
648 for (; rx_fifo_left; rx_fifo_left--) { in rockchip_spi_target_abort()
649 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_target_abort()
651 if (rs->n_bytes == 1) in rockchip_spi_target_abort()
652 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_target_abort()
654 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_target_abort()
655 rs->rx += rs->n_bytes; in rockchip_spi_target_abort()
657 rs->xfer->len = (unsigned int)(rs->rx - rs->xfer->rx_buf); in rockchip_spi_target_abort()
661 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_target_abort()
662 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_target_abort()
663 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_target_abort()
664 dmaengine_terminate_sync(ctlr->dma_tx); in rockchip_spi_target_abort()
665 atomic_set(&rs->state, 0); in rockchip_spi_target_abort()
667 rs->target_abort = true; in rockchip_spi_target_abort()
683 if (!xfer->len) { in rockchip_spi_transfer_one()
688 WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && in rockchip_spi_transfer_one()
689 (readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)); in rockchip_spi_transfer_one()
691 if (!xfer->tx_buf && !xfer->rx_buf) { in rockchip_spi_transfer_one()
692 dev_err(rs->dev, "No buffer for transfer\n"); in rockchip_spi_transfer_one()
693 return -EINVAL; in rockchip_spi_transfer_one()
696 if (xfer->len > ROCKCHIP_SPI_MAX_TRANLEN) { in rockchip_spi_transfer_one()
697 dev_err(rs->dev, "Transfer is too long (%d)\n", xfer->len); in rockchip_spi_transfer_one()
698 return -EINVAL; in rockchip_spi_transfer_one()
701 rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_transfer_one()
702 rs->xfer = xfer; in rockchip_spi_transfer_one()
703 use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; in rockchip_spi_transfer_one()
705 ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->target); in rockchip_spi_transfer_one()
720 unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_can_dma()
726 return xfer->len / bytes_per_word >= rs->fifo_len; in rockchip_spi_can_dma()
731 struct rockchip_spi *rs = spi_controller_get_devdata(spi->controller); in rockchip_spi_setup()
734 if (!spi_get_csgpiod(spi, 0) && (spi->mode & SPI_CS_HIGH) && !rs->cs_high_supported) { in rockchip_spi_setup()
735 dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); in rockchip_spi_setup()
736 return -EINVAL; in rockchip_spi_setup()
739 pm_runtime_get_sync(rs->dev); in rockchip_spi_setup()
741 cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
744 cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET); in rockchip_spi_setup()
745 if (spi->mode & SPI_CS_HIGH && spi_get_chipselect(spi, 0) <= 1) in rockchip_spi_setup()
750 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
752 pm_runtime_put(rs->dev); in rockchip_spi_setup()
759 struct device_node *np = pdev->dev.of_node; in rockchip_spi_probe()
767 target_mode = of_property_read_bool(np, "spi-slave"); in rockchip_spi_probe()
770 ctlr = spi_alloc_target(&pdev->dev, sizeof(struct rockchip_spi)); in rockchip_spi_probe()
772 ctlr = spi_alloc_host(&pdev->dev, sizeof(struct rockchip_spi)); in rockchip_spi_probe()
775 return -ENOMEM; in rockchip_spi_probe()
782 rs->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); in rockchip_spi_probe()
783 if (IS_ERR(rs->regs)) { in rockchip_spi_probe()
784 ret = PTR_ERR(rs->regs); in rockchip_spi_probe()
788 rs->apb_pclk = devm_clk_get_enabled(&pdev->dev, "apb_pclk"); in rockchip_spi_probe()
789 if (IS_ERR(rs->apb_pclk)) { in rockchip_spi_probe()
790 ret = dev_err_probe(&pdev->dev, PTR_ERR(rs->apb_pclk), in rockchip_spi_probe()
795 rs->spiclk = devm_clk_get_enabled(&pdev->dev, "spiclk"); in rockchip_spi_probe()
796 if (IS_ERR(rs->spiclk)) { in rockchip_spi_probe()
797 ret = dev_err_probe(&pdev->dev, PTR_ERR(rs->spiclk), in rockchip_spi_probe()
808 ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL, in rockchip_spi_probe()
809 IRQF_ONESHOT, dev_name(&pdev->dev), ctlr); in rockchip_spi_probe()
813 rs->dev = &pdev->dev; in rockchip_spi_probe()
814 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_probe()
816 if (!of_property_read_u32(pdev->dev.of_node, "rx-sample-delay-ns", in rockchip_spi_probe()
819 u32 rsd = DIV_ROUND_CLOSEST(rsd_nsecs * (rs->freq >> 8), 1000000000 >> 8); in rockchip_spi_probe()
821 dev_warn(rs->dev, "%u Hz are too slow to express %u ns delay\n", in rockchip_spi_probe()
822 rs->freq, rsd_nsecs); in rockchip_spi_probe()
825 dev_warn(rs->dev, in rockchip_spi_probe()
827 rs->freq, rsd_nsecs, CR0_RSD_MAX * 1000000000U / rs->freq); in rockchip_spi_probe()
829 rs->rsd = rsd; in rockchip_spi_probe()
832 rs->fifo_len = get_fifo_len(rs); in rockchip_spi_probe()
833 if (!rs->fifo_len) { in rockchip_spi_probe()
834 ret = dev_err_probe(&pdev->dev, -EINVAL, "Failed to get fifo length\n"); in rockchip_spi_probe()
838 pm_runtime_set_autosuspend_delay(&pdev->dev, ROCKCHIP_AUTOSUSPEND_TIMEOUT); in rockchip_spi_probe()
839 pm_runtime_use_autosuspend(&pdev->dev); in rockchip_spi_probe()
840 pm_runtime_set_active(&pdev->dev); in rockchip_spi_probe()
841 pm_runtime_enable(&pdev->dev); in rockchip_spi_probe()
843 ctlr->auto_runtime_pm = true; in rockchip_spi_probe()
844 ctlr->bus_num = pdev->id; in rockchip_spi_probe()
845 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; in rockchip_spi_probe()
847 ctlr->mode_bits |= SPI_NO_CS; in rockchip_spi_probe()
848 ctlr->target_abort = rockchip_spi_target_abort; in rockchip_spi_probe()
850 ctlr->flags = SPI_CONTROLLER_GPIO_SS; in rockchip_spi_probe()
851 ctlr->max_native_cs = ROCKCHIP_SPI_MAX_NATIVE_CS_NUM; in rockchip_spi_probe()
854 * if num-cs is missing in the dts, default to 1 in rockchip_spi_probe()
856 if (of_property_read_u32(np, "num-cs", &num_cs)) in rockchip_spi_probe()
858 ctlr->num_chipselect = num_cs; in rockchip_spi_probe()
859 ctlr->use_gpio_descriptors = true; in rockchip_spi_probe()
861 ctlr->dev.of_node = pdev->dev.of_node; in rockchip_spi_probe()
862 ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4); in rockchip_spi_probe()
863 ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX; in rockchip_spi_probe()
864 ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT); in rockchip_spi_probe()
866 ctlr->setup = rockchip_spi_setup; in rockchip_spi_probe()
867 ctlr->set_cs = rockchip_spi_set_cs; in rockchip_spi_probe()
868 ctlr->transfer_one = rockchip_spi_transfer_one; in rockchip_spi_probe()
869 ctlr->max_transfer_size = rockchip_spi_max_transfer_size; in rockchip_spi_probe()
870 ctlr->handle_err = rockchip_spi_handle_err; in rockchip_spi_probe()
872 ctlr->dma_tx = dma_request_chan(rs->dev, "tx"); in rockchip_spi_probe()
873 if (IS_ERR(ctlr->dma_tx)) { in rockchip_spi_probe()
874 /* Check tx to see if we need to defer driver probing */ in rockchip_spi_probe()
875 ret = dev_warn_probe(rs->dev, PTR_ERR(ctlr->dma_tx), in rockchip_spi_probe()
876 "Failed to request optional TX DMA channel\n"); in rockchip_spi_probe()
877 if (ret == -EPROBE_DEFER) in rockchip_spi_probe()
879 ctlr->dma_tx = NULL; in rockchip_spi_probe()
882 ctlr->dma_rx = dma_request_chan(rs->dev, "rx"); in rockchip_spi_probe()
883 if (IS_ERR(ctlr->dma_rx)) { in rockchip_spi_probe()
885 ret = dev_warn_probe(rs->dev, PTR_ERR(ctlr->dma_rx), in rockchip_spi_probe()
887 if (ret == -EPROBE_DEFER) in rockchip_spi_probe()
889 ctlr->dma_rx = NULL; in rockchip_spi_probe()
892 if (ctlr->dma_tx && ctlr->dma_rx) { in rockchip_spi_probe()
893 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR; in rockchip_spi_probe()
894 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR; in rockchip_spi_probe()
895 ctlr->can_dma = rockchip_spi_can_dma; in rockchip_spi_probe()
898 switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) { in rockchip_spi_probe()
900 rs->cs_high_supported = true; in rockchip_spi_probe()
901 ctlr->mode_bits |= SPI_CS_HIGH; in rockchip_spi_probe()
902 if (ctlr->can_dma && target_mode) in rockchip_spi_probe()
903 rs->cs_inactive = true; in rockchip_spi_probe()
905 rs->cs_inactive = false; in rockchip_spi_probe()
908 rs->cs_inactive = false; in rockchip_spi_probe()
912 ret = devm_spi_register_controller(&pdev->dev, ctlr); in rockchip_spi_probe()
914 dev_err(&pdev->dev, "Failed to register controller\n"); in rockchip_spi_probe()
921 if (ctlr->dma_rx) in rockchip_spi_probe()
922 dma_release_channel(ctlr->dma_rx); in rockchip_spi_probe()
924 if (ctlr->dma_tx) in rockchip_spi_probe()
925 dma_release_channel(ctlr->dma_tx); in rockchip_spi_probe()
927 pm_runtime_disable(&pdev->dev); in rockchip_spi_probe()
938 pm_runtime_get_sync(&pdev->dev); in rockchip_spi_remove()
940 pm_runtime_put_noidle(&pdev->dev); in rockchip_spi_remove()
941 pm_runtime_disable(&pdev->dev); in rockchip_spi_remove()
942 pm_runtime_set_suspended(&pdev->dev); in rockchip_spi_remove()
944 if (ctlr->dma_tx) in rockchip_spi_remove()
945 dma_release_channel(ctlr->dma_tx); in rockchip_spi_remove()
946 if (ctlr->dma_rx) in rockchip_spi_remove()
947 dma_release_channel(ctlr->dma_rx); in rockchip_spi_remove()
994 clk_disable_unprepare(rs->spiclk); in rockchip_spi_runtime_suspend()
995 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_suspend()
1006 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_runtime_resume()
1010 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_runtime_resume()
1012 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_resume()
1025 { .compatible = "rockchip,px30-spi", },
1026 { .compatible = "rockchip,rk3036-spi", },
1027 { .compatible = "rockchip,rk3066-spi", },
1028 { .compatible = "rockchip,rk3188-spi", },
1029 { .compatible = "rockchip,rk3228-spi", },
1030 { .compatible = "rockchip,rk3288-spi", },
1031 { .compatible = "rockchip,rk3308-spi", },
1032 { .compatible = "rockchip,rk3328-spi", },
1033 { .compatible = "rockchip,rk3368-spi", },
1034 { .compatible = "rockchip,rk3399-spi", },
1035 { .compatible = "rockchip,rv1108-spi", },
1036 { .compatible = "rockchip,rv1126-spi", },
1053 MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>");