224 static int pci1xxxx_check_spi_can_dma(struct pci1xxxx_spi *spi_bus, int hw_inst, int num_vector)  in pci1xxxx_check_spi_can_dma()  argument
226 	struct pci_dev *pdev = spi_bus->dev;  in pci1xxxx_check_spi_can_dma()
238 	ret = pci1xxxx_acquire_sys_lock(spi_bus);  in pci1xxxx_check_spi_can_dma()
244 	regval = readl(spi_bus->reg_base + DEV_REV_REG);  in pci1xxxx_check_spi_can_dma()
245 	spi_bus->dev_rev = regval & DEV_REV_MASK;  in pci1xxxx_check_spi_can_dma()
246 	if (spi_bus->dev_rev >= 0xC0) {  in pci1xxxx_check_spi_can_dma()
247 		regval = readl(spi_bus->reg_base +  in pci1xxxx_check_spi_can_dma()
252 	pci1xxxx_release_sys_lock(spi_bus);  in pci1xxxx_check_spi_can_dma()
258 	if (spi_bus->dev_rev < 0xC0 || pf_num)  in pci1xxxx_check_spi_can_dma()
261 	spi_bus->dma_offset_bar = pcim_iomap(pdev, 2, pci_resource_len(pdev, 2));  in pci1xxxx_check_spi_can_dma()
262 	if (!spi_bus->dma_offset_bar) {  in pci1xxxx_check_spi_can_dma()
269 		pcim_iounmap(pdev, spi_bus->dma_offset_bar);  in pci1xxxx_check_spi_can_dma()
270 		spi_bus->dma_offset_bar = NULL;  in pci1xxxx_check_spi_can_dma()
277 static void pci1xxxx_spi_dma_config(struct pci1xxxx_spi *spi_bus)  in pci1xxxx_spi_dma_config()  argument
285 	irq_index = spi_bus->total_hw_instances;  in pci1xxxx_spi_dma_config()
286 	for (iter = 0; iter < spi_bus->total_hw_instances; iter++) {  in pci1xxxx_spi_dma_config()
287 		spi_sub_ptr = spi_bus->spi_int[iter];  in pci1xxxx_spi_dma_config()
290 			writel(msi.address_hi, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
292 			writel(msi.address_hi, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
294 			writel(msi.address_hi, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
296 			writel(msi.address_hi, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
298 			writel(msi.address_lo, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
300 			writel(msi.address_lo, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
302 			writel(msi.address_lo, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
304 			writel(msi.address_lo, spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
306 			writel(0, spi_bus->dma_offset_bar + SPI_DMA_INTR_WR_IMWR_DATA);  in pci1xxxx_spi_dma_config()
307 			writel(0, spi_bus->dma_offset_bar + SPI_DMA_INTR_RD_IMWR_DATA);  in pci1xxxx_spi_dma_config()
309 		regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_WR_IMWR_DATA);  in pci1xxxx_spi_dma_config()
311 		writel((regval | (data << (iter * 16))), spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
313 		regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_WR_IMWR_DATA);  in pci1xxxx_spi_dma_config()
317 		regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_RD_IMWR_DATA);  in pci1xxxx_spi_dma_config()
318 		writel(regval | (data << (iter * 16)), spi_bus->dma_offset_bar +  in pci1xxxx_spi_dma_config()
320 		regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_RD_IMWR_DATA);  in pci1xxxx_spi_dma_config()
325 static int pci1xxxx_spi_dma_init(struct pci1xxxx_spi *spi_bus, int hw_inst, int num_vector)  in pci1xxxx_spi_dma_init()  argument
332 	ret = pci1xxxx_check_spi_can_dma(spi_bus, hw_inst, num_vector);  in pci1xxxx_spi_dma_init()
336 	spin_lock_init(&spi_bus->dma_rd_reg_lock);  in pci1xxxx_spi_dma_init()
337 	spin_lock_init(&spi_bus->dma_wr_reg_lock);  in pci1xxxx_spi_dma_init()
338 	writel(SPI_DMA_ENGINE_EN, spi_bus->dma_offset_bar + SPI_DMA_GLOBAL_WR_ENGINE_EN);  in pci1xxxx_spi_dma_init()
339 	writel(SPI_DMA_ENGINE_EN, spi_bus->dma_offset_bar + SPI_DMA_GLOBAL_RD_ENGINE_EN);  in pci1xxxx_spi_dma_init()
342 		spi_sub_ptr = spi_bus->spi_int[iter];  in pci1xxxx_spi_dma_init()
343 		spi_sub_ptr->irq[1] = pci_irq_vector(spi_bus->dev, irq_index);  in pci1xxxx_spi_dma_init()
344 		ret = devm_request_irq(&spi_bus->dev->dev, spi_sub_ptr->irq[1],  in pci1xxxx_spi_dma_init()
346 				       pci_name(spi_bus->dev), spi_sub_ptr);  in pci1xxxx_spi_dma_init()
352 		spi_sub_ptr->irq[2] = pci_irq_vector(spi_bus->dev, irq_index);  in pci1xxxx_spi_dma_init()
353 		ret = devm_request_irq(&spi_bus->dev->dev, spi_sub_ptr->irq[2],  in pci1xxxx_spi_dma_init()
355 				       pci_name(spi_bus->dev), spi_sub_ptr);  in pci1xxxx_spi_dma_init()
361 	pci1xxxx_spi_dma_config(spi_bus);  in pci1xxxx_spi_dma_init()
362 	dma_set_max_seg_size(&spi_bus->dev->dev, PCI1XXXX_SPI_BUFFER_SIZE);  in pci1xxxx_spi_dma_init()
363 	spi_bus->can_dma = true;  in pci1xxxx_spi_dma_init()
805 	struct pci1xxxx_spi *spi_bus;  in pci1xxxx_spi_probe()  local
818 	spi_bus = devm_kzalloc(&pdev->dev,  in pci1xxxx_spi_probe()
819 			       struct_size(spi_bus, spi_int, hw_inst_cnt),  in pci1xxxx_spi_probe()
821 	if (!spi_bus)  in pci1xxxx_spi_probe()
824 	spi_bus->dev = pdev;  in pci1xxxx_spi_probe()
825 	spi_bus->total_hw_instances = hw_inst_cnt;  in pci1xxxx_spi_probe()
829 		spi_bus->spi_int[iter] = devm_kzalloc(&pdev->dev,  in pci1xxxx_spi_probe()
832 		if (!spi_bus->spi_int[iter])  in pci1xxxx_spi_probe()
834 		spi_sub_ptr = spi_bus->spi_int[iter];  in pci1xxxx_spi_probe()
839 		spi_sub_ptr->parent = spi_bus;  in pci1xxxx_spi_probe()
851 			spi_bus->reg_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));  in pci1xxxx_spi_probe()
852 			if (!spi_bus->reg_base)  in pci1xxxx_spi_probe()
864 			regval = readl(spi_bus->reg_base +  in pci1xxxx_spi_probe()
867 			writel(regval, spi_bus->reg_base +  in pci1xxxx_spi_probe()
879 						       pci_name(pdev), spi_bus);  in pci1xxxx_spi_probe()
887 			regval = readl(spi_bus->reg_base + SPI_PCI_CTRL_REG_OFFSET(0));  in pci1xxxx_spi_probe()
893 			writel(regval, spi_bus->reg_base + SPI_PCI_CTRL_REG_OFFSET(0));  in pci1xxxx_spi_probe()
901 			regval = readl(spi_bus->reg_base +  in pci1xxxx_spi_probe()
904 			writel(regval, spi_bus->reg_base +  in pci1xxxx_spi_probe()
936 	ret = pci1xxxx_spi_dma_init(spi_bus, hw_inst_cnt, num_vector);  in pci1xxxx_spi_probe()
940 	pci_set_drvdata(pdev, spi_bus);  in pci1xxxx_spi_probe()