1 // SPDX-License-Identifier: GPL-2.0
3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver
6 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
7 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
9 // Some parts are based on spi-orion.c:
11 //   Copyright (C) 2007-2008 Marvell Ltd.
21 #include <linux/spi/spi.h>
23 #define DRIVER_NAME		"spi-mt7621"
65 static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)  in spidev_to_mt7621_spi()  argument
67 	return spi_controller_get_devdata(spi->controller);  in spidev_to_mt7621_spi()
72 	return ioread32(rs->base + reg);  in mt7621_spi_read()
77 	iowrite32(val, rs->base + reg);  in mt7621_spi_write()
80 static void mt7621_spi_set_native_cs(struct spi_device *spi, bool enable)  in mt7621_spi_set_native_cs()  argument
82 	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);  in mt7621_spi_set_native_cs()
83 	int cs = spi_get_chipselect(spi, 0);  in mt7621_spi_set_native_cs()
84 	bool active = spi->mode & SPI_CS_HIGH ? enable : !enable;  in mt7621_spi_set_native_cs()
89 	 * Select SPI device 7, enable "more buffer mode" and disable  in mt7621_spi_set_native_cs()
90 	 * full-duplex (only half-duplex really works on this chip  in mt7621_spi_set_native_cs()
98 	rs->pending_write = 0;  in mt7621_spi_set_native_cs()
105 static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)  in mt7621_spi_prepare()  argument
107 	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);  in mt7621_spi_prepare()
111 	dev_dbg(&spi->dev, "speed:%u\n", speed);  in mt7621_spi_prepare()
113 	rate = DIV_ROUND_UP(rs->sys_freq, speed);  in mt7621_spi_prepare()
114 	dev_dbg(&spi->dev, "rate-1:%u\n", rate);  in mt7621_spi_prepare()
117 		return -EINVAL;  in mt7621_spi_prepare()
124 	reg |= (rate - 2) << MASTER_RS_CLK_SEL_SHIFT;  in mt7621_spi_prepare()
125 	rs->speed = speed;  in mt7621_spi_prepare()
128 	if (spi->mode & SPI_LSB_FIRST)  in mt7621_spi_prepare()
132 	 * This SPI controller seems to be tested on SPI flash only and some  in mt7621_spi_prepare()
133 	 * bits are swizzled under other SPI modes probably due to incorrect  in mt7621_spi_prepare()
157 	return -ETIMEDOUT;  in mt7621_spi_wait_till_ready()
164 	struct spi_device *spi = m->spi;  in mt7621_spi_prepare_message()  local
165 	unsigned int speed = spi->max_speed_hz;  in mt7621_spi_prepare_message()
170 	list_for_each_entry(t, &m->transfers, transfer_list)  in mt7621_spi_prepare_message()
171 		if (t->speed_hz < speed)  in mt7621_spi_prepare_message()
172 			speed = t->speed_hz;  in mt7621_spi_prepare_message()
174 	return mt7621_spi_prepare(spi, speed);  in mt7621_spi_prepare_message()
183 	 * Combine with any pending write, and perform one or more half-duplex  in mt7621_spi_read_half_duplex()
187 	tx_len = rs->pending_write;  in mt7621_spi_read_half_duplex()
188 	rs->pending_write = 0;  in mt7621_spi_read_half_duplex()
196 			val |= (tx_len - 4) * 8;  in mt7621_spi_read_half_duplex()
215 		rx_len -= i;  in mt7621_spi_read_half_duplex()
227 	int len = rs->pending_write;  in mt7621_spi_write_half_duplex()
233 			val <<= (4 - len) * 8;  in mt7621_spi_write_half_duplex()
240 			rs->pending_write = len;  in mt7621_spi_write_half_duplex()
249 				/* The byte-order of the opcode is weird! */  in mt7621_spi_write_half_duplex()
251 			mt7621_spi_write(rs, MT7621_SPI_OPCODE + len - 4, val);  in mt7621_spi_write_half_duplex()
254 		tx_len -= 1;  in mt7621_spi_write_half_duplex()
260 			val >>= (4 - len) * 8;  in mt7621_spi_write_half_duplex()
265 	rs->pending_write = len;  in mt7621_spi_write_half_duplex()
270 				   struct spi_device *spi,  in mt7621_spi_transfer_one()  argument
275 	if ((t->rx_buf) && (t->tx_buf)) {  in mt7621_spi_transfer_one()
279 		 * (cmd_bit_cnt == 0). So the claimed full-duplex  in mt7621_spi_transfer_one()
283 		return -EIO;  in mt7621_spi_transfer_one()
284 	} else if (t->rx_buf) {  in mt7621_spi_transfer_one()
285 		mt7621_spi_read_half_duplex(rs, t->len, t->rx_buf);  in mt7621_spi_transfer_one()
286 	} else if (t->tx_buf) {  in mt7621_spi_transfer_one()
287 		mt7621_spi_write_half_duplex(rs, t->len, t->tx_buf);  in mt7621_spi_transfer_one()
293 static int mt7621_spi_setup(struct spi_device *spi)  in mt7621_spi_setup()  argument
295 	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);  in mt7621_spi_setup()
297 	if ((spi->max_speed_hz == 0) ||  in mt7621_spi_setup()
298 	    (spi->max_speed_hz > (rs->sys_freq / 2)))  in mt7621_spi_setup()
299 		spi->max_speed_hz = rs->sys_freq / 2;  in mt7621_spi_setup()
301 	if (spi->max_speed_hz < (rs->sys_freq / 4097)) {  in mt7621_spi_setup()
302 		dev_err(&spi->dev, "setup: requested speed is too low %d Hz\n",  in mt7621_spi_setup()
303 			spi->max_speed_hz);  in mt7621_spi_setup()
304 		return -EINVAL;  in mt7621_spi_setup()
311 	{ .compatible = "ralink,mt7621-spi" },
325 	match = of_match_device(mt7621_spi_match, &pdev->dev);  in mt7621_spi_probe()
327 		return -EINVAL;  in mt7621_spi_probe()
333 	clk = devm_clk_get_enabled(&pdev->dev, NULL);  in mt7621_spi_probe()
335 		return dev_err_probe(&pdev->dev, PTR_ERR(clk),  in mt7621_spi_probe()
338 	host = devm_spi_alloc_host(&pdev->dev, sizeof(*rs));  in mt7621_spi_probe()
340 		dev_info(&pdev->dev, "host allocation failed\n");  in mt7621_spi_probe()
341 		return -ENOMEM;  in mt7621_spi_probe()
344 	host->mode_bits = SPI_LSB_FIRST;  in mt7621_spi_probe()
345 	host->flags = SPI_CONTROLLER_HALF_DUPLEX;  in mt7621_spi_probe()
346 	host->setup = mt7621_spi_setup;  in mt7621_spi_probe()
347 	host->prepare_message = mt7621_spi_prepare_message;  in mt7621_spi_probe()
348 	host->set_cs = mt7621_spi_set_native_cs;  in mt7621_spi_probe()
349 	host->transfer_one = mt7621_spi_transfer_one;  in mt7621_spi_probe()
350 	host->bits_per_word_mask = SPI_BPW_MASK(8);  in mt7621_spi_probe()
351 	host->dev.of_node = pdev->dev.of_node;  in mt7621_spi_probe()
352 	host->max_native_cs = MT7621_NATIVE_CS_COUNT;  in mt7621_spi_probe()
353 	host->num_chipselect = MT7621_NATIVE_CS_COUNT;  in mt7621_spi_probe()
354 	host->use_gpio_descriptors = true;  in mt7621_spi_probe()
356 	dev_set_drvdata(&pdev->dev, host);  in mt7621_spi_probe()
359 	rs->base = base;  in mt7621_spi_probe()
360 	rs->host = host;  in mt7621_spi_probe()
361 	rs->sys_freq = clk_get_rate(clk);  in mt7621_spi_probe()
362 	rs->pending_write = 0;  in mt7621_spi_probe()
363 	dev_info(&pdev->dev, "sys_freq: %u\n", rs->sys_freq);  in mt7621_spi_probe()
365 	ret = device_reset(&pdev->dev);  in mt7621_spi_probe()
367 		dev_err(&pdev->dev, "SPI reset failed!\n");  in mt7621_spi_probe()
371 	return devm_spi_register_controller(&pdev->dev, host);  in mt7621_spi_probe()
386 MODULE_DESCRIPTION("MT7621 SPI driver");