Lines Matching refs:HSFSTS_CTL
24 #define HSFSTS_CTL 0x04 macro
200 value = readl(ispi->base + HSFSTS_CTL); in intel_spi_dump_regs()
317 return readl_poll_timeout(ispi->base + HSFSTS_CTL, val, in intel_spi_wait_hw_busy()
369 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_hw_cycle()
375 writel(val, ispi->base + HSFSTS_CTL); in intel_spi_hw_cycle()
381 status = readl(ispi->base + HSFSTS_CTL); in intel_spi_hw_cycle()
571 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_read()
577 writel(val, ispi->base + HSFSTS_CTL); in intel_spi_read()
583 status = readl(ispi->base + HSFSTS_CTL); in intel_spi_read()
628 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_write()
642 writel(val, ispi->base + HSFSTS_CTL); in intel_spi_write()
650 status = readl(ispi->base + HSFSTS_CTL); in intel_spi_write()
687 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_erase()
692 writel(val, ispi->base + HSFSTS_CTL); in intel_spi_erase()
698 status = readl(ispi->base + HSFSTS_CTL); in intel_spi_erase()
1126 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_init()
1128 writel(val, ispi->base + HSFSTS_CTL); in intel_spi_init()
1166 val = readl(ispi->base + HSFSTS_CTL); in intel_spi_init()