1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/dma-mapping.h>
22 #include <linux/dma/imx-dma.h>
33 /* The maximum bytes that edma can transfer once.*/
34 #define FSL_LPSPI_MAX_EDMA_BYTES  ((1 << 15) - 1)
144 	{ .compatible = "fsl,imx7ulp-spi", .data = &imx7ulp_lpspi_devtype_data,},
145 	{ .compatible = "fsl,imx93-spi", .data = &imx93_lpspi_devtype_data,},
153 	unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR);	\
155 	if (fsl_lpspi->rx_buf) {					\
156 		*(type *)fsl_lpspi->rx_buf = val;			\
157 		fsl_lpspi->rx_buf += sizeof(type);                      \
166 	if (fsl_lpspi->tx_buf) {					\
167 		val = *(type *)fsl_lpspi->tx_buf;			\
168 		fsl_lpspi->tx_buf += sizeof(type);			\
171 	fsl_lpspi->remain -= sizeof(type);				\
172 	writel(val, fsl_lpspi->base + IMX7ULP_TDR);			\
185 	writel(enable, fsl_lpspi->base + IMX7ULP_IER);  in LPSPI_BUF_TX()
199 	if (!controller->dma_rx)  in fsl_lpspi_can_dma()
202 	bytes_per_word = fsl_lpspi_bytes_per_word(transfer->bits_per_word);  in fsl_lpspi_can_dma()
222 	ret = pm_runtime_resume_and_get(fsl_lpspi->dev);  in lpspi_prepare_xfer_hardware()
224 		dev_err(fsl_lpspi->dev, "failed to enable clock\n");  in lpspi_prepare_xfer_hardware()
236 	pm_runtime_mark_last_busy(fsl_lpspi->dev);  in lpspi_unprepare_xfer_hardware()
237 	pm_runtime_put_autosuspend(fsl_lpspi->dev);  in lpspi_unprepare_xfer_hardware()
247 	txfifo_cnt = readl(fsl_lpspi->base + IMX7ULP_FSR) & 0xff;  in fsl_lpspi_write_tx_fifo()
249 	while (txfifo_cnt < fsl_lpspi->txfifosize) {  in fsl_lpspi_write_tx_fifo()
250 		if (!fsl_lpspi->remain)  in fsl_lpspi_write_tx_fifo()
252 		fsl_lpspi->tx(fsl_lpspi);  in fsl_lpspi_write_tx_fifo()
256 	if (txfifo_cnt < fsl_lpspi->txfifosize) {  in fsl_lpspi_write_tx_fifo()
257 		if (!fsl_lpspi->is_target) {  in fsl_lpspi_write_tx_fifo()
258 			temp = readl(fsl_lpspi->base + IMX7ULP_TCR);  in fsl_lpspi_write_tx_fifo()
260 			writel(temp, fsl_lpspi->base + IMX7ULP_TCR);  in fsl_lpspi_write_tx_fifo()
270 	while (!(readl(fsl_lpspi->base + IMX7ULP_RSR) & RSR_RXEMPTY))  in fsl_lpspi_read_rx_fifo()
271 		fsl_lpspi->rx(fsl_lpspi);  in fsl_lpspi_read_rx_fifo()
278 	temp |= fsl_lpspi->config.bpw - 1;  in fsl_lpspi_set_cmd()
279 	temp |= (fsl_lpspi->config.mode & 0x3) << 30;  in fsl_lpspi_set_cmd()
280 	temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;  in fsl_lpspi_set_cmd()
281 	if (!fsl_lpspi->is_target) {  in fsl_lpspi_set_cmd()
282 		temp |= fsl_lpspi->config.prescale << 27;  in fsl_lpspi_set_cmd()
288 		if (!fsl_lpspi->usedma) {  in fsl_lpspi_set_cmd()
290 			if (fsl_lpspi->is_first_byte)  in fsl_lpspi_set_cmd()
296 	writel(temp, fsl_lpspi->base + IMX7ULP_TCR);  in fsl_lpspi_set_cmd()
298 	dev_dbg(fsl_lpspi->dev, "TCR=0x%x\n", temp);  in fsl_lpspi_set_cmd()
305 	if (!fsl_lpspi->usedma)  in fsl_lpspi_set_watermark()
306 		temp = fsl_lpspi->watermark >> 1 |  in fsl_lpspi_set_watermark()
307 		       (fsl_lpspi->watermark >> 1) << 16;  in fsl_lpspi_set_watermark()
309 		temp = fsl_lpspi->watermark >> 1;  in fsl_lpspi_set_watermark()
311 	writel(temp, fsl_lpspi->base + IMX7ULP_FCR);  in fsl_lpspi_set_watermark()
313 	dev_dbg(fsl_lpspi->dev, "FCR=0x%x\n", temp);  in fsl_lpspi_set_watermark()
318 	struct lpspi_config config = fsl_lpspi->config;  in fsl_lpspi_set_bitrate()
324 	perclk_rate = clk_get_rate(fsl_lpspi->clk_per);  in fsl_lpspi_set_bitrate()
325 	prescale_max = fsl_lpspi->devtype_data->prescale_max;  in fsl_lpspi_set_bitrate()
328 		dev_err(fsl_lpspi->dev,  in fsl_lpspi_set_bitrate()
330 		return -EINVAL;  in fsl_lpspi_set_bitrate()
334 		dev_err(fsl_lpspi->dev,  in fsl_lpspi_set_bitrate()
335 		      "per-clk should be at least two times of transfer speed");  in fsl_lpspi_set_bitrate()
336 		return -EINVAL;  in fsl_lpspi_set_bitrate()
342 		scldiv = div / (1 << prescale) - 2;  in fsl_lpspi_set_bitrate()
344 			fsl_lpspi->config.prescale = prescale;  in fsl_lpspi_set_bitrate()
350 		return -EINVAL;  in fsl_lpspi_set_bitrate()
353 					fsl_lpspi->base + IMX7ULP_CCR);  in fsl_lpspi_set_bitrate()
355 	fsl_lpspi->config.effective_speed_hz = perclk_rate / (scldiv + 2) *  in fsl_lpspi_set_bitrate()
358 	dev_dbg(fsl_lpspi->dev, "perclk=%u, speed=%u, prescale=%u, scldiv=%d\n",  in fsl_lpspi_set_bitrate()
372 	switch (fsl_lpspi_bytes_per_word(fsl_lpspi->config.bpw)) {  in fsl_lpspi_dma_configure()
383 		return -EINVAL;  in fsl_lpspi_dma_configure()
387 	tx.dst_addr = fsl_lpspi->base_phys + IMX7ULP_TDR;  in fsl_lpspi_dma_configure()
390 	ret = dmaengine_slave_config(controller->dma_tx, &tx);  in fsl_lpspi_dma_configure()
392 		dev_err(fsl_lpspi->dev, "TX dma configuration failed with %d\n",  in fsl_lpspi_dma_configure()
398 	rx.src_addr = fsl_lpspi->base_phys + IMX7ULP_RDR;  in fsl_lpspi_dma_configure()
401 	ret = dmaengine_slave_config(controller->dma_rx, &rx);  in fsl_lpspi_dma_configure()
403 		dev_err(fsl_lpspi->dev, "RX dma configuration failed with %d\n",  in fsl_lpspi_dma_configure()
416 	if (!fsl_lpspi->is_target) {  in fsl_lpspi_config()
424 	if (!fsl_lpspi->is_target)  in fsl_lpspi_config()
428 	if (fsl_lpspi->config.mode & SPI_CS_HIGH)  in fsl_lpspi_config()
430 	writel(temp, fsl_lpspi->base + IMX7ULP_CFGR1);  in fsl_lpspi_config()
432 	temp = readl(fsl_lpspi->base + IMX7ULP_CR);  in fsl_lpspi_config()
434 	writel(temp, fsl_lpspi->base + IMX7ULP_CR);  in fsl_lpspi_config()
437 	if (fsl_lpspi->usedma)  in fsl_lpspi_config()
439 	writel(temp, fsl_lpspi->base + IMX7ULP_DER);  in fsl_lpspi_config()
449 				spi_controller_get_devdata(spi->controller);  in fsl_lpspi_setup_transfer()
452 		return -EINVAL;  in fsl_lpspi_setup_transfer()
454 	fsl_lpspi->config.mode = spi->mode;  in fsl_lpspi_setup_transfer()
455 	fsl_lpspi->config.bpw = t->bits_per_word;  in fsl_lpspi_setup_transfer()
456 	fsl_lpspi->config.speed_hz = t->speed_hz;  in fsl_lpspi_setup_transfer()
457 	if (fsl_lpspi->is_only_cs1)  in fsl_lpspi_setup_transfer()
458 		fsl_lpspi->config.chip_select = 1;  in fsl_lpspi_setup_transfer()
460 		fsl_lpspi->config.chip_select = spi_get_chipselect(spi, 0);  in fsl_lpspi_setup_transfer()
462 	if (!fsl_lpspi->config.speed_hz)  in fsl_lpspi_setup_transfer()
463 		fsl_lpspi->config.speed_hz = spi->max_speed_hz;  in fsl_lpspi_setup_transfer()
464 	if (!fsl_lpspi->config.bpw)  in fsl_lpspi_setup_transfer()
465 		fsl_lpspi->config.bpw = spi->bits_per_word;  in fsl_lpspi_setup_transfer()
468 	if (fsl_lpspi->config.bpw <= 8) {  in fsl_lpspi_setup_transfer()
469 		fsl_lpspi->rx = fsl_lpspi_buf_rx_u8;  in fsl_lpspi_setup_transfer()
470 		fsl_lpspi->tx = fsl_lpspi_buf_tx_u8;  in fsl_lpspi_setup_transfer()
471 	} else if (fsl_lpspi->config.bpw <= 16) {  in fsl_lpspi_setup_transfer()
472 		fsl_lpspi->rx = fsl_lpspi_buf_rx_u16;  in fsl_lpspi_setup_transfer()
473 		fsl_lpspi->tx = fsl_lpspi_buf_tx_u16;  in fsl_lpspi_setup_transfer()
475 		fsl_lpspi->rx = fsl_lpspi_buf_rx_u32;  in fsl_lpspi_setup_transfer()
476 		fsl_lpspi->tx = fsl_lpspi_buf_tx_u32;  in fsl_lpspi_setup_transfer()
479 	if (t->len <= fsl_lpspi->txfifosize)  in fsl_lpspi_setup_transfer()
480 		fsl_lpspi->watermark = t->len;  in fsl_lpspi_setup_transfer()
482 		fsl_lpspi->watermark = fsl_lpspi->txfifosize;  in fsl_lpspi_setup_transfer()
485 		fsl_lpspi->usedma = true;  in fsl_lpspi_setup_transfer()
487 		fsl_lpspi->usedma = false;  in fsl_lpspi_setup_transfer()
497 	fsl_lpspi->target_aborted = true;  in fsl_lpspi_target_abort()
498 	if (!fsl_lpspi->usedma)  in fsl_lpspi_target_abort()
499 		complete(&fsl_lpspi->xfer_done);  in fsl_lpspi_target_abort()
501 		complete(&fsl_lpspi->dma_tx_completion);  in fsl_lpspi_target_abort()
502 		complete(&fsl_lpspi->dma_rx_completion);  in fsl_lpspi_target_abort()
513 	if (fsl_lpspi->is_target) {  in fsl_lpspi_wait_for_completion()
514 		if (wait_for_completion_interruptible(&fsl_lpspi->xfer_done) ||  in fsl_lpspi_wait_for_completion()
515 			fsl_lpspi->target_aborted) {  in fsl_lpspi_wait_for_completion()
516 			dev_dbg(fsl_lpspi->dev, "interrupted\n");  in fsl_lpspi_wait_for_completion()
517 			return -EINTR;  in fsl_lpspi_wait_for_completion()
520 		if (!wait_for_completion_timeout(&fsl_lpspi->xfer_done, HZ)) {  in fsl_lpspi_wait_for_completion()
521 			dev_dbg(fsl_lpspi->dev, "wait for completion timeout\n");  in fsl_lpspi_wait_for_completion()
522 			return -ETIMEDOUT;  in fsl_lpspi_wait_for_completion()
533 	if (!fsl_lpspi->usedma) {  in fsl_lpspi_reset()
540 	writel(temp, fsl_lpspi->base + IMX7ULP_SR);  in fsl_lpspi_reset()
544 	writel(temp, fsl_lpspi->base + IMX7ULP_CR);  in fsl_lpspi_reset()
553 	complete(&fsl_lpspi->dma_rx_completion);  in fsl_lpspi_dma_rx_callback()
560 	complete(&fsl_lpspi->dma_tx_completion);  in fsl_lpspi_dma_tx_callback()
569 	timeout = (8 + 4) * size / fsl_lpspi->config.speed_hz;  in fsl_lpspi_calculate_timeout()
585 	struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg;  in fsl_lpspi_dma_transfer()
592 	desc_rx = dmaengine_prep_slave_sg(controller->dma_rx,  in fsl_lpspi_dma_transfer()
593 				rx->sgl, rx->nents, DMA_DEV_TO_MEM,  in fsl_lpspi_dma_transfer()
596 		return -EINVAL;  in fsl_lpspi_dma_transfer()
598 	desc_rx->callback = fsl_lpspi_dma_rx_callback;  in fsl_lpspi_dma_transfer()
599 	desc_rx->callback_param = (void *)fsl_lpspi;  in fsl_lpspi_dma_transfer()
601 	reinit_completion(&fsl_lpspi->dma_rx_completion);  in fsl_lpspi_dma_transfer()
602 	dma_async_issue_pending(controller->dma_rx);  in fsl_lpspi_dma_transfer()
604 	desc_tx = dmaengine_prep_slave_sg(controller->dma_tx,  in fsl_lpspi_dma_transfer()
605 				tx->sgl, tx->nents, DMA_MEM_TO_DEV,  in fsl_lpspi_dma_transfer()
608 		dmaengine_terminate_all(controller->dma_tx);  in fsl_lpspi_dma_transfer()
609 		return -EINVAL;  in fsl_lpspi_dma_transfer()
612 	desc_tx->callback = fsl_lpspi_dma_tx_callback;  in fsl_lpspi_dma_transfer()
613 	desc_tx->callback_param = (void *)fsl_lpspi;  in fsl_lpspi_dma_transfer()
615 	reinit_completion(&fsl_lpspi->dma_tx_completion);  in fsl_lpspi_dma_transfer()
616 	dma_async_issue_pending(controller->dma_tx);  in fsl_lpspi_dma_transfer()
618 	fsl_lpspi->target_aborted = false;  in fsl_lpspi_dma_transfer()
620 	if (!fsl_lpspi->is_target) {  in fsl_lpspi_dma_transfer()
622 							       transfer->len);  in fsl_lpspi_dma_transfer()
624 		/* Wait eDMA to finish the data transfer.*/  in fsl_lpspi_dma_transfer()
625 		time_left = wait_for_completion_timeout(&fsl_lpspi->dma_tx_completion,  in fsl_lpspi_dma_transfer()
628 			dev_err(fsl_lpspi->dev, "I/O Error in DMA TX\n");  in fsl_lpspi_dma_transfer()
629 			dmaengine_terminate_all(controller->dma_tx);  in fsl_lpspi_dma_transfer()
630 			dmaengine_terminate_all(controller->dma_rx);  in fsl_lpspi_dma_transfer()
632 			return -ETIMEDOUT;  in fsl_lpspi_dma_transfer()
635 		time_left = wait_for_completion_timeout(&fsl_lpspi->dma_rx_completion,  in fsl_lpspi_dma_transfer()
638 			dev_err(fsl_lpspi->dev, "I/O Error in DMA RX\n");  in fsl_lpspi_dma_transfer()
639 			dmaengine_terminate_all(controller->dma_tx);  in fsl_lpspi_dma_transfer()
640 			dmaengine_terminate_all(controller->dma_rx);  in fsl_lpspi_dma_transfer()
642 			return -ETIMEDOUT;  in fsl_lpspi_dma_transfer()
645 		if (wait_for_completion_interruptible(&fsl_lpspi->dma_tx_completion) ||  in fsl_lpspi_dma_transfer()
646 			fsl_lpspi->target_aborted) {  in fsl_lpspi_dma_transfer()
647 			dev_dbg(fsl_lpspi->dev,  in fsl_lpspi_dma_transfer()
649 			dmaengine_terminate_all(controller->dma_tx);  in fsl_lpspi_dma_transfer()
650 			dmaengine_terminate_all(controller->dma_rx);  in fsl_lpspi_dma_transfer()
652 			return -EINTR;  in fsl_lpspi_dma_transfer()
655 		if (wait_for_completion_interruptible(&fsl_lpspi->dma_rx_completion) ||  in fsl_lpspi_dma_transfer()
656 			fsl_lpspi->target_aborted) {  in fsl_lpspi_dma_transfer()
657 			dev_dbg(fsl_lpspi->dev,  in fsl_lpspi_dma_transfer()
659 			dmaengine_terminate_all(controller->dma_tx);  in fsl_lpspi_dma_transfer()
660 			dmaengine_terminate_all(controller->dma_rx);  in fsl_lpspi_dma_transfer()
662 			return -EINTR;  in fsl_lpspi_dma_transfer()
673 	if (controller->dma_rx) {  in fsl_lpspi_dma_exit()
674 		dma_release_channel(controller->dma_rx);  in fsl_lpspi_dma_exit()
675 		controller->dma_rx = NULL;  in fsl_lpspi_dma_exit()
678 	if (controller->dma_tx) {  in fsl_lpspi_dma_exit()
679 		dma_release_channel(controller->dma_tx);  in fsl_lpspi_dma_exit()
680 		controller->dma_tx = NULL;  in fsl_lpspi_dma_exit()
691 	controller->dma_tx = dma_request_chan(dev, "tx");  in fsl_lpspi_dma_init()
692 	if (IS_ERR(controller->dma_tx)) {  in fsl_lpspi_dma_init()
693 		ret = PTR_ERR(controller->dma_tx);  in fsl_lpspi_dma_init()
695 		controller->dma_tx = NULL;  in fsl_lpspi_dma_init()
700 	controller->dma_rx = dma_request_chan(dev, "rx");  in fsl_lpspi_dma_init()
701 	if (IS_ERR(controller->dma_rx)) {  in fsl_lpspi_dma_init()
702 		ret = PTR_ERR(controller->dma_rx);  in fsl_lpspi_dma_init()
704 		controller->dma_rx = NULL;  in fsl_lpspi_dma_init()
708 	init_completion(&fsl_lpspi->dma_rx_completion);  in fsl_lpspi_dma_init()
709 	init_completion(&fsl_lpspi->dma_tx_completion);  in fsl_lpspi_dma_init()
710 	controller->can_dma = fsl_lpspi_can_dma;  in fsl_lpspi_dma_init()
711 	controller->max_dma_len = FSL_LPSPI_MAX_EDMA_BYTES;  in fsl_lpspi_dma_init()
726 	fsl_lpspi->tx_buf = t->tx_buf;  in fsl_lpspi_pio_transfer()
727 	fsl_lpspi->rx_buf = t->rx_buf;  in fsl_lpspi_pio_transfer()
728 	fsl_lpspi->remain = t->len;  in fsl_lpspi_pio_transfer()
730 	reinit_completion(&fsl_lpspi->xfer_done);  in fsl_lpspi_pio_transfer()
731 	fsl_lpspi->target_aborted = false;  in fsl_lpspi_pio_transfer()
752 	fsl_lpspi->is_first_byte = true;  in fsl_lpspi_transfer_one()
757 	t->effective_speed_hz = fsl_lpspi->config.effective_speed_hz;  in fsl_lpspi_transfer_one()
760 	fsl_lpspi->is_first_byte = false;  in fsl_lpspi_transfer_one()
762 	if (fsl_lpspi->usedma)  in fsl_lpspi_transfer_one()
777 	temp_IER = readl(fsl_lpspi->base + IMX7ULP_IER);  in fsl_lpspi_isr()
779 	temp_SR = readl(fsl_lpspi->base + IMX7ULP_SR);  in fsl_lpspi_isr()
789 	    readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_TXCOUNT) {  in fsl_lpspi_isr()
790 		writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);  in fsl_lpspi_isr()
796 		writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);  in fsl_lpspi_isr()
797 		complete(&fsl_lpspi->xfer_done);  in fsl_lpspi_isr()
813 	ret = clk_prepare_enable(fsl_lpspi->clk_per);  in fsl_lpspi_runtime_resume()
817 	ret = clk_prepare_enable(fsl_lpspi->clk_ipg);  in fsl_lpspi_runtime_resume()
819 		clk_disable_unprepare(fsl_lpspi->clk_per);  in fsl_lpspi_runtime_resume()
833 	clk_disable_unprepare(fsl_lpspi->clk_per);  in fsl_lpspi_runtime_suspend()
834 	clk_disable_unprepare(fsl_lpspi->clk_ipg);  in fsl_lpspi_runtime_suspend()
842 	struct device *dev = fsl_lpspi->dev;  in fsl_lpspi_init_rpm()
862 	devtype_data = of_device_get_match_data(&pdev->dev);  in fsl_lpspi_probe()
864 		return -ENODEV;  in fsl_lpspi_probe()
866 	is_target = of_property_read_bool((&pdev->dev)->of_node, "spi-slave");  in fsl_lpspi_probe()
868 		controller = devm_spi_alloc_target(&pdev->dev,  in fsl_lpspi_probe()
871 		controller = devm_spi_alloc_host(&pdev->dev,  in fsl_lpspi_probe()
875 		return -ENOMEM;  in fsl_lpspi_probe()
880 	fsl_lpspi->dev = &pdev->dev;  in fsl_lpspi_probe()
881 	fsl_lpspi->is_target = is_target;  in fsl_lpspi_probe()
882 	fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,  in fsl_lpspi_probe()
883 						"fsl,spi-only-use-cs1-sel");  in fsl_lpspi_probe()
884 	fsl_lpspi->devtype_data = devtype_data;  in fsl_lpspi_probe()
886 	init_completion(&fsl_lpspi->xfer_done);  in fsl_lpspi_probe()
888 	fsl_lpspi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in fsl_lpspi_probe()
889 	if (IS_ERR(fsl_lpspi->base)) {  in fsl_lpspi_probe()
890 		ret = PTR_ERR(fsl_lpspi->base);  in fsl_lpspi_probe()
893 	fsl_lpspi->base_phys = res->start;  in fsl_lpspi_probe()
901 	ret = devm_request_irq(&pdev->dev, irq, fsl_lpspi_isr, IRQF_NO_AUTOEN,  in fsl_lpspi_probe()
902 			       dev_name(&pdev->dev), fsl_lpspi);  in fsl_lpspi_probe()
904 		dev_err(&pdev->dev, "can't get irq%d: %d\n", irq, ret);  in fsl_lpspi_probe()
908 	fsl_lpspi->clk_per = devm_clk_get(&pdev->dev, "per");  in fsl_lpspi_probe()
909 	if (IS_ERR(fsl_lpspi->clk_per)) {  in fsl_lpspi_probe()
910 		ret = PTR_ERR(fsl_lpspi->clk_per);  in fsl_lpspi_probe()
914 	fsl_lpspi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");  in fsl_lpspi_probe()
915 	if (IS_ERR(fsl_lpspi->clk_ipg)) {  in fsl_lpspi_probe()
916 		ret = PTR_ERR(fsl_lpspi->clk_ipg);  in fsl_lpspi_probe()
925 	ret = pm_runtime_get_sync(fsl_lpspi->dev);  in fsl_lpspi_probe()
927 		dev_err(fsl_lpspi->dev, "failed to enable clock\n");  in fsl_lpspi_probe()
931 	temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);  in fsl_lpspi_probe()
932 	fsl_lpspi->txfifosize = 1 << (temp & 0x0f);  in fsl_lpspi_probe()
933 	fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);  in fsl_lpspi_probe()
934 	if (of_property_read_u32((&pdev->dev)->of_node, "num-cs",  in fsl_lpspi_probe()
936 		if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx93-spi"))  in fsl_lpspi_probe()
942 	controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);  in fsl_lpspi_probe()
943 	controller->transfer_one = fsl_lpspi_transfer_one;  in fsl_lpspi_probe()
944 	controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware;  in fsl_lpspi_probe()
945 	controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware;  in fsl_lpspi_probe()
946 	controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;  in fsl_lpspi_probe()
947 	controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;  in fsl_lpspi_probe()
948 	controller->dev.of_node = pdev->dev.of_node;  in fsl_lpspi_probe()
949 	controller->bus_num = pdev->id;  in fsl_lpspi_probe()
950 	controller->num_chipselect = num_cs;  in fsl_lpspi_probe()
951 	controller->target_abort = fsl_lpspi_target_abort;  in fsl_lpspi_probe()
952 	if (!fsl_lpspi->is_target)  in fsl_lpspi_probe()
953 		controller->use_gpio_descriptors = true;  in fsl_lpspi_probe()
955 	ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller);  in fsl_lpspi_probe()
956 	if (ret == -EPROBE_DEFER)  in fsl_lpspi_probe()
959 		dev_warn(&pdev->dev, "dma setup error %d, use pio\n", ret);  in fsl_lpspi_probe()
963 	ret = devm_spi_register_controller(&pdev->dev, controller);  in fsl_lpspi_probe()
965 		dev_err_probe(&pdev->dev, ret, "spi_register_controller error\n");  in fsl_lpspi_probe()
969 	pm_runtime_mark_last_busy(fsl_lpspi->dev);  in fsl_lpspi_probe()
970 	pm_runtime_put_autosuspend(fsl_lpspi->dev);  in fsl_lpspi_probe()
977 	pm_runtime_dont_use_autosuspend(fsl_lpspi->dev);  in fsl_lpspi_probe()
978 	pm_runtime_put_sync(fsl_lpspi->dev);  in fsl_lpspi_probe()
979 	pm_runtime_disable(fsl_lpspi->dev);  in fsl_lpspi_probe()
992 	pm_runtime_dont_use_autosuspend(fsl_lpspi->dev);  in fsl_lpspi_remove()
993 	pm_runtime_disable(fsl_lpspi->dev);  in fsl_lpspi_remove()