Lines Matching +full:vf610 +full:- +full:dspi
1 // SPDX-License-Identifier: GPL-2.0+
4 // Copyright 2020-2025 NXP
6 // Freescale DSPI driver
7 // This file contains a driver for the Freescale DSPI
12 #include <linux/dma-mapping.h>
21 #include <linux/spi/spi-fsl-dspi.h>
23 #define DRIVER_NAME "fsl-dspi"
107 #define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
108 #define SPI_FRAME_EBITS(bits) SPI_CTARE_FMSZE(((bits) - 1) >> 4)
137 VF610, enumerator
141 [VF610] = {
147 /* Has A-011218 DMA erratum */
153 /* Has A-011218 DMA erratum */
164 /* Has A-011218 DMA erratum */
170 /* Has A-011218 DMA erratum */
246 void (*host_to_dev)(struct fsl_dspi *dspi, u32 *txdata);
247 void (*dev_to_host)(struct fsl_dspi *dspi, u32 rxdata);
250 static void dspi_native_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_native_host_to_dev() argument
252 switch (dspi->oper_word_size) { in dspi_native_host_to_dev()
254 *txdata = *(u8 *)dspi->tx; in dspi_native_host_to_dev()
257 *txdata = *(u16 *)dspi->tx; in dspi_native_host_to_dev()
260 *txdata = *(u32 *)dspi->tx; in dspi_native_host_to_dev()
263 dspi->tx += dspi->oper_word_size; in dspi_native_host_to_dev()
266 static void dspi_native_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_native_dev_to_host() argument
268 switch (dspi->oper_word_size) { in dspi_native_dev_to_host()
270 *(u8 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
273 *(u16 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
276 *(u32 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
279 dspi->rx += dspi->oper_word_size; in dspi_native_dev_to_host()
282 static void dspi_8on32_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_8on32_host_to_dev() argument
284 *txdata = (__force u32)cpu_to_be32(*(u32 *)dspi->tx); in dspi_8on32_host_to_dev()
285 dspi->tx += sizeof(u32); in dspi_8on32_host_to_dev()
288 static void dspi_8on32_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_8on32_dev_to_host() argument
290 *(u32 *)dspi->rx = be32_to_cpu((__force __be32)rxdata); in dspi_8on32_dev_to_host()
291 dspi->rx += sizeof(u32); in dspi_8on32_dev_to_host()
294 static void dspi_8on16_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_8on16_host_to_dev() argument
296 *txdata = (__force u32)cpu_to_be16(*(u16 *)dspi->tx); in dspi_8on16_host_to_dev()
297 dspi->tx += sizeof(u16); in dspi_8on16_host_to_dev()
300 static void dspi_8on16_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_8on16_dev_to_host() argument
302 *(u16 *)dspi->rx = be16_to_cpu((__force __be16)rxdata); in dspi_8on16_dev_to_host()
303 dspi->rx += sizeof(u16); in dspi_8on16_dev_to_host()
306 static void dspi_16on32_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_16on32_host_to_dev() argument
308 u16 hi = *(u16 *)dspi->tx; in dspi_16on32_host_to_dev()
309 u16 lo = *(u16 *)(dspi->tx + 2); in dspi_16on32_host_to_dev()
312 dspi->tx += sizeof(u32); in dspi_16on32_host_to_dev()
315 static void dspi_16on32_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_16on32_dev_to_host() argument
320 *(u16 *)dspi->rx = lo; in dspi_16on32_dev_to_host()
321 *(u16 *)(dspi->rx + 2) = hi; in dspi_16on32_dev_to_host()
322 dspi->rx += sizeof(u32); in dspi_16on32_dev_to_host()
329 static u32 dspi_pop_tx(struct fsl_dspi *dspi) in dspi_pop_tx() argument
333 if (dspi->tx) in dspi_pop_tx()
334 dspi->host_to_dev(dspi, &txdata); in dspi_pop_tx()
335 dspi->len -= dspi->oper_word_size; in dspi_pop_tx()
340 static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) in dspi_pop_tx_pushr() argument
342 u16 cmd = dspi->tx_cmd, data = dspi_pop_tx(dspi); in dspi_pop_tx_pushr()
344 if (spi_controller_is_target(dspi->ctlr)) in dspi_pop_tx_pushr()
347 if (dspi->len > 0) in dspi_pop_tx_pushr()
353 static void dspi_push_rx(struct fsl_dspi *dspi, u32 rxdata) in dspi_push_rx() argument
355 if (!dspi->rx) in dspi_push_rx()
357 dspi->dev_to_host(dspi, rxdata); in dspi_push_rx()
362 struct fsl_dspi *dspi = arg; in dspi_tx_dma_callback() local
363 struct fsl_dspi_dma *dma = dspi->dma; in dspi_tx_dma_callback()
365 complete(&dma->cmd_tx_complete); in dspi_tx_dma_callback()
370 struct fsl_dspi *dspi = arg; in dspi_rx_dma_callback() local
371 struct fsl_dspi_dma *dma = dspi->dma; in dspi_rx_dma_callback()
374 if (dspi->rx) { in dspi_rx_dma_callback()
375 for (i = 0; i < dspi->words_in_flight; i++) in dspi_rx_dma_callback()
376 dspi_push_rx(dspi, dspi->dma->rx_dma_buf[i]); in dspi_rx_dma_callback()
379 complete(&dma->cmd_rx_complete); in dspi_rx_dma_callback()
382 static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) in dspi_next_xfer_dma_submit() argument
384 struct device *dev = &dspi->pdev->dev; in dspi_next_xfer_dma_submit()
385 struct fsl_dspi_dma *dma = dspi->dma; in dspi_next_xfer_dma_submit()
389 for (i = 0; i < dspi->words_in_flight; i++) in dspi_next_xfer_dma_submit()
390 dspi->dma->tx_dma_buf[i] = dspi_pop_tx_pushr(dspi); in dspi_next_xfer_dma_submit()
392 dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx, in dspi_next_xfer_dma_submit()
393 dma->tx_dma_phys, in dspi_next_xfer_dma_submit()
394 dspi->words_in_flight * in dspi_next_xfer_dma_submit()
398 if (!dma->tx_desc) { in dspi_next_xfer_dma_submit()
400 return -EIO; in dspi_next_xfer_dma_submit()
403 dma->tx_desc->callback = dspi_tx_dma_callback; in dspi_next_xfer_dma_submit()
404 dma->tx_desc->callback_param = dspi; in dspi_next_xfer_dma_submit()
405 if (dma_submit_error(dmaengine_submit(dma->tx_desc))) { in dspi_next_xfer_dma_submit()
407 return -EINVAL; in dspi_next_xfer_dma_submit()
410 dma->rx_desc = dmaengine_prep_slave_single(dma->chan_rx, in dspi_next_xfer_dma_submit()
411 dma->rx_dma_phys, in dspi_next_xfer_dma_submit()
412 dspi->words_in_flight * in dspi_next_xfer_dma_submit()
416 if (!dma->rx_desc) { in dspi_next_xfer_dma_submit()
418 return -EIO; in dspi_next_xfer_dma_submit()
421 dma->rx_desc->callback = dspi_rx_dma_callback; in dspi_next_xfer_dma_submit()
422 dma->rx_desc->callback_param = dspi; in dspi_next_xfer_dma_submit()
423 if (dma_submit_error(dmaengine_submit(dma->rx_desc))) { in dspi_next_xfer_dma_submit()
425 return -EINVAL; in dspi_next_xfer_dma_submit()
428 reinit_completion(&dspi->dma->cmd_rx_complete); in dspi_next_xfer_dma_submit()
429 reinit_completion(&dspi->dma->cmd_tx_complete); in dspi_next_xfer_dma_submit()
431 dma_async_issue_pending(dma->chan_rx); in dspi_next_xfer_dma_submit()
432 dma_async_issue_pending(dma->chan_tx); in dspi_next_xfer_dma_submit()
434 if (spi_controller_is_target(dspi->ctlr)) { in dspi_next_xfer_dma_submit()
435 wait_for_completion_interruptible(&dspi->dma->cmd_rx_complete); in dspi_next_xfer_dma_submit()
439 time_left = wait_for_completion_timeout(&dspi->dma->cmd_tx_complete, in dspi_next_xfer_dma_submit()
443 dmaengine_terminate_all(dma->chan_tx); in dspi_next_xfer_dma_submit()
444 dmaengine_terminate_all(dma->chan_rx); in dspi_next_xfer_dma_submit()
445 return -ETIMEDOUT; in dspi_next_xfer_dma_submit()
448 time_left = wait_for_completion_timeout(&dspi->dma->cmd_rx_complete, in dspi_next_xfer_dma_submit()
452 dmaengine_terminate_all(dma->chan_tx); in dspi_next_xfer_dma_submit()
453 dmaengine_terminate_all(dma->chan_rx); in dspi_next_xfer_dma_submit()
454 return -ETIMEDOUT; in dspi_next_xfer_dma_submit()
460 static void dspi_setup_accel(struct fsl_dspi *dspi);
462 static int dspi_dma_xfer(struct fsl_dspi *dspi) in dspi_dma_xfer() argument
464 struct spi_message *message = dspi->cur_msg; in dspi_dma_xfer()
465 struct device *dev = &dspi->pdev->dev; in dspi_dma_xfer()
469 * dspi->len gets decremented by dspi_pop_tx_pushr in in dspi_dma_xfer()
472 while (dspi->len) { in dspi_dma_xfer()
473 /* Figure out operational bits-per-word for this chunk */ in dspi_dma_xfer()
474 dspi_setup_accel(dspi); in dspi_dma_xfer()
476 dspi->words_in_flight = dspi->len / dspi->oper_word_size; in dspi_dma_xfer()
477 if (dspi->words_in_flight > dspi->devtype_data->fifo_size) in dspi_dma_xfer()
478 dspi->words_in_flight = dspi->devtype_data->fifo_size; in dspi_dma_xfer()
480 message->actual_length += dspi->words_in_flight * in dspi_dma_xfer()
481 dspi->oper_word_size; in dspi_dma_xfer()
483 ret = dspi_next_xfer_dma_submit(dspi); in dspi_dma_xfer()
493 static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) in dspi_request_dma() argument
495 int dma_bufsize = dspi->devtype_data->fifo_size * 2; in dspi_request_dma()
496 struct device *dev = &dspi->pdev->dev; in dspi_request_dma()
503 return -ENOMEM; in dspi_request_dma()
505 dma->chan_rx = dma_request_chan(dev, "rx"); in dspi_request_dma()
506 if (IS_ERR(dma->chan_rx)) in dspi_request_dma()
507 return dev_err_probe(dev, PTR_ERR(dma->chan_rx), "rx dma channel not available\n"); in dspi_request_dma()
509 dma->chan_tx = dma_request_chan(dev, "tx"); in dspi_request_dma()
510 if (IS_ERR(dma->chan_tx)) { in dspi_request_dma()
511 ret = dev_err_probe(dev, PTR_ERR(dma->chan_tx), "tx dma channel not available\n"); in dspi_request_dma()
515 dma->tx_dma_buf = dma_alloc_coherent(dma->chan_tx->device->dev, in dspi_request_dma()
516 dma_bufsize, &dma->tx_dma_phys, in dspi_request_dma()
518 if (!dma->tx_dma_buf) { in dspi_request_dma()
519 ret = -ENOMEM; in dspi_request_dma()
523 dma->rx_dma_buf = dma_alloc_coherent(dma->chan_rx->device->dev, in dspi_request_dma()
524 dma_bufsize, &dma->rx_dma_phys, in dspi_request_dma()
526 if (!dma->rx_dma_buf) { in dspi_request_dma()
527 ret = -ENOMEM; in dspi_request_dma()
540 ret = dmaengine_slave_config(dma->chan_rx, &cfg); in dspi_request_dma()
547 ret = dmaengine_slave_config(dma->chan_tx, &cfg); in dspi_request_dma()
553 dspi->dma = dma; in dspi_request_dma()
554 init_completion(&dma->cmd_tx_complete); in dspi_request_dma()
555 init_completion(&dma->cmd_rx_complete); in dspi_request_dma()
560 dma_free_coherent(dma->chan_rx->device->dev, in dspi_request_dma()
561 dma_bufsize, dma->rx_dma_buf, dma->rx_dma_phys); in dspi_request_dma()
563 dma_free_coherent(dma->chan_tx->device->dev, in dspi_request_dma()
564 dma_bufsize, dma->tx_dma_buf, dma->tx_dma_phys); in dspi_request_dma()
566 dma_release_channel(dma->chan_tx); in dspi_request_dma()
568 dma_release_channel(dma->chan_rx); in dspi_request_dma()
571 dspi->dma = NULL; in dspi_request_dma()
576 static void dspi_release_dma(struct fsl_dspi *dspi) in dspi_release_dma() argument
578 int dma_bufsize = dspi->devtype_data->fifo_size * 2; in dspi_release_dma()
579 struct fsl_dspi_dma *dma = dspi->dma; in dspi_release_dma()
584 if (dma->chan_tx) { in dspi_release_dma()
585 dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize, in dspi_release_dma()
586 dma->tx_dma_buf, dma->tx_dma_phys); in dspi_release_dma()
587 dma_release_channel(dma->chan_tx); in dspi_release_dma()
590 if (dma->chan_rx) { in dspi_release_dma()
591 dma_free_coherent(dma->chan_rx->device->dev, dma_bufsize, in dspi_release_dma()
592 dma->rx_dma_buf, dma->rx_dma_phys); in dspi_release_dma()
593 dma_release_channel(dma->chan_rx); in dspi_release_dma()
600 /* Valid baud rate pre-scaler values */ in hz_to_spi_baud()
629 *pbr = ARRAY_SIZE(pbr_tbl) - 1; in hz_to_spi_baud()
630 *br = ARRAY_SIZE(brs) - 1; in hz_to_spi_baud()
663 *psc = ARRAY_SIZE(pscale_tbl) - 1; in ns_delay_scale()
668 static void dspi_pushr_cmd_write(struct fsl_dspi *dspi, u16 cmd) in dspi_pushr_cmd_write() argument
673 * dspi_pop_tx (the function that decrements dspi->len) _after_ in dspi_pushr_cmd_write()
680 if (dspi->len > dspi->oper_word_size) in dspi_pushr_cmd_write()
682 regmap_write(dspi->regmap_pushr, dspi->pushr_cmd, cmd); in dspi_pushr_cmd_write()
685 static void dspi_pushr_txdata_write(struct fsl_dspi *dspi, u16 txdata) in dspi_pushr_txdata_write() argument
687 regmap_write(dspi->regmap_pushr, dspi->pushr_tx, txdata); in dspi_pushr_txdata_write()
690 static void dspi_xspi_fifo_write(struct fsl_dspi *dspi, int num_words) in dspi_xspi_fifo_write() argument
692 int num_bytes = num_words * dspi->oper_word_size; in dspi_xspi_fifo_write()
693 u16 tx_cmd = dspi->tx_cmd; in dspi_xspi_fifo_write()
696 * If the PCS needs to de-assert (i.e. we're at the end of the buffer in dspi_xspi_fifo_write()
703 if (!(dspi->tx_cmd & SPI_PUSHR_CMD_CONT) && num_bytes == dspi->len) in dspi_xspi_fifo_write()
707 regmap_write(dspi->regmap, SPI_CTARE(0), in dspi_xspi_fifo_write()
708 SPI_FRAME_EBITS(dspi->oper_bits_per_word) | in dspi_xspi_fifo_write()
715 dspi_pushr_cmd_write(dspi, tx_cmd); in dspi_xspi_fifo_write()
718 while (num_words--) { in dspi_xspi_fifo_write()
719 u32 data = dspi_pop_tx(dspi); in dspi_xspi_fifo_write()
721 dspi_pushr_txdata_write(dspi, data & 0xFFFF); in dspi_xspi_fifo_write()
722 if (dspi->oper_bits_per_word > 16) in dspi_xspi_fifo_write()
723 dspi_pushr_txdata_write(dspi, data >> 16); in dspi_xspi_fifo_write()
727 static u32 dspi_popr_read(struct fsl_dspi *dspi) in dspi_popr_read() argument
731 regmap_read(dspi->regmap, SPI_POPR, &rxdata); in dspi_popr_read()
735 static void dspi_fifo_read(struct fsl_dspi *dspi) in dspi_fifo_read() argument
737 int num_fifo_entries = dspi->words_in_flight; in dspi_fifo_read()
740 while (num_fifo_entries--) in dspi_fifo_read()
741 dspi_push_rx(dspi, dspi_popr_read(dspi)); in dspi_fifo_read()
744 static void dspi_setup_accel(struct fsl_dspi *dspi) in dspi_setup_accel() argument
746 struct spi_transfer *xfer = dspi->cur_transfer; in dspi_setup_accel()
747 bool odd = !!(dspi->len & 1); in dspi_setup_accel()
750 if (xfer->bits_per_word % 8) in dspi_setup_accel()
753 if (!odd && dspi->len <= dspi->devtype_data->fifo_size * 2) { in dspi_setup_accel()
754 dspi->oper_bits_per_word = 16; in dspi_setup_accel()
755 } else if (odd && dspi->len <= dspi->devtype_data->fifo_size) { in dspi_setup_accel()
756 dspi->oper_bits_per_word = 8; in dspi_setup_accel()
759 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_setup_accel()
760 dspi->oper_bits_per_word = 32; in dspi_setup_accel()
762 dspi->oper_bits_per_word = 16; in dspi_setup_accel()
769 if (dspi->len >= DIV_ROUND_UP(dspi->oper_bits_per_word, 8)) in dspi_setup_accel()
772 dspi->oper_bits_per_word /= 2; in dspi_setup_accel()
773 } while (dspi->oper_bits_per_word > 8); in dspi_setup_accel()
776 if (xfer->bits_per_word == 8 && dspi->oper_bits_per_word == 32) { in dspi_setup_accel()
777 dspi->dev_to_host = dspi_8on32_dev_to_host; in dspi_setup_accel()
778 dspi->host_to_dev = dspi_8on32_host_to_dev; in dspi_setup_accel()
779 } else if (xfer->bits_per_word == 8 && dspi->oper_bits_per_word == 16) { in dspi_setup_accel()
780 dspi->dev_to_host = dspi_8on16_dev_to_host; in dspi_setup_accel()
781 dspi->host_to_dev = dspi_8on16_host_to_dev; in dspi_setup_accel()
782 } else if (xfer->bits_per_word == 16 && dspi->oper_bits_per_word == 32) { in dspi_setup_accel()
783 dspi->dev_to_host = dspi_16on32_dev_to_host; in dspi_setup_accel()
784 dspi->host_to_dev = dspi_16on32_host_to_dev; in dspi_setup_accel()
787 dspi->dev_to_host = dspi_native_dev_to_host; in dspi_setup_accel()
788 dspi->host_to_dev = dspi_native_host_to_dev; in dspi_setup_accel()
789 dspi->oper_bits_per_word = xfer->bits_per_word; in dspi_setup_accel()
792 dspi->oper_word_size = DIV_ROUND_UP(dspi->oper_bits_per_word, 8); in dspi_setup_accel()
799 regmap_write(dspi->regmap, SPI_CTAR(0), in dspi_setup_accel()
800 dspi->cur_chip->ctar_val | in dspi_setup_accel()
801 SPI_FRAME_BITS(dspi->oper_bits_per_word)); in dspi_setup_accel()
804 static void dspi_fifo_write(struct fsl_dspi *dspi) in dspi_fifo_write() argument
806 int num_fifo_entries = dspi->devtype_data->fifo_size; in dspi_fifo_write()
807 struct spi_transfer *xfer = dspi->cur_transfer; in dspi_fifo_write()
808 struct spi_message *msg = dspi->cur_msg; in dspi_fifo_write()
811 dspi_setup_accel(dspi); in dspi_fifo_write()
813 /* In XSPI mode each 32-bit word occupies 2 TX FIFO entries */ in dspi_fifo_write()
814 if (dspi->oper_word_size == 4) in dspi_fifo_write()
818 * Integer division intentionally trims off odd (or non-multiple of 4) in dspi_fifo_write()
822 num_words = dspi->len / dspi->oper_word_size; in dspi_fifo_write()
827 num_bytes = num_words * dspi->oper_word_size; in dspi_fifo_write()
828 msg->actual_length += num_bytes; in dspi_fifo_write()
829 dspi->progress += num_bytes / DIV_ROUND_UP(xfer->bits_per_word, 8); in dspi_fifo_write()
835 dspi->words_in_flight = num_words; in dspi_fifo_write()
837 spi_take_timestamp_pre(dspi->ctlr, xfer, dspi->progress, !dspi->irq); in dspi_fifo_write()
839 dspi_xspi_fifo_write(dspi, num_words); in dspi_fifo_write()
842 * interrupt, so we must never use dspi->words_in_flight again since it in dspi_fifo_write()
846 spi_take_timestamp_post(dspi->ctlr, dspi->cur_transfer, in dspi_fifo_write()
847 dspi->progress, !dspi->irq); in dspi_fifo_write()
850 static int dspi_rxtx(struct fsl_dspi *dspi) in dspi_rxtx() argument
852 dspi_fifo_read(dspi); in dspi_rxtx()
854 if (!dspi->len) in dspi_rxtx()
858 dspi_fifo_write(dspi); in dspi_rxtx()
860 return -EINPROGRESS; in dspi_rxtx()
863 static int dspi_poll(struct fsl_dspi *dspi) in dspi_poll() argument
869 regmap_read(dspi->regmap, SPI_SR, &spi_sr); in dspi_poll()
870 regmap_write(dspi->regmap, SPI_SR, spi_sr); in dspi_poll()
874 } while (--tries); in dspi_poll()
877 return -ETIMEDOUT; in dspi_poll()
879 return dspi_rxtx(dspi); in dspi_poll()
884 struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id; in dspi_interrupt() local
887 regmap_read(dspi->regmap, SPI_SR, &spi_sr); in dspi_interrupt()
888 regmap_write(dspi->regmap, SPI_SR, spi_sr); in dspi_interrupt()
893 if (dspi_rxtx(dspi) == 0) in dspi_interrupt()
894 complete(&dspi->xfer_done); in dspi_interrupt()
920 struct fsl_dspi *dspi = spi_controller_get_devdata(ctlr); in dspi_transfer_one_message() local
921 struct spi_device *spi = message->spi; in dspi_transfer_one_message()
928 message->actual_length = 0; in dspi_transfer_one_message()
930 /* Put DSPI in running mode if halted. */ in dspi_transfer_one_message()
931 regmap_read(dspi->regmap, SPI_MCR, &val); in dspi_transfer_one_message()
933 regmap_update_bits(dspi->regmap, SPI_MCR, SPI_MCR_HALT, 0); in dspi_transfer_one_message()
934 while (regmap_read(dspi->regmap, SPI_SR, &val) >= 0 && in dspi_transfer_one_message()
939 list_for_each_entry(transfer, &message->transfers, transfer_list) { in dspi_transfer_one_message()
940 dspi->cur_transfer = transfer; in dspi_transfer_one_message()
941 dspi->cur_msg = message; in dspi_transfer_one_message()
942 dspi->cur_chip = spi_get_ctldata(spi); in dspi_transfer_one_message()
947 dspi->tx_cmd = SPI_PUSHR_CMD_CTAS(0); in dspi_transfer_one_message()
949 dspi->tx_cmd |= SPI_PUSHR_CMD_PCS(spi_get_chipselect(spi, 0)); in dspi_transfer_one_message()
951 if (list_is_last(&dspi->cur_transfer->transfer_list, in dspi_transfer_one_message()
952 &dspi->cur_msg->transfers)) { in dspi_transfer_one_message()
956 if (transfer->cs_change) in dspi_transfer_one_message()
957 dspi->tx_cmd |= SPI_PUSHR_CMD_CONT; in dspi_transfer_one_message()
960 * when cs_change is not set, and de-activate PCS in dspi_transfer_one_message()
964 if (!transfer->cs_change) in dspi_transfer_one_message()
965 dspi->tx_cmd |= SPI_PUSHR_CMD_CONT; in dspi_transfer_one_message()
968 cs_change = transfer->cs_change; in dspi_transfer_one_message()
969 dspi->tx = transfer->tx_buf; in dspi_transfer_one_message()
970 dspi->rx = transfer->rx_buf; in dspi_transfer_one_message()
971 dspi->len = transfer->len; in dspi_transfer_one_message()
972 dspi->progress = 0; in dspi_transfer_one_message()
974 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_transfer_one_message()
978 regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); in dspi_transfer_one_message()
980 spi_take_timestamp_pre(dspi->ctlr, dspi->cur_transfer, in dspi_transfer_one_message()
981 dspi->progress, !dspi->irq); in dspi_transfer_one_message()
983 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_transfer_one_message()
984 status = dspi_dma_xfer(dspi); in dspi_transfer_one_message()
986 dspi_fifo_write(dspi); in dspi_transfer_one_message()
988 if (dspi->irq) { in dspi_transfer_one_message()
989 wait_for_completion(&dspi->xfer_done); in dspi_transfer_one_message()
990 reinit_completion(&dspi->xfer_done); in dspi_transfer_one_message()
993 status = dspi_poll(dspi); in dspi_transfer_one_message()
994 } while (status == -EINPROGRESS); in dspi_transfer_one_message()
1002 if (!(dspi->tx_cmd & SPI_PUSHR_CMD_CONT)) in dspi_transfer_one_message()
1007 /* Put DSPI in stop mode */ in dspi_transfer_one_message()
1008 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_transfer_one_message()
1010 while (regmap_read(dspi->regmap, SPI_SR, &val) >= 0 && in dspi_transfer_one_message()
1015 message->status = status; in dspi_transfer_one_message()
1023 struct fsl_dspi *dspi = spi_controller_get_devdata(spi->controller); in dspi_setup() local
1024 u32 period_ns = DIV_ROUND_UP(NSEC_PER_SEC, spi->max_speed_hz); in dspi_setup()
1041 return -ENOMEM; in dspi_setup()
1044 pdata = dev_get_platdata(&dspi->pdev->dev); in dspi_setup()
1047 val = spi_delay_to_ns(&spi->cs_setup, NULL); in dspi_setup()
1050 of_property_read_u32(spi->dev.of_node, in dspi_setup()
1051 "fsl,spi-cs-sck-delay", in dspi_setup()
1054 val = spi_delay_to_ns(&spi->cs_hold, NULL); in dspi_setup()
1057 of_property_read_u32(spi->dev.of_node, in dspi_setup()
1058 "fsl,spi-sck-cs-delay", in dspi_setup()
1061 cs_sck_delay = pdata->cs_sck_delay; in dspi_setup()
1062 sck_cs_delay = pdata->sck_cs_delay; in dspi_setup()
1074 dev_dbg(&spi->dev, in dspi_setup()
1075 "DSPI controller timing params: CS-to-SCK delay %u ns, SCK-to-CS delay %u ns\n", in dspi_setup()
1078 clkrate = clk_get_rate(dspi->clk); in dspi_setup()
1079 hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate); in dspi_setup()
1087 chip->ctar_val = 0; in dspi_setup()
1088 if (spi->mode & SPI_CPOL) in dspi_setup()
1089 chip->ctar_val |= SPI_CTAR_CPOL; in dspi_setup()
1090 if (spi->mode & SPI_CPHA) in dspi_setup()
1091 chip->ctar_val |= SPI_CTAR_CPHA; in dspi_setup()
1093 if (!spi_controller_is_target(dspi->ctlr)) { in dspi_setup()
1094 chip->ctar_val |= SPI_CTAR_PCSSCK(pcssck) | in dspi_setup()
1101 if (spi->mode & SPI_LSB_FIRST) in dspi_setup()
1102 chip->ctar_val |= SPI_CTAR_LSBFE; in dspi_setup()
1120 dev_dbg(&spi->dev, "spi_device %u.%u cleanup\n", in dspi_cleanup()
1121 spi->controller->bus_num, spi_get_chipselect(spi, 0)); in dspi_cleanup()
1128 .compatible = "fsl,vf610-dspi",
1129 .data = &devtype_data[VF610],
1131 .compatible = "fsl,ls1021a-v1.0-dspi",
1134 .compatible = "fsl,ls1012a-dspi",
1137 .compatible = "fsl,ls1028a-dspi",
1140 .compatible = "fsl,ls1043a-dspi",
1143 .compatible = "fsl,ls1046a-dspi",
1146 .compatible = "fsl,ls2080a-dspi",
1149 .compatible = "fsl,ls2085a-dspi",
1152 .compatible = "fsl,lx2160a-dspi",
1162 struct fsl_dspi *dspi = dev_get_drvdata(dev); in dspi_suspend() local
1164 if (dspi->irq) in dspi_suspend()
1165 disable_irq(dspi->irq); in dspi_suspend()
1166 spi_controller_suspend(dspi->ctlr); in dspi_suspend()
1167 clk_disable_unprepare(dspi->clk); in dspi_suspend()
1176 struct fsl_dspi *dspi = dev_get_drvdata(dev); in dspi_resume() local
1181 ret = clk_prepare_enable(dspi->clk); in dspi_resume()
1184 spi_controller_resume(dspi->ctlr); in dspi_resume()
1185 if (dspi->irq) in dspi_resume()
1186 enable_irq(dspi->irq); in dspi_resume()
1260 static int dspi_init(struct fsl_dspi *dspi) in dspi_init() argument
1265 mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->max_native_cs - 1, 0)); in dspi_init()
1267 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_init()
1269 if (!spi_controller_is_target(dspi->ctlr)) in dspi_init()
1274 regmap_write(dspi->regmap, SPI_MCR, mcr); in dspi_init()
1275 regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); in dspi_init()
1277 switch (dspi->devtype_data->trans_mode) { in dspi_init()
1279 regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_CMDTCFE); in dspi_init()
1282 regmap_write(dspi->regmap, SPI_RSER, in dspi_init()
1287 dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n", in dspi_init()
1288 dspi->devtype_data->trans_mode); in dspi_init()
1289 return -EINVAL; in dspi_init()
1297 struct fsl_dspi *dspi = spi_controller_get_devdata(host); in dspi_target_abort() local
1303 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_target_abort()
1304 dmaengine_terminate_sync(dspi->dma->chan_rx); in dspi_target_abort()
1305 dmaengine_terminate_sync(dspi->dma->chan_tx); in dspi_target_abort()
1308 /* Clear the internal DSPI RX and TX FIFO buffers */ in dspi_target_abort()
1309 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_target_abort()
1318 struct device_node *np = pdev->dev.of_node; in dspi_probe()
1322 int ret, cs_num, bus_num = -1; in dspi_probe()
1323 struct fsl_dspi *dspi; in dspi_probe() local
1328 dspi = devm_kzalloc(&pdev->dev, sizeof(*dspi), GFP_KERNEL); in dspi_probe()
1329 if (!dspi) in dspi_probe()
1330 return -ENOMEM; in dspi_probe()
1332 ctlr = spi_alloc_host(&pdev->dev, 0); in dspi_probe()
1334 return -ENOMEM; in dspi_probe()
1336 spi_controller_set_devdata(ctlr, dspi); in dspi_probe()
1337 platform_set_drvdata(pdev, dspi); in dspi_probe()
1339 dspi->pdev = pdev; in dspi_probe()
1340 dspi->ctlr = ctlr; in dspi_probe()
1342 ctlr->setup = dspi_setup; in dspi_probe()
1343 ctlr->transfer_one_message = dspi_transfer_one_message; in dspi_probe()
1344 ctlr->dev.of_node = pdev->dev.of_node; in dspi_probe()
1346 ctlr->cleanup = dspi_cleanup; in dspi_probe()
1347 ctlr->target_abort = dspi_target_abort; in dspi_probe()
1348 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; in dspi_probe()
1349 ctlr->use_gpio_descriptors = true; in dspi_probe()
1351 pdata = dev_get_platdata(&pdev->dev); in dspi_probe()
1353 ctlr->num_chipselect = ctlr->max_native_cs = pdata->cs_num; in dspi_probe()
1354 ctlr->bus_num = pdata->bus_num; in dspi_probe()
1357 dspi->devtype_data = &devtype_data[MCF5441X]; in dspi_probe()
1361 ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num); in dspi_probe()
1363 dev_err(&pdev->dev, "can't get spi-num-chipselects\n"); in dspi_probe()
1366 ctlr->num_chipselect = ctlr->max_native_cs = cs_num; in dspi_probe()
1368 of_property_read_u32(np, "bus-num", &bus_num); in dspi_probe()
1369 ctlr->bus_num = bus_num; in dspi_probe()
1371 if (of_property_read_bool(np, "spi-slave")) in dspi_probe()
1372 ctlr->target = true; in dspi_probe()
1374 dspi->devtype_data = of_device_get_match_data(&pdev->dev); in dspi_probe()
1375 if (!dspi->devtype_data) { in dspi_probe()
1376 dev_err(&pdev->dev, "can't get devtype_data\n"); in dspi_probe()
1377 ret = -EFAULT; in dspi_probe()
1384 dspi->pushr_cmd = 0; in dspi_probe()
1385 dspi->pushr_tx = 2; in dspi_probe()
1387 dspi->pushr_cmd = 2; in dspi_probe()
1388 dspi->pushr_tx = 0; in dspi_probe()
1391 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_probe()
1392 ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); in dspi_probe()
1394 ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); in dspi_probe()
1402 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_probe()
1406 dspi->regmap = devm_regmap_init_mmio(&pdev->dev, base, regmap_config); in dspi_probe()
1407 if (IS_ERR(dspi->regmap)) { in dspi_probe()
1408 dev_err(&pdev->dev, "failed to init regmap: %ld\n", in dspi_probe()
1409 PTR_ERR(dspi->regmap)); in dspi_probe()
1410 ret = PTR_ERR(dspi->regmap); in dspi_probe()
1414 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) { in dspi_probe()
1415 dspi->regmap_pushr = devm_regmap_init_mmio( in dspi_probe()
1416 &pdev->dev, base + SPI_PUSHR, in dspi_probe()
1418 if (IS_ERR(dspi->regmap_pushr)) { in dspi_probe()
1419 dev_err(&pdev->dev, in dspi_probe()
1421 PTR_ERR(dspi->regmap_pushr)); in dspi_probe()
1422 ret = PTR_ERR(dspi->regmap_pushr); in dspi_probe()
1427 dspi->clk = devm_clk_get_enabled(&pdev->dev, "dspi"); in dspi_probe()
1428 if (IS_ERR(dspi->clk)) { in dspi_probe()
1429 ret = PTR_ERR(dspi->clk); in dspi_probe()
1430 dev_err(&pdev->dev, "unable to get clock\n"); in dspi_probe()
1434 ret = dspi_init(dspi); in dspi_probe()
1438 dspi->irq = platform_get_irq(pdev, 0); in dspi_probe()
1439 if (dspi->irq <= 0) { in dspi_probe()
1440 dev_info(&pdev->dev, in dspi_probe()
1442 dspi->irq = 0; in dspi_probe()
1446 init_completion(&dspi->xfer_done); in dspi_probe()
1448 ret = request_threaded_irq(dspi->irq, dspi_interrupt, NULL, in dspi_probe()
1449 IRQF_SHARED, pdev->name, dspi); in dspi_probe()
1451 dev_err(&pdev->dev, "Unable to attach DSPI interrupt\n"); in dspi_probe()
1457 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_probe()
1458 ret = dspi_request_dma(dspi, res->start); in dspi_probe()
1460 dev_err(&pdev->dev, "can't get dma channels\n"); in dspi_probe()
1465 ctlr->max_speed_hz = in dspi_probe()
1466 clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; in dspi_probe()
1468 if (dspi->devtype_data->trans_mode != DSPI_DMA_MODE) in dspi_probe()
1469 ctlr->ptp_sts_supported = true; in dspi_probe()
1473 dev_err(&pdev->dev, "Problem registering DSPI ctlr\n"); in dspi_probe()
1480 dspi_release_dma(dspi); in dspi_probe()
1482 if (dspi->irq) in dspi_probe()
1483 free_irq(dspi->irq, dspi); in dspi_probe()
1492 struct fsl_dspi *dspi = platform_get_drvdata(pdev); in dspi_remove() local
1495 spi_unregister_controller(dspi->ctlr); in dspi_remove()
1498 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_remove()
1503 regmap_update_bits(dspi->regmap, SPI_MCR, SPI_MCR_HALT, SPI_MCR_HALT); in dspi_remove()
1505 dspi_release_dma(dspi); in dspi_remove()
1506 if (dspi->irq) in dspi_remove()
1507 free_irq(dspi->irq, dspi); in dspi_remove()
1525 MODULE_DESCRIPTION("Freescale DSPI Controller Driver");